LTC4213 No RSENSE™ Electronic Circuit Breaker U FEATURES DESCRIPTIO ■ The LTC®4213 is an Electronic Circuit Breaker. An overcurrent circuit breaker senses the voltage across the drain and source terminals of an external N-channel MOSFET with no need for a sense resistor. The advantages are a lower cost and reduced voltage and power loss in the switch path. An internal high-side driver controls the external MOSFET gate. ■ ■ ■ ■ ■ ■ ■ ■ Fast 1µs Response Circuit Breaker 3 Selectable Circuit Breaker Thresholds No Sense Resistor Required Dual Level Overcurrent Fault Protection Controls Load Voltages from 0V to 6V High Side Drive for External N-Channel FET Undervoltage Lockout READY Pin Signals When Circuit Breaker Armed Small Plastic (3mm x 2mm) DFN Package U APPLICATIO S ■ ■ ■ Electronic Circuit Breaker High-Side Switch Hot Board Insertion Two integrated comparators provide dual level overcurrent protection over the bias supply to ground common mode range. The slow comparator has 16µs response while the fast comparator trips in 1µs. The circuit breaker has three selectable trip thresholds: 25mV, 50mV and 100mV. An ON pin controls the ON/OFF and resets circuit breaker faults. READY signals the MOSFET is conducting and the circuit breaker is armed. The LTC4213 operates from VCC = 2.3V to 6V. , LTC and LT are registered trademarks of Linear Technology Corporation. No RSENSE is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. U TYPICAL APPLICATIO 1.25V Electronic Circuit Breaker SI4864DY VIN 1.25V VBIAS 2.3V TO 6V VCC VOUT 1.25V 3.5A ON IOUT (50A/DIV) SENSEP GATE SENSEN VBIAS LTC4213 OFF ON Severe Overload Response GND ISEL 10k VOUT (1V/DIV) READY VGATE (5V/DIV) 4213 TA01 VIN (1V/DIV) 2µs/DIV 4213 TA01b 4213f 1 LTC4213 U W W W ABSOLUTE AXI U RATI GS U W U PACKAGE/ORDER I FOR ATIO (Note 1) Bias Supply Voltage (VCC) ........................... –0.3V to 9V Input Voltages ON, SENSEP, SENSEN .............................– 0.3V to 9V ISEL .......................................... – 0.3V to (VCC + 0.3V) Output Voltages GATE .....................................................– 0.3V to 15V READY .....................................................– 0.3V to 9V Operating Temperature Range LTC4213C ............................................... 0°C to 70°C LTC4213I ............................................. –40°C to 85°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10sec)................... 300°C ORDER PART NUMBER TOP VIEW 8 VCC READY 1 ON 2 ISEL 3 9 GND 4 LTC4213CDDB LTC4213IDDB 7 SENSEP 6 SENSEN 5 GATE DDB PART* MARKING DDB PACKAGE 8-LEAD (3mm × 2mm) PLASTIC DFN TJMAX = 125°C, θJA = 250°C/W EXPOSED PAD (PIN 9) PCB CONNECTION OPTIONAL LBHV Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 5V, ISEL = 0 unless otherwise noted. (Note 2) SYMBOL PARAMETER CONDITIONS VCC Bias Supply Voltage ● 2.3 6 V VSENSEP SENSEP Voltage ● 0 6 V ICC VCC Supply Current ● 1.6 3 mA VCC(UVLR) VCC Undervoltage Lockout Release ∆VCC(UVHYST) VCC Undervoltage Lockout Hysteresis ISENSEP SENSEP Input Current ISENSEN SENSEN Input Current VCC Rising MIN TYP MAX UNITS ● 1.8 2.07 2.23 V ● 30 100 160 mV 15 40 80 µA –1 ±15 µA 40 80 µA –1 ±15 µA VSENSEP = VSENSEN = 5V, Normal Mode VSENSEP = VSENSEN = 0, Normal Mode VSENSEP = VSENSEN = 5V, Normal Mode 15 VSENSEP = VSENSEN = 0, Normal Mode VSENSEP = VSENSEN = 5V, Reset Mode or Fault Mode 50 280 µA VCB Circuit Breaker Trip Voltage VCB = VSENSEP – VSENSEN ISEL = 0, VSENSEP = VCC ISEL = Floated, VSENSEP = VCC ISEL = VCC, VSENSEP = VCC ● ● ● 22.5 45 90 25 50 100 27.5 55 110 mV mV mV VCB(FAST) Fast Circuit Breaker Trip Voltage VCB(FAST) = VSENSEP – VSENSEN ISEL = 0, VSENSEP = VCC ISEL = Floated, VSENSEP = VCC ISEL = VCC, VSENSEP = VCC ● ● ● 63 126 252 100 175 325 115 200 371 mV mV mV IGATE(UP) GATE Pin Pull Up Current VGATE = 0V ● –50 –100 –150 µA IGATE(DN) GATE Pin Pull Down Current ∆VSENSEP – VSENSEN = 200mV, VGATE = 8V ● 10 40 ∆VGSMAX External N-Channel Gate Drive VSENSEN = 0, VCC ≥ 2.97V, IGATE = –1µA VSENSEN = 0, VCC = 2.3V, IGATE = –1µA ● ● 4.8 2.65 6.5 4.3 8 8 V V ∆VGSARM VGS Voltage to Arm Circuit Breaker VSENSEN = 0, VCC ≥ 2.97V VSENSEN = 0, VCC = 2.3V ● ● 4.4 2.5 5.4 3.5 7.6 7 V V mA 4213f 2 LTC4213 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 5V, ISEL = 0 unless otherwise noted. (Note 2) SYMBOL PARAMETER CONDITIONS ∆VGSMAX – ∆VGSARM Difference Between ∆VGSMAX and ∆VGSARM VSENSEN = 0, VCC ≥ 2.97V VSENSEN = 0, VCC = 2.3V ● ● VREADY(OL) READY Pin Output Low Voltage IREADY = 1.6mA, Pull Down Device On ● 0.2 0.4 V IREADY(LEAK) READY Pin Leakage Current VREADY = 5V, Pull Down Device Off ● 0 ±1 µA VON(TH) ON Pin High Threshold ON Rising, GATE Pulls Up ● 0.76 0.8 0.84 V ∆VON(HYST) ON Pin Hysteresis ON Falling, GATE Pulls Down 10 40 90 VON(RST) ON Pin Reset Threshold ON Falling, Fault Reset, GATE Pull Down ● 0.36 0.4 0.44 V ION(IN) ON Pin Input Current VON = 1.2V ● 0 ±1 µA ∆VOV Overvoltage Threshold ∆VOV = VSENSEP – VCC 0.41 0.7 1.1 V tOV Overvoltage Protection Trip Time VSENSEP = VSENSEN = Step 5V to 6.2V 25 65 160 µs tFAULT(SLOW) VCB Trips to GATE Discharging ∆VSENSE Step 0mV to 50mV, VSENSEN Falling, VCC = VSENSEP = 5V ● 7 16 27 µs tFAULT(FAST) VCB(FAST) Trips to GATE Discharging ∆VSENSE Step 0V to 0.3V, VSENSEN Falling, VSENSEP = 5V ● 1 2.5 µs tDEBOUNCE Startup De-Bounce Time VON = 0V to 2V Step to Gate Rising, (Exiting Reset Mode) 27 60 130 µs tREADY READY Delay Time VGATE = 0V to 8V Step to READY Rising, VSENSEP = VSENSEN = 0 22 50 115 µs tOFF Turn-Off Time VON = 2V to 0.6V Step to GATE Discharging 1.5 5 10 µs tON Turn-On Time VON = 0.6V to 2V Step to GATE Rising, (Normal Mode) 4 8 16 µs tRESET Reset Time VON Step 2V to 0V 20 80 150 µs ● Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. MIN TYP 0.3 0.15 1.1 0.8 MAX UNITS V V mV Note 2: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to ground unless otherwise specified. 4213f 3 LTC4213 U W TYPICAL PERFOR A CE CHARACTERISTICS unless otherwise noted. ICC vs Temperature 3.0 2.5 2.5 2.0 1.5 1.0 0.5 0 2.0 2.5 3.0 3.5 4.0 4.5 5.0 BIAS SUPPLY VOLTAGE (V) 5.5 2.0 1.5 1.0 0.5 0 –50 6.0 –25 75 25 0 50 TEMPERATURE (°C) 100 2.2 2.1 VCC RISING 2.0 Normalized VCB vs VCC 1.8 1.7 –50 125 1.04 1.04 1.04 0.96 NORMALIZED VCB(FAST) 1.06 NORMALIZED VCB 1.06 0.98 1.02 1.00 0.98 0.96 0.94 2.0 2.5 3.0 3.5 4.0 4.5 5.0 BIAS SUPPLY VOLTAGE (V) 5.5 6.0 75 0 50 25 TEMPERATURE (°C) 100 1.02 1.00 0.98 0.96 0.94 –50 –25 75 0 50 25 TEMPERATURE (°C) 4213 G04 100 125 0.94 2.0 2.5 3.0 3.5 4.0 4.5 5.0 BIAS SUPPLY VOLTAGE (V) 4213 G05 Normalized VCB(FAST) vs Temperature 5.5 6.0 4213 G06 IGATE(UP) vs VCC 1.06 125 Normalized VCB(FAST) vs VCC 1.06 1.00 –25 4213 G03 Normalized VCB vs Temperature 1.02 VCC FALLING 1.9 4213 G02 4213 G01 NORMALIZED VCB VCC(UVLR) vs Temperature 2.3 UNDERVOLTAGE LOCKOUT THRESHOLD (V) 3.0 BIAS SUPPLY CURRENT (mA) BIAS SUPPLY CURRENT (mA) ICC vs VCC Specifications are at TA = 25°C. VCC = 5V IGATE(UP) vs Temperature 104 104 102 102 1.00 0.98 IGATE(UP) (µA) 1.02 IGATE(UP) (µA) NORMALIZED VCB(FAST) 1.04 100 98 100 98 0.96 0.94 –50 –25 75 0 50 25 TEMPERATURE (°C) 100 125 4213 G07 96 2.0 2.5 3.0 3.5 4.0 4.5 5.0 BIAS SUPPLY VOLTAGE (V) 5.5 6.0 4213 G08 96 –50 –25 75 0 25 50 TEMPERATURE (°C) 100 125 4213 G09 4213f 4 LTC4213 U W TYPICAL PERFOR A CE CHARACTERISTICS unless otherwise noted. ∆VGSMAX and ∆VGSARM vs Temperature ∆VGSMAX and ∆VGSARM vs VCC 8 ∆VGSMAX (FOR 5VCC) ∆VGSARM 6 5 4 3 2.0 2.5 3.0 3.5 4.0 4.5 5.0 BIAS SUPPLY VOLTAGE (V) 5.5 0.85 7 ∆VGSARM (FOR 5VCC) 6 5 ∆VGSMAX (FOR 2.5VCC) ∆VGSARM (FOR 2.5VCC) –25 75 0 25 50 TEMPERATURE (°C) 100 4213 G10 LOW THRESHOLD 0.75 0.65 2.0 125 1.0 LOW THRESHOLD 0.75 0.70 –25 100 75 0 50 25 TEMPERATURE (°C) 125 0.72 0.70 0.68 0.66 2.0 2.5 3.0 3.5 4.0 4.5 5.0 BIAS SUPPLY VOLTAGE (V) 100 80 80 tDEBOUNCE tREADY 40 20 3.0 3.5 4.0 4.5 5.0 BIAS SUPPLY VOLTAGE (V) 5.5 6.0 4213 G16 tDEBOUNCE AND tREADY (µs) 100 2.5 0.8 0.7 0.6 0.5 0.4 –50 6.0 –25 75 0 25 50 TEMPERATURE (°C) 100 125 4213 G15 tDEBOUNCE and tREADY vs Temperature tDEBOUNCE and tREADY vs VCC 0 2.0 0.9 4213 G14 4213 G13 60 5.5 tRESET vs VCC 120 100 60 tDEBOUNCE 40 tREADY 80 tRESET (µs) 0.65 –50 OVERVOLTAGE THRESHOLD (V) OVERVOLTAGE THRESHOLD (V) HIGH THRESHOLD 6.0 5.5 ∆VOV vs Temperature 0.74 0.90 0.80 3.0 3.5 4.0 4.5 5.0 BIAS SUPPLY VOLTAGE (V) 4213 G12 ∆VOV vs VCC 0.85 2.5 4213 G11 VON(TH) vs Temperature ON PIN THRESHOLD (V) HIGH THRESHOLD 0.80 0.70 4 3 –50 6.0 ON PIN THRESHOLD (V) 7 ∆VGSMAX AND ∆VGSARM (V) ∆VGSMAX AND ∆VGSARM (V) VON(TH) vs VCC 0.90 8 ∆VGSMAX tDEBOUNCE AND tREADY (µs) Specifications are at TA = 25°C. VCC = 5V 60 40 20 0 –50 20 –25 75 0 50 25 TEMPERATURE (°C) 100 125 4213 G17 0 2.0 2.5 3.0 3.5 4.0 4.5 5.0 BIAS SUPPLY VOLTAGE (V) 5.5 6.0 4213 G18 4213f 5 LTC4213 U W TYPICAL PERFOR A CE CHARACTERISTICS Specifications are at TA = 25°C. VCC = 5V unless otherwise noted. tRESET vs Temperature tFAULT(SLOW) vs VCC 100 tFAULT(SLOW) vs Temperature 22 22 20 20 80 tFAULT(SLOW) (µs) tFAULT(SLOW) (µs) tRESET (µs) 90 18 16 14 18 16 14 70 12 60 –50 –25 75 0 50 25 TEMPERATURE (°C) 100 125 12 10 2.0 2.5 3.0 3.5 4.0 4.5 5.0 BIAS SUPPLY VOLTAGE (V) 5.5 4213 G19 75 0 50 25 TEMPERATURE (°C) –25 100 125 4213 G21 tFAULT(FAST) vs Temperature 1.3 1.3 1.2 1.2 1.1 1.1 tFAULT(FAST) (µs) tFAULT(FAST) (µs) 10 –50 4213 G20 tFAULT(FAST) vs VCC 1.0 0.9 0.8 0.7 2.0 6.0 1.0 0.9 0.8 2.5 3.0 3.5 4.0 4.5 5.0 BIAS SUPPLY VOLTAGE (V) 5.5 6.0 4213 G22 0.7 –50 –25 75 0 25 50 TEMPERATURE (°C) 100 125 4213 G23 4213f 6 LTC4213 U U U PI FU CTIO S READY (Pin 1): READY Status Output. Open drain output that goes high impedance when the external MOSFET is on and the circuit breaker is armed. Otherwise this pin pulls low. ON (Pin 2): ON Control Input. The LTC4213 is in reset mode when the ON pin is below 0.4V. When the ON pin increases above 0.8V, the device starts up and the GATE pulls up with a 100µA current source. When the ON pin drops below 0.76V, the GATE pulls down. To reset a circuit breaker fault, the ON pin must go below 0.4V. ISEL (Pin 3): Threshold Select Input. With the ISEL pin grounded, float or tied to VCC the VCB is set to 25mV, 50mV or 100mV, respectively. The corresponding VCB(FAST) values are 100mV, 175mV and 325mV. GND (Pin 4): Device Ground. GATE (Pin 5): GATE Drive Output. An internal charge pump supplies 100µA pull-up current to the gate of the external N-channel MOSFET. Internal circuitry limits the voltage between the GATE and SENSEN pins to a safe gate drive voltage of less than 8V. When the circuit breaker trips, the GATE pin abruptly pulls to GND. SENSEN (Pin 6): Circuit Breaker Negative Sense Input. Connect this pin to the source of the external MOSFET. During reset or fault mode, the SENSEN pin discharges the output to ground with 280µA. SENSEP (Pin 7): Circuit Breaker Positive Sense Input. Connect this pin to the drain of external N-channel MOSFET. The circuit breaker trips when the voltage across SENSEP and SENSEN exceeds VCB. The input common mode range of the circuit breaker is from ground to VCC + 0.2V when VCC < 2.5V. For VCC ≥ 2.5V, the input common mode range is from ground to VCC + 0.4V. VCC (Pin 8): Bias Supply Voltage Input. Normal operation is between 2.3V and 6V. An internal under-voltage lockout circuit disables the device when VCC < 2.07V. Exposed Pad (Pin 9): Exposed pad may be left open or connected to device ground. 4213f 7 LTC4213 W BLOCK DIAGRA + – VCB(FAST) VCB + – SLOWCOMP 8 + – + – + VCB VCB(FAST) 100mV 325mV 50mV 175mV 25mV 100mV SENSEN – 3 6 + ISEL 7 FASTCOMP VCC 16µs DELAY 1µs DELAY CB TRIPS 1 CB TRIPS VCC OVCOMP CHARGE PUMP 280µA READY VCC 0.7V – SENSEP RESET OR FAULT MODE 65µs DELAY BLANK 100µA OV TRIPS GATE ON GATE 5 LOGIC 50µs DELAY 6.5V CLAMP CIRCUIT + ARM RESET STARTUP NORMAL MODE GATE ON/OFF ARM COMP – +– VGSARM 80µs DELAY – COMP1 0.4V + 60µs DELAY UV COMP + – VCC 2.07V 2 ON 8µs 5µs DELAY + COMP2 GATEOFF SENSEN – 0.8V 4 GND 4213 BD 4213f 8 LTC4213 W UW TI I G DIAGRA 1 2 3 4 5 VON(TH) 6 VON(TH) VON(TH) – VON(HYST) VON VGSMAX VGSMAX – 0.3V VGATE 0.3V 0.3V tDEBOUNCE 1 tOFF 2 3 tON 4 5 1.2V ∆VSENSE VGATE VGSMAX VGSMAX – 0.3V 0.3V VON VON(TH) VON(RST) 4213 TD tFAULT(FAST) tRESET 4213f 9 LTC4213 U OPERATIO Overview The LTC4213 is an Electronic Circuit Breaker (ECB) that senses load current with the the RDSON of the external MOSFET instead of using an external sense resistor. This no RSENSE method is less precise than RSENSE method due to the variation of RDSON. However, the advantages are less complex, lower cost and reduce voltage and power loss in the switch path owing to the absence of a sense resistor. Without the external sense resistor voltage drop, the VOUT improvement can be quite significant especially in the low voltage applications. The LTC4213 is designed to operate over a bias supply range from 2.3V to 6V. When bias supply voltage and the ON pin are sufficiently high, the GATE pin starts charging after an internal debounce delay of 60µs. During the GATE ramp-up, the circuit breaker is not armed until the external MOSFET is fully turned on. Once the circuit breaker is armed, the LTC4213 monitors the load current through the RDSON of the external MOSFET. Circuit Breaker Function The LTC4213 provides dual level and dual response time circuit breaker functions for overcurrent protection. The LTC4213 circuit breaker function block consists of two comparators, SLOWCOMP and FASTCOMP. The thresholds of SLOWCOMP and FASTCOMP are VCB and VCB(FAST). The ISEL pin selects one of the three settings: 1. VCB = 25mV and VCB(FAST) = 100mV with ISEL at GND 2. VCB = 50mV and VCB(FAST) = 175mV with ISEL floating 3. VCB = 100mV and VCB(FAST) = 325mV with ISEL at VCC ISEL can be stepped dynamically, such as to allow a higher circuit breaker threshold at startup and a lower threshold after supply current has settled. The inputs of the comparators are SENSEP and SENSEN pins. The voltage across the drain and source of the external MOSFET is sensed at SENSEP and SENSEN. ∆VSENSE = VSENSEP − VSENSEN (1) When ∆VSENSE exceeds the VCB threshold but is less than VCB(FAST), the comparator SLOWCOMP trips the circuit breaker after a 16µs delay. If ∆VSENSE is greater than VCB(FAST), the comparator FASTCOMP trips the circuit breaker in 1µs. A severe short circuit condition can cause the load supply to dip substantially. This does not pose a problem for the LTC4213 as the input stages of the current limit comparators are common mode to ground. U U W U APPLICATIO S I FOR ATIO Figure 1 shows an electronic circuit breaker (ECB) application. An external auxiliary supply biases the VCC pin and the internal circuitry. A VIN load supply powers the load via an external MOSFET. The SENSEP and SENSEN pins Q1 SI4864DY VIN 1.25V CIN 100µF VBIAS 2.5V OFF ON + CLOAD 100µF VCC SENSEP GATE SENSEN C1 0.1µF LTC4213 ON GND ISEL VOUT 1.25V 3.5A + VCC R4 10k READY 4213 F01 sense the load current at the drain and source of the external MOSFET. In ECB applications, large input bypass capacitors are usually recommended for good transient performance. Undervoltage Lockout An internal undervoltage lockout (UVLO) circuit resets the LTC4213 if the VCC supply is too low for normal operation. The UVLO comparator (UVCOMP) has a low-to-high threshold of 2.07V and 100mV of hysteresis. UVLO shares the glitch filters for both low-to-high transition (startup) and high-to-low transition (reset) with the ON pin comparators. Above 2.07V bias supply voltage, the LTC4213 starts if the ON pin conditions are met. Short, shallow bus bias Figure 1. LTC4213 Electronic Circuit Breaker Application 4213f 10 LTC4213 U W U U APPLICATIO S I FOR ATIO supply transient dips below 1.97V of less than 80µs are ignored. ON Function When VON is below comparator COMP1’s threshold of 0.4V for 80µs, the device resets. The system leaves reset mode if the ON pin rises above comparator COMP2’s threshold of 0.8V and the UVLO condition is met. Leaving reset mode, the GATE pin starts up after a tDEBOUNCE delay of 60µs. When ON goes below 0.76V, the GATE shuts off after a 5µs glitch filter delay. The output is discharged by the external load when VON is in between 0.4V to 0.8V. At this state, the ON pin can re-enable the GATE if VON exceeds 0.8V for more than 8µs. Alternatively, the device resets if the ON pin is brought below 0.4V for 80µs. Once reset, the GATE pin restarts only after the tDEBOUNCE 60µs delay at VON rising above 0.8V. To protect the ON pin from overvoltage stress due to supply transients, a series resistor of greater than 10k is recommended when the ON pin is connected directly to the supply. An external resistive divider at the ON pin can be used with COMP2 to set a supply undervoltage lockout value higher than the internal UVLO circuit. An RC filter can be implemented at the ON pin to increase the powerup delay time beyond the internal 60µs delay. Gate Function The GATE pin is held low in reset mode. 60µs after leaving reset mode, the GATE pin is charged up by an internal 100µA current source. The circuit breaker arms when VGATE > VSENSEN + ∆VGSARM. In normal mode operation, the GATE peak voltage is internally clamped to ∆VGSMAX above the SENSEN pin. When the circuit breaker trips, an internal MOSFET shorts the GATE pin to GND, turning off the external MOSFET. READY Status The READY pin is held low during reset and at startup. It is pulled high by an external pullup resistor 50µs after the circuit breaker arms. The READY pin pulls low if the circuit breaker trips or the ON pin is pulled below 0.76V, or VCC drops below undervoltage lockout. ∆VGSARM and VGSMAX Each MOSFET has a recommended VGS drive voltage where the channel is deemed fully enhanced and RDSON is minimized. Driving beyond this recommended VGS voltage yields a marginal decrease in RDSON. At startup, the gate voltage starts at ground potential. The GATE ramps past the MOSFET threshold and the load current begins to flow. When VGS exceeds ∆VGSARM, the circuit breaker is armed and enabled. The chosen MOSFET should have a recommended minimum VGS drive level that is lower than ∆VGSARM. Finally, VGS reaches a maximum at ∆VGSMAX. Trip and Reset Circuit Breaker Figure 2 shows the timing diagram of VGATE and VREADY after a fault condition. A tripped circuit breaker can be reset either by cycling the VCC bias supply below UVLO threshold or pulling ON below 0.4V for >tRESET. Figure 3 shows the timing diagram for a tripped circuit breaker being reset by the ON pin. Calculating Current Limit The fault current limit is determined by the RDSON of the MOSFET and the circuit breaker voltage VCB. ILIMIT = VCB RDSON (2) The RDSON value depends on the manufacturer’s distribution, VGS and junction temperature. Short Kelvin-sense connections between the MOSFET drain and source to the LTC4213 SENSEP and SENSEN pins are strongly recommended. For a selected MOSFET, the nominal load limit current is given by: ILIMIT (NOM) = VCB(NOM) RDSON(NOM) (3) The minimum load limit current is given by: ILIMIT (MIN) = VCB(MIN) RDSON(MAX) (4) 4213f 11 LTC4213 U W U U APPLICATIO S I FOR ATIO The maximum load limit current is given by: ILIMIT (MAX) = Example Current Limit Calculation VCB(MAX) RDSON(MIN) (5) Most MOSFET data sheets have an RDSON specification with typical and maximum values but no minimum value. Assuming a normal distribution with typical as mean, the minimum value can be estimated as RDSON(MIN) = 2 • RDSON(NOM) − RDSON(MAX) (6) The LTC4213 gives higher gate drive than the manufacturer specified gate drive for RDSON. This gives a slightly lower RDSON than specified. Operating temperature also modulates the RDSON value. An Si4410DY is used for current detection in a 5V supply system with the LTC4213 VCB at 25mV (ISEL pin grounded). The RDSON distribution for the Si4410DY is Typical RDSON = 0.015Ω = 100% Maximum RDSON = 0.02Ω = 133.3% Estimated MIN RDSON = 2 • 15 – 20 = 0.010Ω = 66.7% The RDSON variation due to gate drive is RDSON @ 4.5VGS = 0.015Ω = 100% (spec. TYP) RDSON @ 4.8VGS = 0.014Ω = 93% (MIN ∆VGSMAX) RDSON @ 7VGS = 0.0123Ω = 82% (NOM ∆VGSMAX) RDSON @ 8VGS = 0.012Ω = 80% (MAX ∆VGSMAX) CIRCUIT BREAKER TRIPS GATE AND READY PINS PULL LOW SHORT CIRCUIT A B >VCB VCB ∆VSENSE CB TRIPS VGATE VREADY tFAULT 4213 F02 Figure 2. Short Circuit Fault Timing Diagram 4213f 12 LTC4213 U U W U APPLICATIO S I FOR ATIO CIRCUIT BREAKER TRIPS GATE AND READY PINS PULL LOW SHORT CIRCUIT NOT RESET RESET REINITIALIZE RESTART VCC > 2.07V 1 2 3 4 5 67 8 VON 0.8V 0.76V 0.4V 0V >VCB VCB ∆VSENSE tFAULT CB TRIPS VGATE VREADY VON < 0.4V DURATION > tRESET NORMAL MODE FAULT LATCHED OFF tDEBOUNCE STARTUP CYCLE 4213 F03 Figure 3. Resetting Fault Timing Diagram 4213f 13 LTC4213 U W U U APPLICATIO S I FOR ATIO Table 1. Nominal Operating ∆VGSMAX for Typical Bias Supply Voltage Operating temperature of 0° to 70°C. RDSON @ 25°C = 100% VCC (V) ∆VGSMAX (V) RDSON @ 0°C = 90% 2.3 4.3 RDSON @ 70°C = 120% 2.5 5.0 2.7 5.6 3.0 6.5 3.3 7.0 5.0 7.0 6.0 7.0 MOSFET resistance variation: RDSON(NOM) = 15m • 0.82 = 12.3mΩ RDSON(MAX) = 15m • 1.333 • 0.93 • 1.2 = 15m • 1.488 = 22.3mΩ RDSON(MIN) = 15m • 0.667 • 0.80 • 0.90 = 15m • 0.480 = 7.2mΩ VCB variation: NOM VCB = 25mV = 100% MIN VCB = 22.5mV = 90% MAX VCB = 27.5mV = 110% The current limits are: ILIMIT(NOM) = 25mV/12.3mΩ = 2.03A ILIMIT(MIN) = 22.5mV/22.3mΩ = 1.01A ILIMIT(MAX) = 27.5mV/7.2mΩ = 3.82A For proper operation, the minimum current limit must exceed the circuit maximum operating load current with margin. So this system is suitable for operating load current up to 1A. From this calculation, we can start with the general rule for MOSFET RDSON by assuming maximum operating load current is roughly half of the ILIMIT(NOM). Equation 7 shows the rule of thumb. IOPMAX = VCB(NOM) 2 • RDSON(NOM) (7) Note that the RDSON(NOM) is at the LTC4213 nominal operating ∆VGSMAX rather than at typical vendor spec. Table 1 gives the nominal operating ∆VGSMAX at the various operating VCC. From this table users can refer to the MOSFET’s data sheet to obtain the RDSON(NOM) value. Load Supply Power-Up after Circuit Breaker Armed Figure 4 shows a normal power-up sequence for the circuit in Figure 1 where the VIN load supply power-up after circuit breaker is armed. VCC is first powered up by an auxiliary bias supply. VCC rises above 2.07V at time point 1. VON exceeds 0.8V at time point 2. After a 60µs debounce delay, the GATE pin starts ramping up at time point 3. The external MOSFET starts conducting at time point 4. At time point 5, VGATE exceed ∆VGSARM and the circuit breaker is armed. After 50µs (tREADY delay), READY pulls high by an external resistor at time point 6. READY signals the VIN load supply module to start its ramp. The load supply begins soft-start ramp at time point 7. The load supply ramp rate must be slow to prevent circuit breaker tripping as in equation (8). ∆VIN IOPMAX − ILOAD < ∆t C LOAD (8) Where IOPMAX is the maximum operating current defined by equation 7. For illustration, VCB = 25mV and RDSON = 3.5mΩ at the nominal operating ∆VGSMAX. The maximum operating current is 3.5A (refer to equation 7). Assuming the load can draw a current of 2A at power-up, there is a margin of 1.5A available for CLOAD of 100µF and VIN ramp rate should be <15V/ms. At time point 8, the current through the MOSFET reduces after CLOAD is fully charged. 4213f 14 LTC4213 U U W U APPLICATIO S I FOR ATIO CIRCUIT BREAKER ARMS 1 2 3 4 5 6 7 8 2.07V 0.8V VCC, VON ∆VGSMAX + VSENSEN ∆VGSMAX ∆VGSARM Vth VGATE 100µA VSENSEP, VSENSEN VREADY VCB ∆VSENSE RESET MODE tDEBOUNCE STARTUP CYCLE tREADY NORMAL CYCLE 4213 F04 Figure 4. Load Supply Power-Up After Circuit Breaker Armed 4213f 15 LTC4213 U U W U APPLICATIO S I FOR ATIO Load Supply Power-Up Before VCC Referring back to Figure 1, the VIN load supply can also be powered up before VCC. Figure 5 shows the timing diagram with the VIN load supply active initially. An internal circuit ensures that the GATE pin is held low. At time point 1, VCC clears UVLO and at time point 2, ON clears 0.8V. 60µs later at time point 3, the GATE is ramped up with 100µA. At time point 4, GATE reaches the external MOSFET threshold VTH and VOUT starts to ramp up. At time point 5, VSENSEN is near its peak. At time point 6, the circuit breaker is armed and the circuit breaker can trip if ∆VSENSE > VCB. At time point 7, the GATE voltage peaks. 50µs after time point 6, READY goes HIGH. Startup Problems There is no current limit monitoring during output charging for the figure 5 power-up sequence where the load supply is powered up before VCC. This is because the GATE voltage is below ∆VGSARM and the MOSFET may not reach the specified RDSON. The VIN load supply should have sufficient capability to handle the inrush as the output charges up. For proper startup, the final load at time CIRCUIT BREAKER ARMS VSENSEP – VSENSEN = VCB VGATE MAXES OUT READY SIGNALS 0 1 2 3 4 5 6 7 8 VCC > 2.07V VON > 0.8V VCC, VON ∆VGSMAX + VSENSEN ∆VGSARM + VSENSEN Vth VGATE VSENSEP VSENSEN VREADY tREADY RESET MODE tDEBOUNCE STARTUP CYCLE NORMAL CYCLE 4213 F05 Figure 5. Load Supply Power-Up Before VCC 4213f 16 LTC4213 U W U U APPLICATIO S I FOR ATIO point 6 should be within the circuit breaker limits. Otherwise, the system fails to start and the circuit breaker trips immediately after arming. In most applications additional external gate capacitance is not required unless CLOAD is large and startup becomes problematic. If an external gate capacitor is employed, its capacitance value should not be excessive unless it is used with a series resistor. This is because a big gate capacitor without resistor slows down the GATE turn off during a fault. An alternative method would be a stepped ISEL pin to allow a higher current limit during startup. In the event of output short circuit or a severe overload, the load supply can collapse during GATE ramp up due to load supply current limit. The chosen MOSFET must withstand this possible brief short circuit condition before time point 6 where the circuit breaker is allowed to trip. Bench short circuit evaluation is a practical verification of a reliable design. To have current limit while powering a MOSFET into short circuit conditions, it is preferred that the load supply sequences to turn on after the circuit breaker is armed as described in an earlier section. Power-Off Cycle The system can be powered off by toggling the ON pin low. When ON is brought below 0.76V for 5µs, the GATE and READY pins are pulled low. The system resets when ON is brought below 0.4V for 80µs. MOSFET Selection The LTC4213 is designed to be used with logic (5V) and sub-logic (3V) MOSFETs for VCC potentials above 2.97V with ∆VGSMAX exceeding 4.5V. For a VCC supply range between 2.3V and 2.97V, sub-logic MOSFETs should be used as the minimum ∆VGSMAX is less than 4.5V. The selected MOSFET VGS absolute maximum rating should meet the LTC4213 maximum ∆VGSMAX of 8V. Other MOSFET criteria such as VBDSS, IDMAX, and RDSON should be reviewed. Spikes and ringing above maximum operating voltage should be considered when choosing VBDSS. IDMAX should be greater than the current limit. The maximum operating load current is determined by the RDSON value. See the section on “Calculating Current Limit” for details. Supply Requirements The LTC4213 can be powered from a single supply or dual supply system. The load supply is connected to the SENSEP pin and the drain of the external MOSFET. In the single supply case, the VCC pin is connected to the load supply, preferably with an RC filter. With dual supplies, VCC is connected to an auxiliary bias supply VAUX where VAUX voltage should be greater or equal to the load supply voltage. The load supply voltage must be capable of sourcing more current than the circuit breaker limit. If the load supply current limit is below the circuit breaker trip current, the LTC4213 may not react when the output overloads. Furthermore, output overloads may trigger UVLO if the load supply has foldback current limit in a single supply system. VIN Transient and Overvoltage Protection Input transient spikes are commonly observed whenever the LTC4213 responds to overload. These spikes can be large in amplitude, especially given that large decoupling capacitors are absent in hot swap environments. These short spikes can be clipped with a transient suppressor of adequate voltage and power rating. In addition, the LTC4213 can detect a prolonged overvoltage condition. When 4213f 17 LTC4213 U U W U APPLICATIO S I FOR ATIO SENSEP exceeds VCC + 0.7V for more than 65µs, the LTC4213’s internal overvoltage protection circuit activates and the GATE pin pulls down and turns off the external MOSFET. Typical Single Supply Hot Swap™ Application A typical single supply Hot Swap application is shown in Figure 7. The RESET signal at the backplane is held low initially. When the PCB long edge makes contact the ON pin is held low (<0.4V) and the LTC4213 is kept in reset mode. When the short edge makes contact the VIN load supply is connected to the card. The VCC is biased via the RC filter. The VOUT is pre-charged via R5. To power-up successfully, the R5 resistor value should be small enough to provide the load requirement and to overcome the 280µA current source sinking into the SENSEN pin. On the other hand, the R5 resistor value should be big enough avoiding big inrush current and preventing big short circuit current. When RESET signals high at backplane, C2 capacitor at the ON pin charges up via the R3/R2 resistive divider. When ON pin voltage exceeds 0.8V, the GATE pin begins to ramp up. When the GATE voltage peaks, the external MOSFET is fully turned on and the VIN-to-VOUT voltage drop reduces. In normal mode operation, the LTC4213 monitors the load current through the RDSON of the external MOSFET. Typical Electronic Fuse Application for a Single Supply System Figure 6 shows a single supply electronic fuse application. An RC filter at VCC pin filters out transient spikes. An optional Schottky diode can be added if severe VCC dips during a fault start-up condition is a concern. The use of the Schottky and RC filter combination is allowed if the load supply is above 2.9V and the total voltage drop towards the VCC pin is less than 0.4V. The LTC4213’s internal UVLO filter further rejects bias supply’s transients of less than tRESET. During power-up, it is good engineering practice to ensure that VCC is fully established before the ON pin enables the system at VON = 0.8V. In this application, the VCC voltage reached final value approximately after a 5.3 • R1 C1 delay. This is followed by the ON pin exceeding 0.8V after a 0.17 • R2C2 delay. The GATE pin starts up after an internal tDEBOUNCE delay. Q1 SI4410DY VIN 5V CIN 100µF + D1 MBRO520L R1 33Ω R3 324k R2 80.6k CLOAD 100µF LTC4213 GND ISEL VOUT 5V 1A + VCC SENSEP GATE SENSEN C1 10µF ON Q2 2N7002 RESET Hot Swap is a trademark of Linear Technology Corporation. VIN R4 10k READY C2 0.22µF 4213 F06 Figure 6. Single Supply Electronic Fuse 4213f 18 LTC4213 U PACKAGE DESCRIPTIO DDB Package 8-Lead Plastic DFN (3mm × 2mm) (Reference LTC DWG # 05-08-1702) 0.61 ±0.05 (2 SIDES) R = 0.115 TYP 5 0.56 ± 0.05 (2 SIDES) 3.00 ±0.10 (2 SIDES) 0.675 ±0.05 2.50 ±0.05 1.15 ±0.05 PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 2.20 ±0.05 (2 SIDES) PIN 1 BAR TOP MARK (SEE NOTE 6) 0.200 REF RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 0.38 ± 0.10 8 2.00 ±0.10 (2 SIDES) 0.75 ±0.05 0 – 0.05 4 0.25 ± 0.05 1 PIN 1 CHAMFER OF EXPOSED PAD (DDB8) DFN 1103 0.50 BSC 2.15 ±0.05 (2 SIDES) BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 4213f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LTC4213 U TYPICAL APPLICATIO VIN STAGGERED PCB EDGE CONNECTOR R5 330Ω Q1 IRF7455 VIN 3.3V R3 182k Zx SMAJ6.0A VOUT 3.3V 3.6A + CLOAD 100µF D1 BAT54ALT1 ON RESET R1 68Ω R2 80.6k C1 2.2µF SENSEP GATE C2 1µF SENSEN R4 10k LTC4213 READY VCC ISEL GND NC BACKPLANE GND 4213 TA02 CARD GND Figure 7. Single Supply Hot Board Insertion RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC1421 Dual Channel, Hot Swap™ Controller 24-Pin, Operates from 3V to 12V and Supports –12V LTC1422 Single Channel, Hot Swap Controller in SO-8 Operates from 2.7V to 12V, System Reset Output LTC1642 Fault Protected, Hot Swap Controller Operates up to 16.5V, Overvoltage Protection to 33V LTC1643AL/LTC1643AH PCI Hot Swap Controllers 3.3V, 5V and ±12V Supplies LTC1645 Dual Channel Hot Swap Controller Operates from 1.2V to 12V, Power Sequencing LTC1647 Dual Channel, Hot Swap Controller Operates from 2.7V to 16.5V LTC4210 Single Channel, Hot Swap Controller in SOT-23 Operates from 2.7V to 16.5V, Multifunction Current Control LTC4211 Single Channel, Hot Swap Controller in MSOP 2.5V to 16.5V, Multifunction Current Control LTC4216 Ultra Low Voltage Hot Swap Controller Operates from 2.7V to 16.5V, Multifunction Current LTC4221 Dual Channel, Hot Swap Controller Protects Load Voltages from 0V to 6V LTC4230 Triple Channel, Hot Swap Controller 1.7V to 16.5V, Multifunction Current Control LTC4251 –48V Hot Swap Controller in S0T-23 –48V Hot Swap Controller, Active Current Limiting LTC4252 –48V Hot Swap Controller in MSOP Active Current Limiting with Drain Acceleration LTC4253 –48V Hot Swap Controller and Sequencer Active Current Limiting with Drain Acceleration and Three Sequenced Power Good Outputs 4213f 20 Linear Technology Corporation LT/TP 0405 500 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2005