ON MC74ACT245DT Octal bidirectional transceiver with 3-state inputs/output Datasheet

MC74AC245, MC74ACT245
Octal Bidirectional
Transceiver with 3-State
Inputs/Outputs
The MC74AC245/74ACT245 contains eight non–inverting
bidirectional buffers with 3–state outputs and is intended for
bus–oriented applications. Current sinking capability is 24 mA at both
the A and B ports. The Transmit/Receive (T/R) input determines the
direction of data flow through the bidirectional transceiver. Transmit
(active–HIGH) enables data from A ports to B ports; Receive
(active–LOW) enables data from B ports to A ports. The Output
Enable input, when HIGH, disables both A and B ports by placing
them in a High Z condition.
•
•
•
•
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PDIP–20
N SUFFIX
CASE 738
20
1
SO–20
DW SUFFIX
CASE 751
20
Noninverting Buffers
Bidirectional Data Path
A and B Outputs Source/Sink 24 mA
′ACT245 Has TTL Compatible Inputs
1
20
1
VCC
OE
B0
B1
B2
B3
B4
B5
B6
B7
20
19
18
17
16
15
14
13
12
11
TSSOP–20
DT SUFFIX
CASE 948E
EIAJ–20
M SUFFIX
CASE 967
20
1
ORDERING INFORMATION
1
2
3
4
T/R
A0
A1
A2
5
6
7
8
9
10
A3
A4
A5
A6
A7
GND
Figure 1.
PIN ASSIGNMENT
Device
Package
Shipping
MC74AC245N
PDIP–20
18 Units/Rail
MC74ACT245N
PDIP–20
18 Units/Rail
MC74AC245DW
SOIC–20
38 Units/Rail
MC74AC245DWR2
SOIC–20
1000 Tape & Reel
MC74ACT245DW
SOIC–20
38 Units/Rail
MC74ACT245DWR2
SOIC–20
1000 Tape & Reel
MC74AC245DT
TSSOP–20
75 Units/Rail
PIN
FUNCTION
OE
Output Enable Input
T/R
Transmit/Receive Input
A0–A7
Side A 3–State Inputs or 3–State Outputs
MC74AC245DTR2
TSSOP–20 2500 Tape & Reel
B0–B7
Side B 3–State Inputs or 3–State Outputs
MC74ACT245DT
TSSOP–20
MC74ACT245DTR2
TSSOP–20 2500 Tape & Reel
TRUTH TABLES
Inputs
O tp ts
Outputs
OE
T/R
L
L
H
L
H
X
Bus B Data to Bus A
Bus A Data to Bus B
High Z State
May, 2001 – Rev. 5
MC74AC245M
EIAJ–20
40 Units/Rail
MC74AC245MEL
EIAJ–20
2000 Tape & Reel
MC74ACT245M
EIAJ–20
40 Units/Rail
MC74ACT245MEL
EIAJ–20
2000 Tape & Reel
DEVICE MARKING INFORMATION
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
 Semiconductor Components Industries, LLC, 2001
75 Units/Rail
See general marking information in the device marking
section on page 6 of this data sheet.
1
Publication Order Number:
MC74AC245/D
MC74AC245, MC74ACT245
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
–0.5 to +7.0
V
DC Input Voltage (Referenced to GND)
–0.5 to VCC +0.5
V
VOUT
DC Output Voltage (Referenced to GND)
–0.5 to VCC +0.5
V
IIN
DC Input Current, per Pin
±20
mA
IOUT
DC Output Sink/Source Current, per Pin
±50
mA
ICC
DC VCC or GND Current per Output Pin
±50
mA
Tstg
Storage Temperature
–65 to +150
°C
VCC
DC Supply Voltage (Referenced to GND)
VIN
*Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the
Recommended Operating Conditions.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
VCC
Supply Voltage
VIN, VOUT
DC Input Voltage, Output Voltage (Ref. to GND)
tr, tf
Input Rise and Fall Time (Note 1)
′AC Devices except Schmitt Inputs
Min
Typ
Max
Unit
′AC
2.0
5.0
6.0
′ACT
4.5
5.0
5.5
0
–
VCC
VCC @ 3.0 V
–
150
–
VCC @ 4.5 V
–
40
–
VCC @ 5.5 V
–
25
–
VCC @ 4.5 V
–
10
–
VCC @ 5.5 V
–
8.0
–
–
–
140
°C
–40
25
85
°C
V
V
ns/V
tr, tf
In ut Rise and Fall Time (Note 2)
Input
′ACT Devices except Schmitt Inputs
TJ
Junction Temperature (PDIP)
TA
Operating Ambient Temperature Range
IOH
Output Current – High
–
–
–24
mA
IOL
Output Current – Low
–
–
24
mA
ns/V
1. VIN from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times.
2. VIN from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
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2
MC74AC245, MC74ACT245
DC CHARACTERISTICS
Symbol
Parameter
VCC
(V)
74AC
74AC
TA = +25°C
TA =
–40°C to
+85°C
Typ
VIH
VIL
VOH
VOL
Unit
Conditions
Guaranteed Limits
Minimum
u High
g Level
e e
Input Voltage
3.0
4.5
5.5
1.5
2.25
2.75
2.1
3.15
3.85
2.1
3.15
3.85
V
VOUT = 0.1 V
or VCC – 0.1 V
Maximum
a
u Low
o Level
e e
Input Voltage
3.0
4.5
5.5
1.5
2.25
2.75
0.9
1.35
1.65
0.9
1.35
1.65
V
VOUT = 0.1 V
or VCC – 0.1 V
Minimum
u High
g Level
e e
Output Voltage
3.0
4.5
5.5
2.99
4.49
5.49
2.9
4.4
5.4
2.9
4.4
5.4
V
3.0
4.5
5.5
–
–
–
2.56
3.86
4.86
2.46
3.76
4.76
3.0
4.5
5.5
0.002
0.001
0.001
0.1
0.1
0.1
0.1
0.1
0.1
3.0
4.5
5.5
–
–
–
0.36
0.36
0.36
0.44
0.44
0.44
Maximum
a
u Low
o Level
e e
Output Voltage
IOUT = –50 µA
V
*VIN = VIL or VIH
–12 mA
IOH
–24 mA
–24 mA
IOUT = 50 µA
V
V
*VIN = VIL or VIH
12 mA
IOL
24 mA
24 mA
IIN
Maximum
a
u Input
u
Leakage Current
55
5.5
–
±0 1
±0.1
±1 0
±1.0
µA
VI = VCC, GND
IOZT
Maximum
a
u
3-State
C
Current
5.5
–
±0.6
±6.0
µA
VI (OE) = VIL, VIH
VI = VCC, GND
VO = VCC, GND
5.5
–
–
75
mA
VOLD = 1.65 V Max
5.5
–
–
–75
mA
VOHD = 3.85 V Min
55
5.5
–
80
8.0
80 0
80.0
µA
VIN = VCC or GND
IOLD
IOHD
ICC
†Minimum Dynamic
O t t Current
Output
C
t
Maximum
a
u Quiescent
Qu esce
Supply Current
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
NOTE: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC.
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3
MC74AC245, MC74ACT245
AC CHARACTERISTICS (For Figures and Waveforms – See Section 3)
Symbol
VCC*
(V)
Parameter
74AC
74AC
TA = +25°C
CL = 50 pF
TA = –40°C
to +85°C
CL = 50 pF
Min
Typ
Max
Min
Max
Unit
Fig.
No.
tPLH
Propagation Delay
An to Bn or Bn to An
3.3
5.0
1.5
1.5
5.0
3.5
8.5
6.5
1.0
1.0
9.0
7.0
ns
3–5
tPHL
Propagation Delay
An to Bn or Bn to An
3.3
5.0
1.5
1.5
5.0
3.5
8.5
6.0
1.0
1.0
9.0
7.0
ns
3–5
tPZH
Output Enable Time
3.3
5.0
2.5
1.5
7.0
5.0
11.5
8.5
2.0
1.0
12.5
9.0
ns
3–7
tPZL
Output Enable Time
3.3
5.0
2.5
1.5
7.5
5.5
12.0
9.0
2.0
1.0
13.5
9.5
ns
3–8
tPHZ
Output Disable Time
3.3
5.0
2.0
1.5
6.5
5.5
12.0
9.0
1.0
1.0
12.5
10.0
ns
3–7
tPLZ
Output Disable Time
3.3
5.0
2.0
1.5
7.0
5.5
11.5
9.0
1.5
1.0
13.0
10.0
ns
3–8
*Voltage Range 3.3 V is 3.3 V ±0.3 V.
Voltage Range 5.0 V is 5.0 V ±0.5 V.
DC CHARACTERISTICS
Symbol
Parameter
VCC
(V)
74ACT
74ACT
TA = +25°C
TA =
–40°C to
+85°C
Typ
Guaranteed Limits
Unit
Conditions
VIH
Minimum
u High
g Level
e e
Input Voltage
4.5
5.5
1.5
1.5
2.0
2.0
2.0
2.0
V
VOUT = 0.1 V
or VCC – 0.1 V
VIL
Maximum
a
u Low
o Level
e e
Input Voltage
4.5
5.5
1.5
1.5
0.8
0.8
0.8
0.8
V
VOUT = 0.1 V
or VCC – 0.1 V
VOH
Minimum
u High
g Level
e e
Output Voltage
4.5
5.5
4.49
5.49
4.4
5.4
4.4
5.4
V
4.5
5.5
–
–
3.86
4.86
3.76
4.76
4.5
5.5
0.001
0.001
0.1
0.1
0.1
0.1
4.5
5.5
–
–
0.36
0.36
0.44
0.44
V
*VIN = VIL or VIH
24 mA
IOL
24 mA
VOL
Maximum
a
u Low
o Level
e e
Output Voltage
V
V
IOUT = –50 µA
*VIN = VIL or VIH
–24 mA
IOH
–24 mA
IOUT = 50 µA
IIN
Maximum
a
u Input
u
Leakage Current
55
5.5
–
±0 1
±0.1
±1 0
±1.0
µA
VI = VCC, GND
∆ICCT
Additional Max. ICC/Input
5.5
0.6
–
1.5
mA
VI = VCC – 2.1 V
IOZT
Maximum
a
u
3–State
C
Current
5.5
–
±0.6
±6.0
µA
VI (OE) = VIL, VIH
VI = VCC, GND
VO = VCC, GND
5.5
–
–
75
mA
VOLD = 1.65 V Max
5.5
–
–
–75
mA
VOHD = 3.85 V Min
55
5.5
–
80
8.0
80 0
80.0
µA
VIN = VCC or GND
IOLD
IOHD
ICC
†Minimum Dynamic
O t t Current
C
t
Output
Maximum Quiescent
Supply Current
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
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4
MC74AC245, MC74ACT245
AC CHARACTERISTICS (For Figures and Waveforms – See Section 3)
Symbol
tPLH
VCC*
(V)
Parameter
Pro agation Delay
Propagation
An to Bn or Bn to An
74ACT
74ACT
TA = +25°C
CL = 50 pF
TA = –40°C
to +85°C
CL = 50 pF
Unit
Fig.
No.
Min
Typ
Max
Min
Max
50
5.0
15
1.5
40
4.0
75
7.5
15
1.5
80
8.0
ns
3–5
50
5.0
15
1.5
40
4.0
80
8.0
10
1.0
90
9.0
ns
3–5
5.0
1.5
5.0
10
1.5
11.0
ns
3–7
tPZH
Propagation
Pro
agation Delay
An to Bn or Bn to An
Output Enable Time
tPZL
Output Enable Time
5.0
1.5
5.5
10
1.5
12.0
ns
3–8
tPHZ
Output Disable Time
5.0
1.5
5.5
10
1.0
11.0
ns
3–7
tPLZ
Output Disable Time
5.0
2.0
5.0
10
1.5
11.0
ns
3–8
tPHL
*Voltage Range 5.0 V is 5.0 V ±0.5 V.
CAPACITANCE
Symbol
Parameter
Value
Typ
Unit
Test Conditions
CIN
Input Capacitance
4.5
pF
VCC = 5.0 V
CI/O
Input/Output Capacitance
15
pF
VCC = 5.0 V
CPD
Power Dissipation Capacitance
45
pF
VCC = 5.0 V
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5
MC74AC245, MC74ACT245
MARKING DIAGRAMS
PDIP–20
SO–20
MC74AC245N
AWLYYWW
AC245
AWLYYWW
MC74ACT245N
AWLYYWW
ACT245
AWLYYWW
A
WL, L
YY, Y
WW, W
TSSOP–20
EIAJ–20
AC
245
ALYW
74AC245
AWLYWW
ACT
245
ALYW
74ACT245
AWLYWW
= Assembly Location
= Wafer Lot
= Year
= Work Week
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6
MC74AC245, MC74ACT245
PACKAGE DIMENSIONS
PDIP–20
N SUFFIX
20 PIN PLASTIC DIP PACKAGE
CASE 738–03
ISSUE E
–A–
20
11
1
10
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
B
L
C
–T–
K
SEATING
PLANE
M
N
E
G
F
J
D
20 PL
0.25 (0.010)
20 PL
0.25 (0.010)
M
T A
M
M
T B
M
DIM
A
B
C
D
E
F
G
J
K
L
M
N
INCHES
MIN
MAX
1.010
1.070
0.240
0.260
0.150
0.180
0.015
0.022
0.050 BSC
0.050
0.070
0.100 BSC
0.008
0.015
0.110
0.140
0.300 BSC
0
15 0.020
0.040
MILLIMETERS
MIN
MAX
25.66
27.17
6.10
6.60
3.81
4.57
0.39
0.55
1.27 BSC
1.27
1.77
2.54 BSC
0.21
0.38
2.80
3.55
7.62 BSC
0
15
0.51
1.01
SO–20
DW SUFFIX
20 PIN PLASTIC SOIC PACKAGE
CASE 751D–05
ISSUE F
A
20
X 45 h
1
10
20X
B
B
0.25
M
T A
S
B
S
A
L
H
M
E
0.25
10X
NOTES:
1. DIMENSIONS ARE IN MILLIMETERS.
2. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M, 1994.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION SHALL
BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT
MAXIMUM MATERIAL CONDITION.
11
B
M
D
18X
e
A1
SEATING
PLANE
C
T
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7
DIM
A
A1
B
C
D
E
e
H
h
L
MILLIMETERS
MIN
MAX
2.35
2.65
0.10
0.25
0.35
0.49
0.23
0.32
12.65
12.95
7.40
7.60
1.27 BSC
10.05
10.55
0.25
0.75
0.50
0.90
0
7
MC74AC245, MC74ACT245
PACKAGE DIMENSIONS
TSSOP–20
DT SUFFIX
20 PIN PLASTIC TSSOP PACKAGE
CASE 948E–02
ISSUE A
20X
0.15 (0.006) T U
2X
K REF
0.10 (0.004)
S
L/2
20
M
T U
V
S
S
K
K1
11
J J1
B
L
–U–
PIN 1
IDENT
ÍÍÍ
ÍÍÍ
ÍÍÍ
SECTION N–N
1
10
0.25 (0.010)
N
0.15 (0.006) T U
S
M
A
–V–
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS. MOLD
FLASH OR GATE BURRS SHALL NOT EXCEED
0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL NOT
EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE -W-.
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
N
F
DETAIL E
–W–
C
G
D
H
DETAIL E
0.100 (0.004)
–T– SEATING
MILLIMETERS
MIN
MAX
6.40
6.60
4.30
4.50
--1.20
0.05
0.15
0.50
0.75
0.65 BSC
0.27
0.37
0.09
0.20
0.09
0.16
0.19
0.30
0.19
0.25
6.40 BSC
0
8
INCHES
MIN
MAX
0.252
0.260
0.169
0.177
--0.047
0.002
0.006
0.020
0.030
0.026 BSC
0.011
0.015
0.004
0.008
0.004
0.006
0.007
0.012
0.007
0.010
0.252 BSC
0
8
PLANE
EIAJ–20
M SUFFIX
20 PIN PLASTIC EIAJ PACKAGE
CASE 967–01
ISSUE O
20
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE
MOLD FLASH OR PROTRUSIONS AND ARE
MEASURED AT THE PARTING LINE. MOLD FLASH
OR PROTRUSIONS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
LE
11
Q1
E HE
1
M
L
10
DETAIL P
Z
D
VIEW P
e
A
c
A1
b
0.13 (0.005)
M
0.10 (0.004)
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8
DIM
A
A1
b
c
D
E
e
HE
L
LE
M
Q1
Z
MILLIMETERS
MIN
MAX
--2.05
0.05
0.20
0.35
0.50
0.18
0.27
12.35
12.80
5.10
5.45
1.27 BSC
7.40
8.20
0.50
0.85
1.10
1.50
10 0
0.70
0.90
--0.81
INCHES
MIN
MAX
--0.081
0.002
0.008
0.014
0.020
0.007
0.011
0.486
0.504
0.201
0.215
0.050 BSC
0.291
0.323
0.020
0.033
0.043
0.059
10 0
0.028
0.035
--0.032
MC74AC245, MC74ACT245
Notes
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9
MC74AC245, MC74ACT245
Notes
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10
MC74AC245, MC74ACT245
Notes
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11
MC74AC245, MC74ACT245
ON Semiconductor and
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without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
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including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
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attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
Literature Fulfillment:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada
Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada
Email: [email protected]
JAPAN: ON Semiconductor, Japan Customer Focus Center
4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031
Phone: 81–3–5740–2700
Email: [email protected]
ON Semiconductor Website: http://onsemi.com
For additional information, please contact your local
Sales Representative.
N. American Technical Support: 800–282–9855 Toll Free USA/Canada
http://onsemi.com
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