MX23C3211 5 Volt 32-Mbit (4M x 8 / 2M x 16) Mask ROM with Page Mode FEATURES ORDER INFORMATION • Bit organization - 4M x 8 (byte mode) - 2M x 16 (word mode) • Fast access time - Random access: 100ns (max.) - Page access: 30ns (max.) • Page Size - 8 words per page • Current - Operating:60mA - Standby:50uA • Supply voltage - 5V±10% • Package - 44 pin SOP (500mil) - 48 pin TSOP (12mm x 20mm) Part No. 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 MX23C3211 (Reverse Tpye) 30ns 44 pin SOP MX23C3211MC-12 120ns 50ns 44 pin SOP MX23C3211TC-10 100ns 30ns 48 pin TSOP MX23C3211TC-12 120ns 50ns 48 pin TSOP MX23C3211RC-10 100ns 30ns 48 pin TSOP 50ns 48 pin TSOP (Reverse type) PIN DESCRIPTION Symbol A0~A20 D0~D14 D15/A-1 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 VSS VSS D15/A-1 D7 D14 D6 D13 D5 D12 D4 VCC VCC NC D11 D3 D10 D2 D9 D1 D8 D0 OE VSS VSS CE OE Byte VCC VSS NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Pin Function Address Inputs Data Outputs D15 (Word Mode)/ LSB Address (Byte Mode) Chip Enable Input Output Enable Input Word/ Byte Mode Selection Power Supply Pin Ground Pin No Connection 44 SOP NC A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE VSS OE D0 D8 D1 D9 D2 D10 D3 D11 48 TSOP (Reverse Type) VSS VSS D15/A-1 D7 D14 D6 D13 D5 D12 D4 VCC VCC NC D11 D3 D10 D2 D9 D1 D8 D0 OE VSS VSS MX23C3211MC-10 100ns BYTE A16 A15 A14 A13 A12 A11 A10 A9 A8 A19 VSS A20 A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE P/N:PM0258 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 MX23C3211 MX23C3211 (Normal Type) Time MX23C3211RC-12 120ns 48 TSOP (Normal Type) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Time (Reverse type) PIN CONFIGURATION BYTE A16 A15 A14 A13 A12 A11 A10 A9 A8 A19 VSS A20 A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE Access Page Access Package 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A20 A19 A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTE VSS D15/A-1 D7 D14 D6 D13 D5 D12 D4 VCC REV. 3.0,JUL. 17, 2001 1 MX23C3211 MODE SELECTION CE H L L L OE X H L L Byte X X H L D15/A-1 X X Output Input D0~D7 High Z High Z D0~D7 D0~D7 D8~D15 High Z High Z D8~D15 High Z Mode Word Byte Power Stand-by Active Active Active BLOCK DIAGRAM A0/(A-1) A2 A3 Address Buffer Memory Array Page Decoder Page Buffer Word/ Byte Output Buffer A20 D0 D15/(D7) CE BYTE OE ABSOLUTE MAXIMUM RATINGS Item Voltage on any Pin Relative to VSS Ambient Operating Temperature Storage Temperature Symbol VIN Topr Tstg Ratings -1.3V to VCC+2.0V (Note) 0°C to 70°C -65°C to 125°C Note: Minimum DC voltage on input or I/O pins is -0.5V. During voltage transitions, inputs may undershoot VSS to -1.3V for periods of up to 20ns. Maximum DC voltage on input or I/O pins is VCC+0.5V. During voltage transitions, input may overshoot VCC to VCC+2.0V for periods of up to 20ns. P/N:PM0258 REV. 3.0, JUL. 17, 2001 2 MX23C3211 DC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 5V±10%) Item Output High Voltage Output Low Voltage Input High Voltage Input Low Voltage Input Leakage Current Output Leakage Current Operating Current Standby Current (TTL) Standby Current (CMOS) Symbol VOH VOL VIH VIL ILI ILO ICC1 ISTB1 ISTB2 MIN. 2.4V 2.2V -0.3V - MAX. 0.4V VCC+0.3V 0.8V 5uA 5uA 60mA 1mA 50uA Conditions IOH = -1.0mA IOL = 2.1mA 0V, VCC 0V, VCC tRC = 100ns, all output open CE = VIH CE>VCC-0.2V Input Capacitance Output Capacitance CIN COUT - 10pF 10pF Ta = 25°C, f = 1MHZ Ta = 25°C, f = 1MHZ AC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 5V±10%) Item Symbol Read Cycle Time Address Access Time Chip Enable Access Time Page Mode Access Time Output Enable Time Output Hold After Address Output High Z Delay tRC tAA tACE tPA tOE tOH tHZ 23C3211-10 MIN. MAX. 100ns 100ns 100ns 30ns 30ns 0ns 20ns 23C3211-12 MIN. MAX. 120ns 120ns 120ns 50ns 50ns 0ns 20ns Note:Output high-impedance delay (tHZ) is measured from OE or CE going high, and this parameter guaranteed by design over the full voltage and temperature operating range - not tested. AC Test Conditions Input Pulse Levels Input Rise and Fall Times Input Timing Level Output Timing Level Output Load 0.4V~ 3.3V 10ns 1.5V 0.8V and 2.0V See Figure IOH (load)=-1mA DOUT IOL (load)=2.1mA C<100pF Note:No output loading is present in tester load board. Active loading is used and under software programming control. Output loading capacitance includes load board's and all stray capacitance. P/N:PM0258 REV. 3.0, JUL. 17, 2001 3 MX23C3211 TIMING DIAGRAM RANDOM READ ADD ADD ADD ADD tRC tACE CE tOE OE VALID DATA tHZ tOH tAA VALID VALID PAGE READ VALID ADD A3-A20 (A-1),A0,A1,A2 2'nd ADD 1'st ADD tAA DATA 3'rd ADD tPA VALID VALID VALID Note: CE, OE are enable. Page size is 8 words in 16-bit mode, 16 bytes in 8-bit mode. P/N:PM0258 REV. 3.0, JUL. 17, 2001 4 MX23C3211 PACKAGE INFORMATION 44-PIN PLASTIC SOP P/N:PM0258 REV. 3.0, JUL. 17, 2001 5 MX23C3211 48-PIN PLASTIC TSOP P/N:PM0258 REV. 3.0, JUL. 17, 2001 6 MX23C3211 REVISION HISTORY Revision 2.7 2.8 2.9 3.0 Description AC Characteristics: tOH : 10ns --> 0ns Typing error correction Add AC Characteristics-- tPA Modify AC Characteristics-- tACE Modify Package Information Page P3 P1,2 P3 P3 P5,6 P/N:PM0258 Date FEB/01/1999 JAN/18/2000 OCT/03/2000 JUL/17/2001 REV. 3.0, JUL. 17, 2001 7 MX23C3211 MACRONIX INTERNATIONAL CO., LTD. HEADQUARTERS: TEL:+886-3-578-6688 FAX:+886-3-563-2888 EUROPE OFFICE: TEL:+32-2-456-8020 FAX:+32-2-456-8021 JAPAN OFFICE: TEL:+81-44-246-9100 FAX:+81-44-246-9105 SINGAPORE OFFICE: TEL:+65-348-8385 FAX:+65-348-8096 TAIPEI OFFICE: TEL:+886-2-2509-3300 FAX:+886-2-2509-2200 MACRONIX AMERICA, INC. TEL:+1-408-453-8088 FAX:+1-408-453-8488 CHICAGO OFFICE: TEL:+1-847-963-1900 FAX:+1-847-963-1909 http : //www.macronix.com MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice. 8