STMicroelectronics M41T315V-85MQ6F Serial access phantom rtc supervisor Datasheet

M41T315Y*
M41T315V/W
Serial Access Phantom RTC Supervisor
FEATURES SUMMARY
■
■
■
■
■
■
■
■
■
■
■
■
3.0V, 3.3V, OR 5V OPERATING VOLTAGE
REAL TIME CLOCK KEEPS TRACK OF
TENTHS/HUNDREDTHS OF SECONDS,
SECONDS, MINUTES, HOURS, DAYS,
DATE OF THE MONTH, MONTHS, AND
YEARS
AUTOMATIC LEAP YEAR CORRECTION
VALID UP TO 2100
AUTOMATIC SWITCH-OVER AND
DESELECT CIRCUITRY
CHOICE OF POWER-FAIL DESELECT
VOLTAGES:
(VPFD = Power-fail Deselect Voltage)
– M41T315Y: VCC = 4.5 to 5.5V
4.25V ≤ VPFD ≤ 4.50V
– M41T315V: VCC = 3.0 to 3.6V
2.80V ≤ VPFD ≤ 2.97V
– M41T315W: VCC = 2.7 to 3.3V
2.60V ≤ VPFD ≤ 2.70V
NO ADDRESS SPACE REQUIRED TO
COMMUNICATE WITH RTC
PROVIDES NONVOLATILE SUPERVISOR
FUNCTIONS FOR BATTERY BACKUP OF
SRAM
FULL ±10% VCC OPERATING RANGE
INDUSTRIAL OPERATING TEMPERATURE
RANGE (–40 to +85°C)
ULTRA-LOW BATTERY SUPPLY CURRENT
OF 500nA (max)
OPTIONAL PACKAGING INCLUDES A 28LEAD SOIC and SNAPHAT® TOP (to be
ordered separately)
SNAPHAT PACKAGE PROVIDES DIRECT
CONNECTION FOR A SNAPHAT TOP,
WHICH CONTAINS THE BATTERY AND
CRYSTAL
Figure 1. 16-pin SOIC Package
16
1
SO16 (MQ)
Figure 2. 28-pin SOIC Package
SNAPHAT (SH)
Battery/Crystal
28
1
SOH28 (MH)
* Contact Local Sales Office
June 2004
1/24
M41T315Y*, M41T315V, M41T315W
TABLE OF CONTENTS
FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Figure 1. 16-pin SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Figure 2. 28-pin SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
SUMMARY DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 3.
Table 1.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
16-pin SOIC Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
28-pin SOIC Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
M41T315Y/V/W to RAM/Clock Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 2. Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Non-volatile Supervisor Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 8. READ Mode Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 9. WRITE Mode Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 3. AC Electrical Characteristics (M41T315Y) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 4. AC Electrical Characteristics (M41T315V/W) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 10.Comparison Register Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Data Retention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
CLOCK OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Clock Register Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
AM-PM/12/24 Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Oscillator and Reset Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Zero Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 5. RTC Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 11.Reset Pulse Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
MAXIMUM RATING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 6. Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
DC AND AC PARAMETERS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 7. DC and AC Measurement Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 12.AC Testing Load Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 8. Capacitance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 9. DC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 10. Crystal Electrical Characteristics (Externally Supplied) . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 13.Power Down/Up Mode AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 11. Power Down/Up Trip Points DC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
PACKAGE MECHANICAL INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2/24
M41T315Y*, M41T315V, M41T315W
Figure 14.SO16 – 16-lead Plastic Small Outline, Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 12. SO16 – 16-lead Plastic Small Outline (150 mils body width), Package Mech. Data . . . . 18
Figure 15.SOH28 – 28-lead Plastic Small Outline, Package Outline . . . . . . . . . . . . . . . . . . . . . . . 19
Table 13. SOH28 – 28-lead Plastic Small Outline, Package Mechanical Data . . . . . . . . . . . . . . . . 19
Figure 16.SH – 4-pin SNAPHAT Housing for 48mAh Battery and Crystal, Package Outline . . . . . 20
Table 14. SH – 4-pin SNAPHAT Housing for 48mAh Battery and Crystal, Package Mech. Data . . 20
Figure 17.SH – 4-pin SNAPHAT Housing for 120mAh Battery and Crystal, Package Outline . . . . 21
Table 15. SH – 4-pin SNAPHAT Housing for 120mAh Battery and Crystal, Package Mech. Data . 21
PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 16. Ordering Information Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 17. SNAPHAT Battery Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
REVISION HISTORY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 18. Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3/24
M41T315Y*, M41T315V, M41T315W
SUMMARY DESCRIPTION
The M41T315Y/V/W RTC Supervisor is a combination of a CMOS TIMEKEEPER® and a nonvolatile memory supervisor. Power is constantly
monitored by the memory supervisor. In the event
of power instability or absence, an external battery
maintains the timekeeping operation and provides
power for a CMOS static RAM by switching on and
invoking write protection to prevent data corruption in the memory and RTC.
The clock keeps track of tenths/hundredths of seconds, seconds, minutes, hours, day, date, month,
and year information. The last day of the month is
automatically adjusted for months with less than
31 days, including leap year correction.
The clock operates in one of two formats:
– a 12-hour mode with an AM/PM indicator;
or
– a 24-hour mode
The nonvolatile supervisor supplies all the necessary support circuitry to convert a CMOS RAM to
a nonvolatile memory. The M41T315Y/V/W can
be interfaced with RAM without leaving gaps in
memory.
The M41T315Y/V/W is supplied in a 28-lead SOIC
SNAPHAT® package (which integrates both crystal and battery in a single SNAPHAT top) or a-16
pin SOIC. The 28-pin, 330mil SOIC provides sockets with gold plated contacts at both ends for direct
connection to a separate SNAPHAT housing containing the battery and crystal. The unique design
allows the SNAPHAT battery/crystal package to
be mounted on top of the SOIC package after the
completion of the surface mount process.
Insertion of the SNAPHAT housing after reflow
prevents potential battery and crystal damage due
to the high temperatures required for device surface-mounting. The SNAPHAT housing is also
keyed to prevent reverse insertion.
The 28-pin SOIC and battery/crystal packages are
shipped separately in plastic anti-static tubes or in
Tape & Reel form. For the 28-lead SOIC, the battery/crystal package (e.g., SNAPHAT) part number
is
“M4TXX-BR12SH”
(see
Table
17., page 22).
Caution: Do not place the SNAPHAT battery/crystal top in conductive foam, as this will drain the lithium button-cell battery.
Figure 3. Logic Diagram
Note: 1. For 16-pin SOIC only
Table 1. Signal Names
XI-XO
VCCI VCCO
D
XI
(1)
WE
D
Data Input
Q
Data Output
RST
Reset Input
CEO
Chip Enable Output
CEI
Chip Enable Input
Q
(1)
XO
32.768 kHz Crystal Connection
CEO
M41T315Y
M41T315V
M41T315W
VBAT
Battery Input
CEI
OE
RST
(1)
VBAT
VSS
AI03902
4/24
OE
Output Enable Input
WE
WRITE Enable Input
VCCO
Switched Supply Voltage Output
VCCI
Supply Voltage Input
VSS
Ground
NC
Not Connected Internally
DU
Don’t Use
M41T315Y*, M41T315V, M41T315W
Figure 4. 16-pin SOIC Connections
XI
XO
WE
VBAT(1)
VSS
D
Q
VSS
16
1
2
15
3
14
4 M41T315Y 13
M41T315V
5 M41T315W 12
6
11
7
10
8
9
Figure 5. 28-pin SOIC Connections
WE
NC
NC
NC
NC
NC
NC
VSS
VCCI
VCCO
DU
RST
OE
CEI
CEO
NC
NC
NC
D
Q
NC
VSS
AI03909
1
2
3
4
5
6
M41T315Y
7 M41T315V
8 M41T315W
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCCI
NC
NC
VCCO
DU
NC
RST
NC
OE
NC
NC
CEI
CEO
NC
AI03910
Note: 1. Should be tied to VSS if not used.
Figure 6. Block Diagram
XO
32,768 Hz
CRYSTAL
CLOCK/CALENDAR LOGIC
XI
CEO
UPDATE
READ
CEI
OE
WE
CONTROL
LOGIC
TIMEKEEPER REGISTER
WRITE
POWER-FAIL
RST
ACCESS
ENABLE
SEQUENCE
DETECTOR
D
Q
I/O
BUFFERS
VCCI
COMPARISON REGISTER
DATA
INTERNAL VCC
POWER-FAIL
DETECT
LOGIC
VBAT
VCCO
AI03636B
5/24
M41T315Y*, M41T315V, M41T315W
Figure 7. M41T315Y/V/W to RAM/Clock Interface
A0-An
A0-An
WE
WE
OE
OE
DATA I/O
D0-D7
CMOS
SRAM
CE
VCC
CEO
VCCO
OE
WE
CE
CEI
RST
D
M41T315Y/V/W
RST
VCC
Q
VCCI
VBAT
X0
BAT
+
VSS
VSS
6/24
X1
32.768 Hz
CRYSTAL
AI04258
M41T315Y*, M41T315V, M41T315W
OPERATION
Figure 6., page 5 illustrates the main elements of
the device. The following paragraphs describe the
signals and functions.
Communication with the clock is established by
pattern recognition of a serial bit stream of 64 bits
which must be matched by executing 64 consecutive WRITE cycles containing the proper data on
data in (D). All accesses which occur prior to recognition of the 64-bit pattern are directed to memory via the chip enable output pin (CEO).
After recognition is established, the next 64 READ
or WRITE Cycles either extract or update data in
the clock and CEO remains high during this time,
disabling the connected memory (see Table
2., page 7).
Data transfer to and from the timekeeping function
is accomplished with a serial bit stream under control of chip enable input (CEI), output enable (OE),
and WRITE enable (WE). Initially, a READ cycle
using the CEI and OE control of the clock starts the
pattern recognition sequence by moving the pointer to the first bit of the 64-bit comparison register.
Next, 64 consecutive WRITE cycles are executed
using the CEI and WE control of the clock. These
64 WRITE cycles are used only to gain access to
the clock.
When the first WRITE cycle is executed, it is compared to the first bit of the 64-bit comparison reg-
ister. If a match is found, the pointer increments to
the next location of the comparison register and
awaits the next WRITE cycle.
If a match is not found, the pointer does not advance and all subsequent WRITE cycles are ignored. If a READ cycle occurs at any time during
pattern recognition, the present sequence is aborted and the comparison register pointer is reset.
Pattern recognition continues for a total of 64
WRITE cycles as described above until all the bits
in the comparison register have been matched
(see Figure 10., page 11.)
With a correct match for 64 bits, access to the registers is enabled and data transfer to or from the
timekeeping registers may proceed. The next 64
cycles will cause the device to either receive data
on D, or transmit data on Q, depending on the level of OE pin or the WE pin. Cycles to other locations
outside the memory block can be interleaved with
CEI cycles without interrupting the pattern recognition sequence or data transfer sequence to the device.
For a SO16 pin package, a standard 32.768 kHz
quartz crystal can be directly connected to the
M41T315Y/V/W via pins 1 and 2 (XI, XO). The
crystal selected for use should have a specified
load capacitance (CL) of 12.5 pF (see Table
10., page 17).
Table 2. Operating Modes
Mode
Deselect
WRITE
READ
READ
VCC
4.5 to 5.5V
or
3.0 to 3.6V
or
2.7 to 3.3V
CEI
OE
WE
D
Q
Power
VIH
X
X
Hi-Z
Hi-Z
Standby
VIL
X
VIL
DIN
Hi-Z
Active
VIL
VIL
VIH
Hi-Z
DOUT
Active
VIL
VIH
VIH
Hi-Z
Hi-Z
Active
Deselect
VSO to VPFD (min)(1)
X
X
X
Hi-Z
Hi-Z
CMOS Standby
Deselect
≤ VSO(1)
X
X
X
Hi-Z
Hi-Z
Battery Back-up Mode
Note: X = VIH or VIL; VSO = Battery Back-up Switchover Voltage.
Note: 1. See Table 11., page 17 for details.
7/24
M41T315Y*, M41T315V, M41T315W
Non-volatile Supervisor Operation
A switch is provided to direct power from the battery input or VCCI to VCCO with a maximum voltage
drop of 0.3 Volts. The VCCO output pin is used to
supply uninterrupted power to CMOS SRAM. The
M41T315Y/V/W safeguards the clock and RAM
data by power-fail detection and write protection.
Power-fail detection occurs when VCCI falls below
VPFD which is set by an internal bandgap reference. The M41T315Y/V/W constantly monitors
the VCCI supply pin. When VCCI is less than VPFD,
power-fail circuitry forces the chip enable output
(CEO) to VCCI or VBAT-0.2 volts for external RAM
write protection. During nominal supply conditions,
CEO will track CEI with a propagation delay. Internally, the M41T315Y/V/W aborts any data transfer
in progress without changing any of the device
registers and prevents future access until VCCI
exceeds VPFD. Figure 7., page 6 illustrates a typical RAM/clock interface.
Figure 8. READ Mode Waveforms
WE
tRC
tCW
tRR
tCO
CEI
tOD
tOW
OE
tODO
tOE
tOEE
tCOE
DATA OUTPUT VALID
Q
AI04259
Figure 9. WRITE Mode Waveforms
OE
tWC
tWP
tWR
WE
tWR
tCW
CEI
t DH
tDH
tDS
D
DATA INPUT STABLE
AI04261
8/24
M41T315Y*, M41T315V, M41T315W
Table 3. AC Electrical Characteristics (M41T315Y)
Parameter(1)
Symbol
Min
Typ
Max
Units
tAVAV
tRC
READ Cycle Time
tELQV
tCO
CEI Access Time
55
ns
tGLQV
tOE
OE Access Time
55
ns
tELQX
tCOE
CEI to Output Low Z
5
ns
tGLQX
tOEE
OE to Output Low Z
5
ns
tEHQZ
tOD
CEI to Output High Z
25
ns
tGHQZ
tODO
OE to Output High Z
25
ns
65
ns
tRR
READ Recovery
10
ns
tELEH
tCW
CEI Pulse Width
55
ns
tGLGH
tOW
OE Pulse Width
55
ns
tAVAV
tWC
WRITE Cycle
65
ns
tWLWH
tWP
WRITE Pulse Width
55
ns
tEHAX
tWHAX
tWR(2)
WRITE Recovery
10
ns
tDVEH
tDVWH
tDS(3)
Data Setup
30
ns
tEHDX
tWHDX
tDH(3)
Data Hold Time
0
ns
RST Pulse Width
65
ns
tRST
Note: 1. Valid for Ambient Operating Temperature: TA = –40 to 85°C; VCC = 4.5 to 5.5V (except where noted).
2. tWR is a function of the latter occurring edge of WE or CEI.
3. tDH and tDS are functions of the first occurring edge of WE or CEI in RAM mode.
9/24
M41T315Y*, M41T315V, M41T315W
Table 4. AC Electrical Characteristics (M41T315V/W)
Parameter(1)
Symbol
Min
Typ
Max
Units
tAVAV
tRC
READ Cycle Time
tELQV
tCO
CEI Access Time
85
ns
tGLQV
tOE
OE Access Time
85
ns
tELQX
tCOE
CEI to Output Low Z
5
ns
tGLQX
tOEE
OE to Output Low Z
5
ns
tEHQZ
tOD
CEI to Output High Z
30
ns
tGHQZ
tODO
OE to Output High Z
30
ns
85
ns
tRR
READ Recovery
20
ns
tELEH
tCW
CEI Pulse Width
65
ns
tGLGH
tOW
OE Pulse Width
60
ns
tAVAV
tWC
WRITE Cycle
85
ns
tWLWH
tWP
WRITE Pulse Width
60
ns
tEHAX
tWHAX
tWR(2)
WRITE Recovery
25
ns
tDVEH
tDVWH
tDS(3)
Data Setup
35
ns
tEHDX
tWHDX
tDH(3)
Data Hold Time
5
ns
RST Pulse Width
85
ns
tRST
Note: 1. Valid for Ambient Operating Temperature: TA = –40 to 85°C; VCC = 2.7 to 3.6V (except where noted).
2. tWR is a function of the latter occurring edge of WE or CEI.
3. tDH and tDS are functions of the first occurring edge of WE or CEI in RAM mode.
10/24
M41T315Y*, M41T315V, M41T315W
Figure 10. Comparison Register Definition
Hex
Value
7
6
5
4
3
2
1
0
BYTE 0
1
1
0
0
0
1
0
1
C5
BYTE 1
0
0
1
1
1
0
1
0
3A
BYTE 2
1
0
1
0
0
0
1
1
A3
BYTE 3
0
1
0
1
1
1
0
0
5C
BYTE 4
1
1
0
0
0
1
0
1
C5
BYTE 5
0
0
1
1
1
0
1
0
3A
BYTE 6
1
0
1
0
0
0
1
1
A3
BYTE 7
0
1
0
1
1
1
0
0
5C
AI04262
Note: Pattern recognition in “hex” is C5, 3A, A3, 5C, C5, 3A, A3, and 5C. The odds of this pattern being accidentally duplicated and sending
aberrant entries to the RTC is less than 1 in 1019. This pattern is sent to the clock LSB to MSB.
11/24
M41T315Y*, M41T315V, M41T315W
Data Retention
Most low power SRAMs on the market today can
be used with the M41T315Y/V/W. There are, however some criteria which should be used in making
the final choice of an SRAM to use. The SRAM
must be designed in a way where the chip enable
input disables all other inputs to the SRAM. This
allows inputs to the M41T315Y/V/W and SRAMs
to be Don’t Care once VCCI falls below VPFD(min).
The SRAM should also guarantee data retention
down to VCC=2.0 volts. The chip enable access
time must be sufficient to meet the system needs
with the chip enable output propagation delays
included. If the SRAM includes a second chip
enable pin (E2), this pin should be tied to VOUT.
If data retention lifetime is a critical parameter for
the system, it is important to review the data retention current specifications for the particular
12/24
SRAMs being evaluated. Most SRAMs specify a
data retention current at 3.0 volts. Manufacturers
generally specify a typical condition for room temperature along with a worst case condition (generally at elevated temperatures). The system level
requirements will determine the choice of which
value to use. The data retention current value of
the SRAMs can then be added to the IBAT value of
the M41T315Y/V/W to determine the total current
requirements for data retention. The available battery capacity for the SNAPHAT® of your choice
can then be divided by this current to determine
the amount of data retention available (see Table
17., page 22).
For a further more detailed review of lifetime calculations, please see Application Note AN1012.
M41T315Y*, M41T315V, M41T315W
CLOCK OPERATION
Oscillator and Reset Bits
Bits 4 and 5 of the day register are used to control
the reset and oscillator functions. Bit 4 controls the
reset pin input. When the Reset Bit is set to logic
'1,' the reset input pin is ignored. When the Reset
Bit is set to logic '0,' a low input on the reset pin will
cause the device to abort data transfer without
changing data in the timekeeping registers. Reset
operates independently of all other inputs. Bit 5
controls the oscillator. When set to logic '0,' the oscillator turns on and the real time clock/calendar
begins to increment.
Zero Bits
Registers 1, 2, 3, 4, 5, and 6 contain one (1) or
more bits that will always read logic '0.' When writing to these locations, either a logic '1' or '0' is acceptable.
Clock Register Information
Clock information is contained in eight registers of
8 bits, each of which is sequentially accessed 1 bit
at a time after the 64-bit pattern recognition sequence has been completed. When updating the
clock registers, each must be handled in groups of
8 bits. Writing and reading individual bits within a
register could produce erroneous results. These
READ/WRITE registers are defined in Table
5., page 13.
Data contained in the clock registers is in binary
coded decimal format (BCD). Reading and writing
the registers is always accomplished by stepping
though all eight registers, starting with Bit 0 of
Register 0 and ending with Bit 7 of Register 7.
AM-PM/12/24 Mode
Bit 7 of the hours register is defined as the 12-hour
or 24-hour mode select bit. When high, the 12hour mode is selected. In the 12-hour mode, Bit 5
is the AM/PM bit with logic high being PM. In the
24-hour mode, Bit 5 is the second 10-hour bit (2023 hours).
Table 5. RTC Register Map
Register
D7
0
D6
D5
D4
D3
D2
0.1 Seconds
D1
D0
Function/Range
BCD Format
0.01 Seconds
Seconds
00-99
1
0
10 Seconds
Seconds
Seconds
00-59
2
0
10 Minutes
Minutes
Minutes
00-59
3
12/24
0
10 /
A/P
Hrs
Hours (24 Hour Format)
Hours
01-12/
00-23
4
0
0
OSC
RST
Day
01-7
5
0
0
Date: Day of the Month
Date
01-31
6
0
0
Month
Month
01-12
Year
Year
00-99
7
10 date
0
0
Day of the Week
10M
10 Years
Keys:
A/P = AM/PM Bit
12/24 = 12 or 24-hour mode Bit
OSC = Oscillator Bit
RST = Reset Bit
0 = Must be set to '0'
Figure 11. Reset Pulse Waveform
RST
tRST
AI04260
13/24
M41T315Y*, M41T315V, M41T315W
MAXIMUM RATING
Stressing the device above the rating listed in the
“Absolute Maximum Ratings” table may cause
permanent damage to the device. These are
stress ratings only and operation of the device at
these or any other conditions above those indicated in the Operating sections of this specification is
not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device
reliability.
Refer
also
to
the
STMicroelectronics SURE Program and other relevant quality documents.
Table 6. Absolute Maximum Ratings
Symbol
TA
Parameter
Value
Unit
-40 to +85
°C
–40 to +85
°C
–55 to +125
°C
260
°C
M41T315Y
-0.3 to +7.0
V
M41T315V/W
-0.3 to +4.6
V
-0.3 to VCC + 0.3
V
Operating Temperature
TSTG
Storage Temperature (VCC, Oscillator Off)
SNAPHAT
®
SOIC
TSLD
(1)
Lead Solder Temperature for 10 seconds
VCCI
Supply Voltage (on any pin relative to Ground)
VIO
Input or Output Voltages
IO
Output Current
20
mA
PD
Power Dissipation
1
W
Note: 1. For SO package, standard (SnPb) lead finish: Reflow at peak temperature of 225°C (total thermal budget not to exceed 180°C for
between 90 to 150 seconds).
2. For SO package, Lead-free (Pb-free) lead finish: Reflow at peak temperature of 260°C (total thermal budget not to exceed 245°C
for greater than 30 seconds).
CAUTION: Negative undershoots below –0.3V are not allowed on any pin while in the Battery Back-up mode.
CAUTION: Do NOT wave solder SOIC to avoid damaging SNAPHAT sockets.
14/24
M41T315Y*, M41T315V, M41T315W
DC AND AC PARAMETERS
This section summarizes the operating and measurement conditions, as well as the DC and AC
characteristics of the device. The parameters in
the following DC and AC Characteristic tables are
derived from tests performed under the Measure-
ment Conditions listed in the relevant tables. Designers should check that the operating conditions
in their projects match the measurement conditions when using the quoted parameters.
Table 7. DC and AC Measurement Conditions
Parameter
M41T315Y
M41T315V/W
VCC Supply Voltage
4.5 to 5.5V
2.7 to 3.6V
Ambient Operating Temperature
–40 to 85°C
–40 to 85°C
Load Capacitance (CL)
100pF
50pF
Input Rise and Fall Times
≤ 5ns
≤ 5ns
0 to 3V
0 to 3V
1.5V
1.5V
Input Pulse Voltages
Input and Output Timing Ref. Voltages
Figure 12. AC Testing Load Circuit
400 Ω
DEVICE
UNDER
TEST
CL
CL includes JIG capacitance
2.0V
AI04255
Note: 50pF for M41T315V.
Table 8. Capacitance
Symbol
CIN
CIO(3)
Parameter(1,2)
Min
Max
Unit
Input Capacitance
10
pF
Input / Output Capacitance
10
pF
Note: 1. Effective capacitance measured with power supply at 5V; sampled only; not 100% tested.
2. At 25°C, f = 1MHz.
3. Outputs were deselected.
15/24
M41T315Y*, M41T315V, M41T315W
Table 9. DC Characteristics
Sym
Parameter
M41T315Y
M41T315V/W
–65
–85
Test
Condition(1)
Min
IIL(2)
Input Leakage
Current
IOL
Output Leakage
Current
ICC1(3)
Supply Current
Typ
Max
Min
Typ
Unit
Max
0V ≤ VIN ≤
VCC
±1
±1
µA
0V ≤ VOUT ≤
VCC
±1
±1
µA
10
6
mA
VCC Power Supply
Current
VCC0 =
VCCI – 0.3
150
100
mA
ICC2(3)
Supply Current
(TTL Standby)
CEI = VIH
3
2
mA
ICC3(3)
VCC Power Supply
Current
CEI =
VCCI – 0.2
1
1
mA
VIL(5)
Input Low Voltage
–0.3
0.8
–0.3
0.6
V
VIH(5)
Input High Voltage
2.2
VCC + 0.3
2.0
VCC + 0.3
V
VOL(6)
Output Low
Voltage
IOL = 4.0 mA
0.4
V
VOH(6)
Output High
Voltage
IOH = –1.0 mA
VPFD
Power Fail
Deselect
VSO
Battery Back-up
Switchover
VBAT
Battery Voltage
VCEO
CEO Output
Voltage
IBAT(3)
Battery Current
VBAT = 3.0V
TA = 25°C
VCC = 0V
0.5
0.5
µA
Battery Backup
ICCO2(7) Current
VCCO = VBAT
– 0.2V
100
100
µA
ICCO1(4)
Note: 1.
2.
3.
4.
5.
6.
7.
16/24
0.4
2.4
2.4
4.25
4.50
2.80 (V)
2.60 (W)
VBAT
2.5
V
2.97 (V)
2.70 (W)
2.5
3.7
2.5
V
3.7
VCCI – 0.2
or
VBAT – 0.2
VCCI – 0.2
or
VBAT – 0.2
V
V
V
Valid for Ambient Operating Temperature: TA = –40 to 85°C; VCC = 4.5 to 5.5V or 2.7 to 3.6V (except where noted).
Applies to all input pins except RST, which is pulled internally to VCCI.
Measured without RAM connected.
ICCO1 is the maximum average load current the device can supply to external memory.
Voltages are referenced to Ground.
Measured with load shown in Figure 12., page 15.
ICCO2 is the maximum average load current that the device can supply to memory in the battery backup mode.
M41T315Y*, M41T315V, M41T315W
Table 10. Crystal Electrical Characteristics (Externally Supplied)
Parameter(1,2)
Symbol
fO
Resonant Frequency
RS
Series Resistance
CL
Load Capacitance
Min
Typ
Max
Unit
32.768
kHz
60
kΩ
12.5
pF
Note: 1. These values are externally supplied. STMicroelectronics recommends the KDS DT-38: 1TA/1TC252E127, Tuning Fork Type (thruhole) or the DMX-26S: 1TJS125FH2A212, (SMD) quartz crystal for industrial temperature operations. KDS can be contacted at [email protected] or http://www.kdsj.co.jp for further information on this crystal type.
Note: 1. Load capacitors are integrated within the M41T315Y/V/W. Circuit board layout considerations for the 32.768kHz crystal of minimum
trace lengths and isolation from RF generating signals should be taken into account.
Figure 13. Power Down/Up Mode AC Waveforms
VCC
VPFD (max)
VPFD (min)
VSO
tR
tFB
tF
tREC
tPF
DON'T CARE
CEI
VBAT – 0.2V
tPD
VBAT – 0.2V
tPD
CEO
AI04257
Table 11. Power Down/Up Trip Points DC Characteristics
Symbol
Parameter(1,2)
Min
Max
Unit
VPFD (max) to CEI low
1.5
2.5
ms
tF
VPFD (max) to VPFD (min) VCC Fall Time
300
µs
tFB
VPFD (min) to VSO VCC Fall Time
10
µs
tR
VPFD (min) to VPFD (max) VCC Rise Time
0
µs
tPF
CEI High to Power-Fail
0
µs
tPD(3,4)
CEI Propagation Delay
tREC
Note: 1.
2.
3.
4.
M41T315Y
10
ns
M41T315V/W
15
ns
Valid for Ambient Operating Temperature: TA = –40 to 85°C; VCC = 4.5 to 5.5V or 2.7 to 3.6V (except where noted).
Measured at 25°C.
Measured with load shown in Figure 12., page 15.
Input pulse rise and fall times equal 10ns
17/24
M41T315Y*, M41T315V, M41T315W
PACKAGE MECHANICAL INFORMATION
Figure 14. SO16 – 16-lead Plastic Small Outline, Package Outline
A2
A
C
B
CP
e
D
N
E
H
1
A1
α
L
SO-b
Note: Drawing is not to scale.
Table 12. SO16 – 16-lead Plastic Small Outline (150 mils body width), Package Mech. Data
mm
inches
Symb
Typ
Min
A
Typ
Min
1.75
A1
0.10
A2
Max
0.069
0.25
0.004
1.60
0.010
0.063
B
0.35
0.46
0.014
0.018
C
0.19
0.25
0.007
0.010
D
9.80
10.00
0.386
0.394
E
3.30
4.00
0.150
0.158
–
–
–
–
H
5.80
6.20
0.228
0.244
L
0.40
1.27
0.016
0.050
a
0°
8°
0°
8°
N
16
e
CP
18/24
Max
1.27
0.050
16
0.10
0.004
M41T315Y*, M41T315V, M41T315W
Figure 15. SOH28 – 28-lead Plastic Small Outline, Package Outline
A2
A
C
B
eB
e
CP
D
N
E
H
A1
α
L
1
SOH-A
Note: Drawing is not to scale.
Table 13. SOH28 – 28-lead Plastic Small Outline, Package Mechanical Data
mm
inches
Symb
Typ
Min
A
Max
Typ
Min
3.05
Max
0.120
A1
0.05
0.36
0.002
0.014
A2
2.34
2.69
0.092
0.106
B
0.36
0.51
0.014
0.020
C
0.15
0.32
0.006
0.012
D
17.71
18.49
0.697
0.728
E
8.23
8.89
0.324
0.350
–
–
–
–
eB
3.20
3.61
0.126
0.142
H
11.51
12.70
0.453
0.500
L
0.41
1.27
0.016
0.050
a
0°
8°
0°
8°
N
28
e
CP
1.27
0.050
28
0.10
0.004
19/24
M41T315Y*, M41T315V, M41T315W
Figure 16. SH – 4-pin SNAPHAT Housing for 48mAh Battery and Crystal, Package Outline
A1
A2
A3
A
eA
B
L
eB
D
E
SHTK-A
Note: Drawing is not to scale.
Table 14. SH – 4-pin SNAPHAT Housing for 48mAh Battery and Crystal, Package Mech. Data
mm
inches
Symb
Typ
Min
A
Typ
Min
Max
9.78
0
0.385
A1
6.73
7.24
0.265
0.285
A2
6.48
6.99
0.255
0.275
0.38
0
0.015
A3
20/24
Max
B
0.46
0.56
0.018
0.022
D
21.21
21.84
0.835
0.860
E
14.22
14.99
0.560
0.590
eA
15.55
15.95
.6122
.6280
eB
3.20
3.61
0.126
0.142
L
2.03
2.29
0.080
0.090
M41T315Y*, M41T315V, M41T315W
Figure 17. SH – 4-pin SNAPHAT Housing for 120mAh Battery and Crystal, Package Outline
A1
A2
A3
A
eA
B
L
eB
D
E
SHTK-A
Note: Drawing is not to scale.
Table 15. SH – 4-pin SNAPHAT Housing for 120mAh Battery and Crystal, Package Mech. Data
mm
inches
Symb
Typ
Min
A
Max
Typ
Min
Max
10.54
0
0.415
A1
8.00
8.51
0.315
0.335
A2
7.24
8.00
0.285
0.315
0.38
0
0.015
A3
B
0.46
0.56
0.018
0.022
D
21.21
21.84
0.835
0.860
E
17.27
18.03
0.680
0.710
eA
15.55
15.95
.6122
.6280
eB
3.20
3.61
0.126
0.142
L
2.03
2.29
0.080
0.090
21/24
M41T315Y*, M41T315V, M41T315W
PART NUMBERING
Table 16. Ordering Information Scheme
Example:
M41T
315Y
–65
MH
6
E
Device Type
M41T
Supply Voltage and Write Protect Voltage
315Y(1) = VCC = 4.5 to 5.5V; VPFD = 4.25 to 4.50V
315V = VCC = 3.0 to 3.6V; VPFD = 2.80 to 2.97V
315W = VCC = 2.7 to 3.3V; VPFD = 2.60 to 2.70V
Speed
–65 = 65ns (315Y)
–85 = 85ns (315V/W)
Package
MH(2) = SOH28
MQ = SO16
Temperature Range
6 = –40 to 85°C
Shipping Method
For SOH28:
blank = Tubes (Not for New Design - Use E)
E = Lead-free Package (ECO
PACK®), Tubes
F = Lead-free Package (ECO PACK®), Tape & Reel
TR = Tape & Reel (Not for New Design - Use F)
For SO16:
blank = Tubes (Not for New Design - Use E)
E = Lead-free Package (ECO
PACK®), Tubes
F = Lead-free Package (ECO PACK®), Tape & Reel
TR = Tape & Reel (Not for New Design - Use F)
Note: 1. Contact Local Sales Office
2. The SOIC package (SOH28) requires the SNAPHAT® battery package which is ordered separately under the part number “M4TXXBR12SHX” in plastic tube or “M4TXX-BR12SHXTR” in Tape & Reel form (see Table 17).
Caution: Do not place the SNAPHAT battery package “M4TXX-BR12SH” in conductive foam as it will drain the lithium button-cell battery.
For other options, or for more information on any aspect of this device, please contact the ST Sales Office
nearest you.
Table 17. SNAPHAT Battery Table
Part Number
22/24
Description
Package
M4T28-BR12SH
Lithium Battery (48mAh) SNAPHAT
SH
M4T32-BR12SH
Lithium Battery (120mAh) SNAPHAT
SH
M41T315Y*, M41T315V, M41T315W
REVISION HISTORY
Table 18. Document Revision History
Date
Rev. #
Revision Details
June 2001
1.0
First Issue
17-Jul-01
1.1
Basic formatting changes
18-Sep-01
1.2
Changed pin 8 in 28-pin to VSS
27-Sep-01
1.3
Added ambient temp to DC Characteristics table (Table 9)
01-May-02
1.4
Modify reflow time and temperature footnote (Table 6)
04-Nov-02
1.5
Modify Crystal Electrical Characteristics table footnotes (Table 10); add marketing
status (Table 16)
26-Mar-03
1.6
Update test condition (Table 9)
08-Jun-04
2.0
Reformatted; add Lead-free information (Table 6, 16)
M41T315, M41T315Y, M41T315V, M41T315W, 41T315, 41T315Y, 41T315V, 41T315W, T315,SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM,
NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM,
NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM,
NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, Serial, Serial, Serial, Serial,
Serial, Serial, Serial, Serial, Serial, Serial, Serial, Serial, Serial, Serial, Serial, Serial, Serial, Serial, Serial, Serial, Serial, Serial, Serial, Serial,
Serial, Serial, Serial, Serial, Serial, Serial, Serial, Serial, Serial, Serial, Serial, Serial, Serial, Serial, Serial, Serial, Serial, Serial, Serial, Serial,
Serial, Serial, Serial, Serial, Serial, Serial, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC,
RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC,
RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC,
RTC, Phantom, Phantom, Phantom, Phantom, Phantom, Phantom, Phantom, Phantom, Phantom, Phantom, Phantom, Phantom, Phantom,
Phantom, Phantom, Phantom, Phantom, Phantom, Phantom, Phantom, Phantom, Phantom, Phantom, Phantom, Phantom, Transparent,
Transparent, Transparent, Transparent, Transparent, Transparent, Transparent, Transparent, Transparent, Transparent, Transparent,
Transparent, Transparent, Transparent, Transparent, Transparent, Transparent, Transparent, Transparent, Transparent, Transparent,
Transparent, Transparent, Transparent, Transparent, Transparent, Transparent, Transparent, Transparent, Transparent, Transparent,
Transparent, Transparent, Transparent, Transparent, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C,
I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, I2C, Oscillator,
Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator,
Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator,
Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Oscillator, Crystal, Crystal, Crystal, Crystal, Crystal, Crystal, Crystal, Crystal, Crystal, Crystal, Crystal, Crystal, Crystal, Crystal, Crystal, Crystal, Crystal, Crystal, Crystal, Crystal, Crystal, Crystal, Crystal,
Crystal, Crystal, Crystal, Crystal, Crystal, Crystal, Crystal, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery,
Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery,
Battery, Switchover, Switchover, Switchover, Switchover, Switchover, Switchover, Switchover, Switchover, Switchover, Switchover, Backup,
Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup,
Backup, Backup, Backup, Power-fail, Power-fail, Power-fail, Power-fail, Power-fail, Power-fail, Power-fail, Power-fail, Power-fail, Power-fail,
Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator,
Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT,
SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT,
SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT,
SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SOIC, SOIC, SOIC, SOIC, SOIC, SOIC, SOIC, SOIC, SOIC, SOIC,
SOIC, SOIC, SOIC, SOIC, SOIC, Industrial, Industrial, Industrial, Industrial, Industrial, Industrial, Industrial, Industrial, Industrial, Industrial,
Industrial, Industrial, Industrial, Industrial, Industrial, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V,
5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 3.3V, 3.3V, 3.3V, 3.3V, 3.3V, 3.3V, 3.3V, 3.3V, 3.3V, 3.3V, 3V, 3V,
3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, real time clock, real time clock, real time clock, real time clock, real
time clock, real time clock, real time clock, real time clock, real time clock, real time clock
23/24
M41T315Y*, M41T315V, M41T315W
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics.
All other names are the property of their respective owners.
© 2004 STMicroelectronics - All rights reserved
STMicroelectronics GROUP OF COMPANIES
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore Spain - Sweden - Switzerland - United Kingdom - United States
www.st.com
24/24