HD74HC540, HD74HC541 Octal Buffers/Line Drivers (with 3-state outputs) REJ03D0628-0200 (Previous ADE-205-508) Rev.2.00 Mar 30, 2006 Description The HD74HC540 is an inverting buffer and the HD74HC541 is a non-inverting buffer. The 3-state control gate operates as a two-input NOR such that if either G1 or G2 are high, all eight outputs are in the high-impedance state. Features • High Speed Operation: tpd = 11.5 ns typ (CL = 50 pF) • High Output Current: Fanout of 15 LSTTL Loads • Wide Operating Voltage: VCC = 2 to 6 V • Low Input Current: 1 µA max • Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) • Ordering Information Part Name HD74HC540P HD74HC541P HD74HC540FPEL HD74HC541FPEL Package Type Package Code (Previous Code) Package Abbreviation Taping Abbreviation (Quantity) DILP-20 pin PRDP0020AC-B (DP-20NEV) P — SOP-20 pin (JEITA) PRSP0020DD-B (FP-20DAV) FP EL (2,000 pcs/reel) HD74HC540RPEL HD74HC541RPEL SOP-20 pin (JEDEC) PRSP0020DC-A (FP-20DBV) RP EL (1,000 pcs/reel) HD74HC540TELL HD74HC541TELL TSSOP-20 pin PTSP0020JB-A (TTP-20DAV) T ELL (2,000 pcs/reel) Note: Please consult the sales office for the above package availability. Function Table Inputs H L X Z : : : : Output Y G1 L G2 L A L HD74HC540 H HD74HC541 L L H L X H X L Z H Z X Z Z X H high level low level irrelevant off (high-impedance) state of a 3-state output Rev.2.00 Mar 30, 2006 page 1 of 8 HD74HC540, HD74HC541 Pin Arrangement HD74HC540 G1 1 20 VCC A1 2 19 G2 A2 3 18 Y1 A3 4 17 Y2 A4 5 16 Y3 A5 6 15 Y4 A6 7 14 Y5 A7 8 13 Y6 A8 9 12 Y7 11 Y8 GND 10 (Top view) HD74HC541 G1 1 20 VCC A1 2 19 G2 A2 3 18 Y1 A3 4 17 Y2 A4 5 16 Y3 A5 6 15 Y4 A6 7 14 Y5 A7 8 13 Y6 A8 9 12 Y7 11 Y8 GND 10 (Top view) Rev.2.00 Mar 30, 2006 page 2 of 8 HD74HC540, HD74HC541 Absolute Maximum Ratings Item Symbol Ratings Unit Supply voltage range Input / Output voltage VCC VIN, VOUT –0.5 to 7.0 –0.5 to VCC +0.5 V V IIK, IOK IO ±20 ±35 mA mA ICC or IGND PT ±75 500 mA mW Input / Output diode current Output current VCC, GND current Power dissipation Storage temperature Tstg –65 to +150 °C Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. Recommended Operating Conditions Item Supply voltage Symbol VCC Ratings 2 to 6 Unit V Input / Output voltage Operating temperature VIN, VOUT Ta 0 to VCC –40 to 85 V °C tr , tf 0 to 1000 0 to 500 Input rise / fall time Note: *1 ns 0 to 400 1. This item guarantees maximum limit when one input switches. Waveform: Refer to test circuit of switching characteristics. Conditions VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V Electrical Characteristics Item Input voltage Symbol VCC (V) VIH VIL Hysteresis voltage VH Output voltage VOH VOL Min Ta = 25°C Typ Max Ta = –40 to+85°C Unit Min Max 2.0 4.5 1.5 3.15 — — — — 1.5 3.15 — — 6.0 2.0 4.2 — — — — 0.3 4.2 — — 0.3 4.5 6.0 — — — — 1.35 1.8 — — 1.35 1.8 2.0 4.5 — — 0.1 0.4 — — — — — — 6.0 2.0 — 1.9 0.4 2.0 — — — 1.9 — — 4.5 6.0 4.4 5.9 4.5 6.0 — — 4.4 5.9 — — 4.5 6.0 4.18 5.68 — — — — 4.13 5.63 — — 2.0 4.5 — — 0.0 0.0 0.1 0.1 — — 0.1 0.1 6.0 4.5 — — 0.0 — 0.1 0.26 — — 0.1 0.33 Test Conditions V V V V Vin = VIH or VIL IOH = –20 µA IOH = –6 mA IOH = –7.8 mA V Vin = VIH or VIL IOL = 20 µA IOL = 6 mA Off-state output current IOZ 6.0 6.0 — — — — 0.26 ±0.5 — — 0.33 ±5.0 IOL = 7.8 mA µA Vin = VIH or VIL, Vout = VCC or GND Input current Quiescent supply current Iin ICC 6.0 6.0 — — — — ±0.1 4.0 — — ±1.0 40 µA Vin = VCC or GND µA Vin = VCC or GND, Iout = 0 µA Rev.2.00 Mar 30, 2006 page 3 of 8 HD74HC540, HD74HC541 Switching Characteristics (CL = 50 pF, Input tr = tf = 6 ns) Ta = 25°C Item Symbol VCC (V) Propagation delay time Ta = –40 to +85°C tPLH tPHL 2.0 Min — Typ — Max 100 Min — Max 125 4.5 6.0 — — 11 — 20 17 — — 25 21 tPLH tPHL 2.0 4.5 — — — 12 115 23 — — 145 29 6.0 2.0 — — — — 20 150 — — 25 190 4.5 6.0 — — 14 — 30 26 — — 38 33 2.0 4.5 — — — 16 150 30 — — 190 38 6.0 2.0 — — — — 26 60 — — 33 75 4.5 6.0 — — 4 — 12 10 — — 15 13 — — 5 10 — 10 Output enable time tZH tZL Output disable time tHZ tLZ Output rise/fall time tTLH tTHL Input capacitance Cin Unit Test Conditions ns (HD74HC540 only) ns (HD74HC541 only) ns ns ns pF Test Circuit Input Pulse Generator Zout = 50 Ω VCC See Function Table VCC G1, G2 Output 1 kΩ Y1 to Y8 A1 to A8 Note : 1. CL includes probe and jig capacitance. Rev.2.00 Mar 30, 2006 page 4 of 8 S1 OPEN GND CL = 50 pF VCC TEST t PLH / t PHL S1 OPEN t ZH/ t HZ t ZL / t LZ GND VCC HD74HC540, HD74HC541 Waveforms HD74HC540 • Waveform – 1 tr Input A 10 % tf VCC 90 % 50 % 90 % 50 % 10 % t PLH t PHL 0V 90 % 90 % Output Y 50 % 10 % 50 % 10 % Input G tf VOL t TLH t THL • Waveform – 2 VOH tr 90 % 50 % 10 % t ZL VCC 90 % 50 % 10 % 0V t LZ VOH 50 % Waveform - A t ZH Waveform - B 10 % t HZ 50 % 90 % VOL VOH VOL Notes : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, tr ≤ 6 ns, tf ≤ 6 ns 2. Waveform - A is for an output with internal conditions such that the output is low except when disabled by the output control. 3. Waveform - B is for an output with internal conditions such that the output is high except when disabled by the output control. 4. The output are measured one at a time with one transition per measurement. Rev.2.00 Mar 30, 2006 page 5 of 8 HD74HC540, HD74HC541 HD74HC541 • Waveform – 1 tr tf VCC 90 % 50 % 90 % 50 % Input A 10 % 10 % 90 % Output Y 0V t PHL t PLH VOH 90 % 50 % 10 % 50 % 10 % t TLH VOL t THL • Waveform – 2 tf Input G tr 90 % 50 % VCC 90 % 50 % 10 % 10 % t ZL 0V t LZ VOH 50 % Waveform - A t ZH Waveform - B 10 % t HZ 50 % 90 % VOL VOH VOL Notes : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, tr ≤ 6 ns, tf ≤ 6 ns 2. Waveform - A is for an output with internal conditions such that the output is low except when disabled by the output control. 3. Waveform - B is for an output with internal conditions such that the output is high except when disabled by the output control. 4. The output are measured one at a time with one transition per measurement. Rev.2.00 Mar 30, 2006 page 6 of 8 HD74HC540, HD74HC541 Package Dimensions JEITA Package Code P-DIP20-6.3x24.5-2.54 RENESAS Code PRDP0020AC-B Previous Code DP-20NEV MASS[Typ.] 1.26g D 11 E 20 1 10 b3 0.89 A1 A Z Reference Symbol L e1 D E A A1 bp b3 c θ e Z L θ bp e c e1 ( Ni/Pd/Au plating ) JEITA Package Code P-SOP20-5.5x12.6-1.27 RENESAS Code PRSP0020DD-B *1 Previous Code FP-20DAV Min Nom Max 7.62 24.50 25.40 6.30 7.00 5.08 0.51 0.40 0.48 0.56 1.30 0.19 0.25 0.31 0° 15° 2.29 2.54 2.79 1.27 2.54 MASS[Typ.] 0.31g D NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. F 20 Dimension in Millimeters 11 c HE *2 E bp Index mark Terminal cross section ( Ni/Pd/Au plating ) 1 Z 10 e *3 bp x Reference Symbol M A L1 A1 θ y L Detail F Rev.2.00 Mar 30, 2006 page 7 of 8 D E A2 A1 A bp b1 c c1 θ HE e x y Z L L1 Dimension in Millimeters Min Nom Max 12.60 13.0 5.50 0.00 0.10 0.20 2.20 0.34 0.40 0.46 0.15 0.20 0.25 0° 8° 7.50 7.80 8.00 1.27 0.12 0.15 0.80 0.50 0.70 0.90 1.15 HD74HC540, HD74HC541 JEITA Package Code P-SOP20-7.5x12.8-1.27 RENESAS Code PRSP0020DC-A *1 Previous Code FP-20DBV MASS[Typ.] 0.52g D F 20 NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" @ DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT @ INCLUDE TRIM OFFSET. 11 c *2 E HE bp Index mark Terminal cross section ( Ni/Pd/Au plating ) 1 Reference Symbol 10 e *3 bp x M L1 A Z A1 θ L y Detail F JEITA Package Code P-TSSOP20-4.4x6.5-0.65 RENESAS Code PTSP0020JB-A *1 Previous Code TTP-20DAV D E A2 A1 A bp b1 c c1 θ HE e x y Z L L1 Dimension in Millimeters Min Nom Max 12.80 13.2 7.50 0.10 0.20 0.30 2.65 0.34 0.40 0.46 0.20 0.25 0.30 0° 8° 10.00 10.40 10.65 1.27 0.12 0.15 0.935 0.40 0.70 1.27 1.45 MASS[Typ.] 0.07g D F 20 NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. 11 c HE *2 E bp Terminal cross section ( Ni/Pd/Au plating ) Index mark Reference Symbol 1 e bp L1 x M A Z 10 *3 A1 θ L y Detail F Rev.2.00 Mar 30, 2006 page 8 of 8 D E A2 A1 A bp b1 c c1 θ HE e x y Z L L1 Dimension in Millimeters Min Nom Max 6.50 6.80 4.40 0.03 0.07 0.10 1.10 0.15 0.20 0.25 0.10 0.15 0.20 0° 8° 6.20 6.40 6.60 0.65 0.13 0.10 0.65 0.4 0.5 0.6 1.0 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. 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