IRFW/I550A Advanced Power MOSFET FEATURES BVDSS = 100 V Avalanche Rugged Technology RDS(on) = 0.04 Ω Rugged Gate Oxide Technology Lower Input Capacitance ID = 40 A Improved Gate Charge Extended Safe Operating Area D2-PAK Ο 175 C Operating Temperature Lower Leakage Current : 10 µA (Max.) @ VDS = 100V Lower RDS(ON) : 0.032 Ω (Typ.) I2-PAK 2 1 1 2 3 3 1. Gate 2. Drain 3. Source Absolute Maximum Ratings Symbol VDSS Characteristic Drain-to-Source Voltage Value Ο ID Continuous Drain Current (TC=25 C) Continuous Drain Current (TC=100 C) Drain Current-Pulsed VGS Gate-to-Source Voltage EAS Single Pulsed Avalanche Energy IAR Avalanche Current EAR Repetitive Avalanche Energy dv/dt Peak Diode Recovery dv/dt A 28.3 1 O 160 + _ 20 A O 1 O 1 O O3 640 mJ 40 A 2 Total Power Dissipation (TA=25 C) * Ο TJ , TSTG V 40 Ο IDM PD Units 100 Ο V 16.7 mJ 6.5 V/ns 3.8 W Total Power Dissipation (TC=25 C ) 167 W Linear Derating Factor 1.11 W/ C Operating Junction and Ο - 55 to +175 Storage Temperature Range Ο TL Maximum Lead Temp. for Soldering C 300 Purposes, 1/8” from case for 5-seconds Thermal Resistance Symbol Characteristic Typ. Max. R θJC Junction-to-Case -- 0.9 R θJA Junction-to-Ambient * -- 40 R θJA Junction-to-Ambient -- 62.5 Units Ο C /W * When mounted on the minimum pad size recommended (PCB Mount). Rev. B ©1999 Fairchild Semiconductor Corporation N-CHANNEL POWER MOSFET IRFW/I550A Electrical Characteristics (TC=25 C unless otherwise specified) Ο Symbol Characteristic BVDSS Drain-Source Breakdown Voltage ∆ BV/ ∆TJ VGS(th) IGSS IDSS RDS(on) Min. Typ. Max. Units 100 -- -- V Ο 0.11 -- V/ C 2.0 -- 4.0 V Gate-Source Leakage , Forward -- -- 100 Gate-Source Leakage , Reverse -- -- -100 -- -- 10 -- -- 100 -- -- 0.04 Ω VGS=10V,ID=20A 4 O -- Ω VDS=40V,ID=20A 4 O Gate Threshold Voltage Drain-to-Source Leakage Current Static Drain-Source On-State Resistance Forward Transconductance -- 27.44 Ciss Input Capacitance -- 1750 2270 Coss Output Capacitance -- 420 485 Crss Reverse Transfer Capacitance -- 185 215 td(on) Turn-On Delay Time -- 17 50 Rise Time -- 20 50 Turn-Off Delay Time -- 80 160 Fall Time -- 45 100 Qg Total Gate Charge -- 75 97 Qgs Gate-Source Charge -- 13.2 -- Qgd Gate-Drain(“Miller”) Charge -- 34.8 -- td(off) tf VGS=0V,ID=250 µA ID=250µ A See Fig 7 -- Breakdown Voltage Temp. Coeff. gfs tr Test Condition nA µA pF VDS=5V,ID=250 µA VGS=20V VGS=-20V VDS=100V Ο VDS=80V,TC=150 C VGS=0V,VDS=25V,f =1MHz See Fig 5 VDD=50V,ID=40A, ns RG=6.2 Ω See Fig 13 4 O 5 O VDS=80V,VGS=10V, nC ID=40A See Fig 6 & Fig 12 4 O 5 O Source-Drain Diode Ratings and Characteristics Symbol Characteristic Min. Typ. Max. Units Test Condition IS Continuous Source Current -- -- 40 ISM Pulsed-Source Current 1 O -- -- 160 VSD Diode Forward Voltage 4 O -- -- 1.6 V TJ=25 C ,IS=40A,VGS=0V trr Reverse Recovery Time -- 135 -- TJ=25 C ,IF=40A Qrr Reverse Recovery Charge -- 0.65 -- ns µC A Notes ; Temperature 1 O Repetitive Rating : Pulse Width Limited by Maximum Junction o 2 L=0.6mH, I AS=40A, V DD=25V, R G=27Ω , Starting T J =25 C O O3 ISD <_ 40A, di/dt <_ 470A/ µs, VDD<_ BVDSS , Starting T J =25 oC _2% 4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < O Essentially Independent of Operating Temperature 5 O Integral reverse pn-diode in the MOSFET Ο Ο diF/dt=100A/ µs 4 O N-CHANNEL POWER MOSFET IRFW/I550A Fig 1. Output Characteristics VGS 15V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom : 4.5 V [A] Top : ID , Drain Current [A] 102 ID , Drain Current Fig 2. Transfer Characteristics 1 10 @ Notes : 1. 250 µs Pulse Test 2. TC = 25 oC 100 10-1 100 102 175 oC 101 25 oC - 55 oC 100 101 2 3. 250 µs Pulse Test 4 6 8 10 VGS , Gate-Source Voltage [V] [A] VDS , Drain-Source Voltage [V] Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage 0.06 0.05 IDR , Reverse Drain Current RDS(on) , [Ω] Drain-Source On-Resistance @ Notes : 1. VGS = 0 V 2. VDS = 40 V VGS = 10 V 0.04 0.03 VGS = 20 V 0.02 0.01 @ Note : TJ = 25 oC 25 50 75 100 125 150 101 175 @ Notes : 1. VGS = 0 V 175 oC o 2. 250 µs Pulse Test 25 C 100 0.4 0.00 0 102 0.6 0.8 ID , Drain Current [A] 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 VSD , Source-Drain Voltage [V] Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage Ciss= Cgs+ Cgd ( Cds= shorted ) Coss= Cds+ Cgd [V] Capacitance [pF] C iss Crss= Cgd VGS , Gate-Source Voltage 3000 2000 C oss 1000 00 10 @ Notes : 1. VGS = 0 V C rss 2. f = 1 MHz 101 VDS , Drain-Source Voltage [V] VDS = 20 V 10 VDS = 50 V VDS = 80 V 5 @ Notes : ID =40.0 A 0 0 10 20 30 40 50 60 QG , Total Gate Charge [nC] 70 80 N-CHANNEL POWER MOSFET Fig 7. Breakdown Voltage vs. Temperature 1.2 1.1 1.0 0.9 Fig 8. On-Resistance vs. Temperature RDS(on) , (Normalized) Drain-Source On-Resistance BVDSS , (Normalized) Drain-Source Breakdown Voltage IRFW/I550A @ Notes : 1. VGS = 0 V 2. ID = 250 µA 0.8 -75 -50 -25 0 25 50 75 100 125 150 175 3.0 2.5 2.0 1.5 1.0 2. ID = 20.0 A 0.0 -75 200 -25 0 25 50 75 100 125 150 175 200 TJ , Junction Temperature [ oC] Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature 50 [A] [A] -50 TJ , Junction Temperature [ oC] 103 Operation in This Area is Limited by R DS(on) ID , Drain Current 10 µs 102 100 µs 1 ms 10 ms 101 DC @ Notes : 1. TC = 25 oC 100 40 30 20 10 2. TJ = 175 oC 3. Single Pulse 10-1 100 101 0 25 102 50 75 100 125 Tc , Case Temperature [ oC] VDS , Drain-Source Voltage [V] Thermal Response Fig 11. Thermal Response θ Z JC(t) , ID , Drain Current @ Notes : 1. VGS = 10 V 0.5 100 D=0.5 @ Notes : 1. Zθ J C (t)=0.9 o C/W Max. 2. Duty Factor, D=t1 /t2 0.2 10- 1 0.1 3. TJ M -TC =PD M *Zθ J C (t) 0.05 0.02 0.01 PDM t1 single pulse t2 10- 2 10- 5 10- 4 10- 3 10- 2 10- 1 t 1 , Square Wave Pulse Duration 100 [sec] 101 150 175 N-CHANNEL POWER MOSFET IRFW/I550A Fig 12. Gate Charge Test Circuit & Waveform “ Current Regulator ” 50K Ω 12V VGS Same Type as DUT Qg 200nF 10V 300nF VDS Qgd Qgs VGS DUT 3mA R1 R2 Current Sampling (I G) Resistor Charge Current Sampling (I D) Resistor Fig 13. Resistive Switching Test Circuit & Waveforms RL Vout Vout 90% VDD Vin ( 0.5 rated V DS ) RG DUT Vin 10V 10% td(on) tr td(off) t on tf t off Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms BVDSS 1 EAS = ---- LL IAS2 -------------------2 BVDSS -- VDD LL VDS Vary tp to obtain required peak ID BVDSS IAS ID RG C DUT ID (t) VDD VDS (t) VDD 10V tp tp Time N-CHANNEL POWER MOSFET IRFW/I550A Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + VDS -- IS L Driver VGS RG VGS VGS ( Driver ) Same Type as DUT VDD • dv/dt controlled by “RG” • IS controlled by Duty Factor “D” Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current IS ( DUT ) di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt Vf Body Diode Forward Voltage Drop VDD TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. 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