AD AD8058ARM-REEL Low cost, high performance voltage feedback, 325 mhz amplifier Datasheet

a
Low Cost, High Performance
Voltage Feedback, 325 MHz Amplifiers
AD8057/AD8058
FEATURES
Low Cost Single (AD8057) and Dual (AD8058)
High Speed
325 MHz, –3 dB Bandwidth (G = +1)
1000 V/␮s Slew Rate
Gain Flatness 0.1 dB to 28 MHz
Low Noise
7 nV/√Hz
Low Power
5.4 mA/Amplifier Typical Supply Current @ +5 V
Low Distortion
–85 dBc @ 5 MHz, RL = 1 k⍀
Wide Supply Range from 3 V to 12 V
Small Packaging
AD8057 Available in SOIC-8 and SOT-23-5
AD8058 Available in SOIC-8 and ␮SOIC
CONNECTION DIAGRAMS (TOP VIEWS)
SOT-23-5 (RT-5)
VOUT 1
+IN 3
The AD8057 and AD8058 are available in standard SOIC
packaging as well as tiny SOT-23-5 (AD8057) and µSOIC
(AD8058). These amplifiers are available in the industrial temperature range of –40°C to +85°C.
–IN
4
NC 1
8
–IN 2
7
+VS
+IN 3
6
VOUT
5
NC
–VS 4
(Not to Scale)
AD8057
(Not to Scale)
NC
NC = NO CONNECT
RM-8 (␮SOIC)
SO-8 (SOIC)
OUT1
1
–IN1
AD8058
8
+VS
2
7
OUT2
+IN1
3
6
–IN2
–VS
4
5
+IN2
(Not to Scale)
5
PRODUCT DESCRIPTION
4
3
2
GAIN – dB
The AD8057 and AD8058 are voltage feedback amplifiers with
the bandwidth and slew rate normally found in current feedback
amplifiers. The AD8057 and AD8058 are low power amplifiers
having low quiescent current and a wide supply range from 3 V
to 12 V. They have noise and distortion performance required
for high-end video systems as well as dc performance parameters rarely found in high speed amplifiers.
+VS
5
–VS 2
APPLICATIONS
Imaging
DVD/CD
Photodiode Preamp
A-to-D Driver
Professional Cameras
Filters
The AD8057 (single) and AD8058 (dual) are very high performance amplifiers with a very low cost. The balance between
cost and performance make them ideal for many applications.
The AD8057 and AD8058 will reduce the need to qualify a
variety of specialty amplifiers.
AD8057
SO-8 (SOIC)
1
G = +1
0
–1
G = +5
–2
G = +2
–3
G = +10
–4
–5
1
10
100
FREQUENCY – MHz
1000
Figure 1. Small Signal Frequency Response
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1999
(@ TA = +25ⴗC, VS = ⴞ5 V, RL = 100 ⍀, RF = 0 ⍀, Gain = +1,
AD8057/AD8058–SPECIFICATIONS unless otherwise noted)
Parameter
DYNAMIC PERFORMANCE
–3 dB Bandwidth
Bandwidth for 0.1 dB Flatness
Slew Rate
Settling Time to 0.1%
NOISE/HARMONIC PERFORMANCE
Total Harmonic Distortion
SFDR
Third Order Intercept
Crosstalk, Output to Output
Input Voltage Noise
Input Current Noise
Differential Gain Error
Differential Phase Error
Overload Recovery
Conditions
Min
325
95
175
30
850
1150
30
MHz
MHz
MHz
MHz
V/µs
V/µs
ns
fC = 5 MHz, VO = 2 V p-p, RL = 1 kΩ
fC = 20 MHz, VO = 2 V p-p, RL = 1 kΩ
f = 5 MHz, VO = 2 V p-p, RL = 150 Ω
f = 5 MHz, VO = ± 2.0 V p-p
f = 5␣ MHz, G = +2
f = 100 kHz
f = 100 kHz
NTSC, G = +2, RL = 150 Ω
NTSC, G = +2, RL = 1 kΩ
NTSC, G = +2, RL = 150 Ω
NTSC, G = +2, RL = 1 kΩ
VIN = 200 mV p-p, G = +1
–85
–62
–68
–35
–60
7
0.7
0.01
0.02
0.15
0.01
30
dBc
dBc
dB
dBm
dB
nV/√Hz
pA/√Hz
%
%
Degree
Degree
ns
1
2.5
3
0.5
3.0
TMIN –T MAX
Input Offset Voltage Drift
Input Bias Current
TMIN –T MAX
INPUT CHARACTERISTICS
Input Resistance
Input Capacitance
Input Common-Mode Voltage Range
Common-Mode Rejection Ratio
OUTPUT CHARACTERISTICS
Output Voltage Swing
Capacitive Load Drive
POWER SUPPLY
Operating Range
Quiescent Current for AD8057
Quiescent Current for AD8058
Power Supply Rejection Ratio
Units
G = +1, VO = 0.2 V p-p
G = –1, VO = 0.2 V p-p
G = +1, VO = 2 V p-p
G = +1, VO = 0.2 V p-p
G = +1, VO = 2 V Step, R L = 2 kΩ
G = +1, VO = 4 V Step, R L = 2 kΩ
G = +2, VO = 2 V Step
DC PERFORMANCE
Input Offset Voltage
Input Offset Current
Open-Loop Gain
AD8057/AD8058
Typ
Max
VO = ± 2.5 V, RL = 2 kΩ
VO = ± 2.5 V, RL = 150 Ω
5
2.5
0.75
50
50
55
52
10
2
+Input
RL = 1 kΩ
VCM = ±2.5 V
–4.0
48
RL = 2 kΩ
RL = 150 Ω
30% Overshoot
–4.0
± 1.5
VS = ± 5 V to ± 1.5 V
54
+4.0
60
± 3.9
30
± 6.0
6.0
14.0
59
mV
mV
µV/°C
µA
µA
±µA
dB
dB
MΩ
pF
±V
dB
+4.0
±V
±V
pF
± 2.5
7.5
15
V
mA
mA
dB
Specifications subject to change without notice.
–2–
REV. A
AD8057/AD8058
SPECIFICATIONS (@ T = +25ⴗC, V = +5 V, R = 100 ⍀, R = 0 ⍀, Gain = +1, unless otherwise noted)
A
Parameter
DYNAMIC PERFORMANCE
–3 dB Bandwidth
Bandwidth for 0.1 dB Flatness
Slew Rate
Settling Time to 0.1%
NOISE/HARMONIC PERFORMANCE
Total Harmonic Distortion
Crosstalk, Output to Output
Input Voltage Noise
Input Current Noise
Differential Gain Error
Differential Phase Error
S
L
F
Conditions
Min
300
155
28
700
35
MHz
MHz
MHz
V/µs
ns
fC = 5 MHz, VO = 2 V p-p, RL = 1 kΩ
fC = 20 MHz, VO = 2 V p-p, RL = 1 kΩ
f = 5␣ MHz, G = +2
f = 100 kHz
f = 100 kHz
NTSC, G = +2, RL = 150 Ω
NTSC, G = +2, RL = 1 kΩ
NTSC, G = +2, RL = 150 Ω
NTSC, G = +2, RL = 1 kΩ
–75
–54
–60
7
0.7
0.05
0.05
0.10
0.02
dBc
dBc
dB
nV/√Hz
pA/√Hz
%
%
Degree
Degree
1
2.5
3
0.5
3.0
50
45
55
52
mV
mV
µV/°C
µA
µA
µA
dB
dB
48
10
2
0.9 to 3.4
60
MΩ
pF
±V
dB
0.9 to 4.1
1.2 to 3.8
30
V
V
pF
TMIN–TMAX
Input Offset Voltage Drift
Input Bias Current
TMIN–TMAX
INPUT CHARACTERISTICS
Input Resistance
Input Capacitance
Input Common-Mode Voltage Range
Common-Mode Rejection Ratio
OUTPUT CHARACTERISTICS
Output Voltage Swing
Capacitive Load Drive
POWER SUPPLY
Operating Range
Quiescent Current for AD8057
Quiescent Current for AD8058
Power Supply Rejection Ratio
VO = ± 1.25 V, RL = 2 kΩ
VO = ± 1.25 V, RL = 150 Ω
+Input
RL = 1 kΩ
VCM = ±2.5 V
3.0
VS = ± 2.5 V to ± 1.5 V
–3–
5
2.5
0.75
RL = 2 kΩ
RL = 150 Ω
30% Overshoot
Specifications subject to change without notice.
REV. A
Units
G = +1, VO = 0.2 V p-p
G = +1, VO = 2 V p-p
VO = 0.2 V p-p
G = +1, VO = 2 V Step, R L = 2 kΩ
G = +2, VO = 2 V Step
DC PERFORMANCE
Input Offset Voltage
Input Offset Current
Open-Loop Gain
AD8057/AD8058
Typ
Max
54
6.0
5.4
13.5
58
10.0
7.0
14
V
mA
mA
dB
AD8057/AD8058
ABSOLUTE MAXIMUM RATINGS 1
MAXIMUM POWER DISSIPATION
Supply␣ Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.6␣ V
Internal␣ Power␣ Dissipation2
Small␣ Outline␣ Package (R) . . . . . . . . . . . . . . . . . . . . . 0.8␣ W
SOT-23-5 Package . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 W
µSOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.6 W
Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . ± VS
Differential␣ Input␣ Voltage . . . . . . . . . . . . . . . . . . . . . . ± 4.0␣ V
Output Short Circuit Duration
. . . . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves
Storage Temperature Range (R) . . . . . . . . . –65°C to +125°C
Operating Temperature Range (A Grade) . . –40°C to +85°C
Lead Temperature Range (Soldering␣ 10␣ sec) . . . . . . . +300°C
The maximum power that can be safely dissipated by the
AD8057/AD8058 is limited by the associated rise in junction
temperature. Exceeding a junction temperature of +175°C for
an extended period can result in device failure. While the
AD8057/AD8058 is internally short circuit protected, this may
not be sufficient to guarantee that the maximum junction temperature (+150°C) is not exceeded under all conditions.
To ensure proper operation, it is necessary to observe the maximum power derating curves.
NOTES
1Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2Specification is for device in free air:
8-Lead SOIC Package: θJA = 160°C/W
5-Lead SOT-23-5 Package: θ JA = 240°C/W
8-Lead µSOIC Package: θ JA = 200°C/W
MAXIMUM POWER DISSIPATION – Watts
2.0
TJ = +1508C
1.5
8-LEAD SOIC PACKAGE
1.0
mSOIC
0.5
SOT-23-5
0
–50 –40 –30 –20 –10 0 10 20 30 40 50 60
AMBIENT TEMPERATURE – 8C
70
80
90
Figure 2. Plot of Maximum Power Dissipation vs.
Temperature
ORDERING GUIDE
Model
Temperature
Range
Package
Descriptions
Package
Options
Brand Code
AD8057AR
AD8057ACHIPS
AD8057AR-REEL
AD8057AR-REEL7
AD8057ART-REEL
AD8057ART-REEL7
AD8058AR
AD8058ACHIPS
AD8058AR-REEL
AD8058AR-REEL7
AD8058ARM
AD8058ARM-REEL
AD8058ARM-REEL7
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
8-Lead Narrow Body SOIC
Die
8-Lead SOIC, 13" Reel
8-Lead SOIC, 7" Reel
5-Lead SOT-23, 13" Reel
5-Lead SOT-23, 7" Reel
8-Lead Narrow Body SOIC
Die
8-Lead SOIC, 13" Reel
8-Lead SOIC, 7" Reel
8-Lead µSOIC
8-Lead µSOIC, 13" Reel
8-Lead µSOIC, 7" Reel
SO-8
Waffle Pak
SO-8
SO-8
RT-5
RT-5
SO-8
Waffle Pak
SO-8
SO-8
RM-8
RM-8
RM-8
Standard
N/A
Standard
Standard
H7A
H7A
Standard
N/A
Standard
Standard
H8A
H8A
H8A
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD8057/AD8058 feature proprietary ESD protection circuitry, permanent damage
may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
–4–
WARNING!
ESD SENSITIVE DEVICE
REV. A
Typical Performance Characteristics– AD8057/AD8058
0.0
4.5
–1.5V SWING RL = 150V
(+) OUTPUT
VOLTAGE
4.0
–0.5
–1.0
–2.5V SWING RL = 150V
–1.5
ABS (–)
OUTPUT
3.0
–2.0
VOLTS
OUTPUT VOLTAGE
3.5
2.5
2.0
–2.5
–3.0
1.5
–3.5
1.0
–4.0
0.5
–4.5
0
10
100
1k
10k
LOAD RESISTANCE – V
–5V SWING RL = 150V
–5.0
–40 –30 –20 –10
100k
0
10 20 30 40
TEMPERATURE – 8C
50
60
70
80 85
Figure 6. Negative Output Voltage Swing vs.
Temperature
Figure 3. Output Swing vs. Load Resistance
6
–3.0
–3.5
4
–4.0
2
–5.0
–I SUPPLY @ 61.5V
VOS – mV
–ISUPPLY – mA
–4.5
–5.5
–6.0
–ISUPPLY @ 65V
VOS @ 61.5V
0
VOS @ 65V
–2
–6.5
–7.0
–4
–7.5
–8.0
–40 –30 –20 –10
0
10 20 30 40
TEMPERATURE – C
50
60
70
–6
–40 –30 –20 –10
80 85
0
10 20 30 40
TEMPERATURE – 8C
50
60
70
80
70
80 85
Figure 7. VOS vs. Temperature
Figure 4. –ISUPPLY vs. Temperature
3.5
5.0
4.5
3.0
+5V SWING RL = 150V
AVOL @ 65V
4.0
2.5
AVOL – mV/V
3.5
VOLTS
3.0
2.5
2.0
+2.5V SWING RL = 150V
2.0
AVOL @ 62.5V
1.5
1.0
1.5
1.0
0.5
+1.5V SWING RL = 150V
0.5
0.0
–40 –30 –20 –10
0
10 20 30 40
TEMPERATURE – 8C
50
60
70
0
–40 –30 –20 –10
80 85
10 20 30 40
TEMPERATURE – 8C
50
60
Figure 8. Open-Loop Gain vs. Temperature
Figure 5. Positive Output Voltage Swing vs.
Temperature
REV. A
0
–5–
AD8057/AD8058 –Typical Performance Characteristics
+VS 4.7mF
0.00
–0.10
0.01mF
–0.20
HP8130A
PULSE
GENERATOR
TR/TF = 1ns
IB – mA
–0.30
0.001mF
VIN
50V
VOUT
AD8057/58
–0.40
4.7mF
+IB @ 65V
–0.50
–0.60
–0.70
+IB @ 62.5V
0.001mF
–I B @ 62.5V
–I B @ 65V
1kV
0.01mF
+IB @ 61.5V
–I B @ 61.5V
–VS
–0.80
–40 –30 –20 –10
10
0
20
30
40
50
60
70
80 85
TEMPERATURE – C
Figure 12. Test Circuit G = +1, RL = 1 kΩ for Figures 13
and 14
Figure 9. Input Bias Current vs. Temperature
4
100mV
3
PSRR – mV/V
PSRR @ 61.5V 65V
20mV/
DIV
2
1
0
–40 –30 –20 –10
–100mV
0
10 20 30 40
TEMPERATURE – C
50
60
70
4ns/DIV
80 85
Figure 13. Small Signal Step Response G = +1, RL = 1 kΩ,
VS = ± 5 V
Figure 10. PSRR vs. Temperature
0
5V
–10
PSRR – dB
–20
–PSRR VS = 62.5V
1V/DIV
–30
+PSRR VS = 62.5V
–40
–50
–60
0.1
–5V
1
10
FREQUENCY – MHz
100
4ns/DIV
1000
Figure 14. Large Signal Step Response G = +1, RL = 1 kΩ,
VS = ± 5.0 V
Figure 11. ± PSRR vs. Frequency
–6–
REV. A
AD8057/AD8058
5
1kV
4
+VS 4.7mF
3
0.01mF
0.001mF
VIN 1kV
50V
GAIN – dB
HP8130A
PULSE
GENERATOR
TR/TF = 1ns
2
VOUT
AD8057/58
4.7mF
1kV
1
G = +1
0
–1
G = +5
0.01mF
–2
0.001mF
–3
G = +2
G = +10
–4
–VS
–5
Figure 15. Test Circuit G = –1, RL = 1 kΩ for Figures 16
and 17
1
10
100
FREQUENCY – MHz
1000
Figure 18. Small Signal Frequency Response,
VOUT = 0.2 V p-p
5
100mV
4
3
2
GAIN – dB
20mV/
DIV
0V
1
G = +1
0
G = +5
–1
–2
G = +2
–3
G = +10
–4
–100mV
4ns/DIV
–5
1
10
100
1000
FREQUENCY – MHz
Figure 16. Small Signal Step Response G = –1, RL = 1 k Ω
Figure 19. Large Signal Frequency Response, VOUT = 2 V p-p
5
5V
4
3
2
GAIN – dB
1V/DIV
1
G = –2
G = –1
0
–1
–2
G = –5
–3
–5V
–5
Figure 17. Large Signal Step Response G = –1, RL = 1 kΩ
REV. A
G = –10
–4
4ns/DIV
1
10
100
FREQUENCY – MHz
1000
Figure 20. Large Signal Frequency Response
–7–
AD8057/AD8058
5.0
0.5
VOUT = 0.2V
G = +2
RL = 1.0kV
RF = 1.0kV
0.3
4.5
RISE TIME AND FALL TIME – ns
0.4
0.2
GAIN – dB
0.1
0.0
–0.1
–0.2
–0.3
4.0
3.5
3.0
2.5
2.0
FALL TIME
1.5
RISE TIME
1.0
–0.4
0.5
–0.5
0.0
1
10
100
FREQUENCY – MHz
1000
0
1
2
VOUT – V p-p
3
4
Figure 24. Rise Time and Fall Time vs. VOUT. G = +1,
RL = 1 kΩ, R F = 0 Ω
Figure 21. 0.1 dB Flatness G = +2
–50
5
RISE TIME AND FALL TIME – ns
DISTORTION – dBc
–60
THD
–70
2ND
–80
3RD
–90
–100
–110
0.1
1
10
FREQUENCY – MHz
4
3
RISE TIME
2
FALL TIME
1
0
100
Figure 22. Distortion vs. Frequency, RL = 150 Ω
0
2
VOUT – V p-p
1
3
4
Figure 25. Rise Time and Fall Time vs. VOUT. G = +2,
RL = 100 Ω, R F = 402 Ω
–40
VOUT = –1V TO + 1V OR +1V TO –1V
G = +2
RL = 100V/1kV
0.4%
0.3%
DISTORTION – dBc
–50
0.2%
20MHz
0.1%
–60
0.0%
–0.1%
5MHz
–0.2%
–70
–0.3%
–0.4%
–80
0.0
0
0.4
0.8
1.2
1.6
2.0
2.4
VOUT – V p-p
2.8
3.2
3.6
4.0
10 20
30 40 50 60
TIME – ns
Figure 26. Settling Time
Figure 23. Distortion vs. VOUT @ 20 MHz, 5 MHz, RL = 150 Ω,
VS = ±5.0 V
–8–
REV. A
AD8057/AD8058
INPUT SIGNAL
1.8V
VS = 62.5V
RL = 1kV
G = +1
OUTPUT SIGNAL 1.7V
2.5V
VS = 62.5V
R1 = 1kV
G = +4
OUTPUT RESPONSE
500mV/
DIV
200mV/
DIV
INPUT SIGNAL = 0.6V
0V
20ns/DIV
20ns/DIV
Figure 27. Input Overload Recovery, VS = ± 2.5 V
Figure 30. Output Overload Recovery, VS = ±2.5 V
4.5V
VS = 65.0V
RL = 1kV
G = +1
VS = 65.0V
R1 = 1kV
G = +4
INPUT SIGNAL 5V
5.0V
500mV/
DIV
1V/DIV
OUTPUT SIGNAL = 4.0V
0V
20ns/DIV
20ns/DIV
Figure 28. Output Overload Recovery, VS = ± 5.0 V
37ns
Figure 31. Output Overload Recovery, VS = ±5.0 V
0
0
–10
–20
CROSSTALK – dB
CMRR – dB
–20
–30
–40
–40
–60
SIDE B DRIVEN
–80
–50
SIDE A DRIVEN
–100
–60
–70
0.1
1
10
FREQUENCY – MHz
–120
0.1
100
Figure 29. CMRR vs. Frequency
REV. A
1
10
FREQUENCY – MHz
100
Figure 32. Crosstalk (Output-to-Output) vs. Frequency
–9–
AD8057/AD8058
0.015
DIFFERENTIAL GAIN (%)
0.00 –0.00 0.00 0.00 –0.00 –0.00 –0.00 –0.00 –0.00 –0.00 –0.00
0.010
0.01
–0.01
0.000
–0.02
–0.005
–0.03
–0.010
–0.04
–0.05
–0.015
0.14
0.12
0.10
0.08
0.06
0.04
0.02
0.00
–0.02
VS = +5V
RL = 150V
0.00
VS = 65.0V
RL = 150V
0.005
DIFFERENTIAL GAIN (%)
0.00 –0.00 –0.00–0.01 –0.01 –0.01 –0.01 –0.01 –0.02 –0.03 –0.04
DIFFERENTIAL PHASE (Degrees)
0.00 0.00 0.02 0.03 0.05 0.07 0.09 0.10 0.11 0.12 0.13
0.14
0.12
0.10
0.08
0.06
0.04
0.02
0.00
–0.02
VS = 65.0V
RL = 150V
1st
2nd 3rd
4th
5th
6th
7th
8th
9th
DIFFERENTIAL PHASE (Degrees)
0.00 0.01 0.03 0.05 0.07 0.09 0.11 0.12 0.12 0.13 0.13
VS = +5V
RL = 150V
1st
10th 11th
2nd 3rd
4th
DIFFERENTIAL GAIN (%)
0.00 0.00 0.00 0.01 0.01 0.00 0.00 0.00 –0.00 –0.01 –0.01
0.01
7th
8th
9th
10th 11th
0.005
DIFFERENTIAL GAIN (%)
0.00 0.01 –0.00–0.01 –0.01 –0.01 –0.02 –0.02 –0.03 –0.04 –0.05
VS = +5V
RL = 1kV
0.00
VS = 65.0V
RL = 1kV
0.010
–0.01
0.000
–0.02
–0.005
–0.03
–0.010
–0.04
–0.05
–0.015
0.14
0.12
0.10
0.08
0.06
0.04
0.02
0.00
–0.02
6th
a.
a.
0.015
5th
DIFFERENTIAL PHASE (Degrees)
0.00 0.00 0.00 –0.00 –0.00 –0.00 –0.01 –0.01 –0.01 –0.01 –0.01`
0.14
0.12
0.10
0.08
0.06
0.04
0.02
0.00
–0.02
VS = 65.0V
RL = 1kV
1st
2nd 3rd
4th
5th
6th
7th
8th
9th
DIFFERENTIAL PHASE (Degrees)
0.00 –0.00 0.00 0.00 –0.00 –0.00 –0.00 –0.00 –0.01 –0.01 –0.02
VS = +5V
RL = 1kV
1st
10th 11th
2nd 3rd
4th
5th
6th
7th
8th
9th
10th 11th
b.
b.
Figure 33. Differential Gain and Differential Phase One
Back Terminated Load (150 Ω) (Video Op Amps Only)
Figure 35. Differential Gain and Differential Phase
a. RL = 150 Ω, b. RL = 1 kΩ
100
80
90
60
45
40
0
20
1
0
–45
–90
0.01
10
VNOISE – nV/ Hz
135
OPEN-LOOP GAIN – dB
PHASE – Degrees
180
0.1
1
10
FREQUENCY – MHz
100
–20
1000
0.1
10
100
1k
10k
100k
FREQUENCY – Hz
1M
10M
100M
Figure 36. Voltage Noise vs. Frequency
Figure 34. Open-Loop Gain and Phase vs. Frequency
–10–
REV. A
AD8057/AD8058
10
10
ZOUT – V
100
INOISE – pA/ Hz
100
1
1
0.1
10
100
1k
10k
100k
FREQUENCY – Hz
1M
10M
0.1
0.1
100M
1
10
FREQUENCY – MHz
1000
100
Figure 38. Output Impedance vs. Frequency
Figure 37. Current Noise vs. Frequency
APPLICATIONS
Driving Capacitive Loads
Table I. Recommended Value for Resistors R S, RF, RG vs.
Capacitive Load, C L, Which Results in 30% Overshoot
When driving a capacitive load, most op amps will exhibit overshoot in their pulse response.
Figure 39 shows the relationship between the capacitive load that
results in 30% overshoot and closed loop gain of an AD8058. It can
be seen that, under the Gain = +2 condition, the device is stable
with capacitive loads of up to 69 pF.
In general, to minimize peaking or to ensure device stability for
larger values of capacitive loads, a small series resistor, RS, can
be added between the op amp output and the load capacitor, CL,
as shown in Figure 40.
Gain
1
2
3
4
5
10
RF
100
100
100
100
100
100
RG
100
50
33.2
25
11
CL w/RS = 0 ⍀
11
51
104
186
245
870
CL w/RS = 2.4 ⍀
13
69
153
270
500
1580
RF
+2.5V
For the setup shown in Figure 40, the relationship between RS
and CL was empirically derived and is shown in Table I.
0.1mF
10mF
500
RG
RS
AD8058
VIN = 200mV p-p
400
FET PROBE
VOUT
CL
CL – pF
50kV
0.1mF
300
10mF
–2.5V
200
Figure 40. Capacitive Load Drive Circuit
RS = 2.4V
100
+ OVERSHOOT
29.0%
RS = 0V
0
1
2
3
CLOSED-LOOP GAIN
4
200mV
5
100mV
Figure 39. Capacitive Load Drive vs. Closed-Loop Gain
–100mV
–200mV
100mV
50ns/DIV
Figure 41. Typical Pulse Response with CL = 65 pF,
Gain = +2, and VS = ± 2.5 V
REV. A
–11–
AD8057/AD8058
Video Filter
Differential A-to-D Driver
Some composite video signals that are derived from a digital
source contain some clock feedthrough that can cause problems
with downstream circuitry. This clock feedthrough is usually at
27 MHz, which is a standard clock frequency for both NTSC
and PAL video systems. A filter that passes the video band and
rejects frequencies at 27 MHz can be used to remove these
frequencies from the video signal.
As system supply voltages are dropping, many A-to-D converters provide differential analog inputs to increase the dynamic
range of the input signal, while still operating on a low supply
voltage. Differential driving can also reduce second and other
even-order distortion products.
Figure 42 shows a circuit that uses an AD8057 to create a single
+5 V supply, three-pole Sallen-Key filter. This circuit uses a
single RC pole in front of a standard two-pole active section. To
shift the dc operating point to midsupply, ac coupling is provided by R4, R5 and C4.
C2
680pF
Op amp architectures that require upwards of 2 V of headroom
at the output have significant problems when trying to drive
such A-to-Ds while operating with a +5 V positive supply. The
low headroom output design of the AD8057 and AD8058 make
them ideal for driving these types of A-to-D converters.
RF
1kV
+5V
+5V
R1
200V
R2
499V
C1
100pF
R3
49.9V
C4
0.1mF
C3
36pF
R4
10kV
2
3
0.1mF
+
10mF
The AD8058 can be used to make a dc-coupled, single-endedto-differential driver for one of these A-to-Ds. Figure 44 is a
schematic of such a circuit for driving an AD9225, a 12-bit,
25 MSPS A-to-D converter.
7
AD8057
Analog Devices offers an assortment of 12- and 14-bit high
speed converters that have differential inputs and can be run
from a single +5 V supply. These include the AD9220, AD9221,
AD9223, AD9224 and AD9225 at 12 bits, and the AD9240,
AD9241, and AD9243 at 14 bits. Although these devices can
operate over a range of common-mode voltages at their analog
inputs, they work best when the common-mode voltage at the
input is at the midsupply or 2.5 V.
6
4
R5
10kV
1kV
+5V
Figure 42. Low-Pass Filter for Video
Figure 43 shows a frequency sweep of this filter. The response is
down 3 dB at 5.7 MHz, so it passes the video band with little
attenuation. The rejection at 27 MHz is 42 dB, which provides
more than a factor of 100 in suppression of the clock components at this frequency.
0.1mF
0.1mF
1kV
3
VIN
1kV
0V
+2.5V
+
10mF
+5V
+
10mF
8
AD8058
REF
50V
1
VINA
2
1kV
AD9225
10
1kV
0
1kV
LOG MAGNITUDE – dB
–10
1kV
6
AD8058
5
50V
7
VINB
4
–20
0.1mF
+
10mF
–30
–5V
–40
1kV
–50
Figure 44. Schematic Circuit for Driving AD9225
–60
In this circuit, one of the op amps is configured in the inverting
mode, while the other is in the noninverting mode. However, to
provide better bandwidth matching, each op amp is configured
for a noise gain of 2. The inverting op amp is configured for a
gain of –1, while the noninverting op amp is configured for a
gain of +2. Each of these produces a noise gain of 2, which is
only determined by the inverse of the feedback ratio. The input
signal to the noninverting op amp is divided by 2 in order to
normalize its level and make it equal to the inverting output.
–70
–80
–90
100k
1M
10M
FREQUENCY – Hz
Figure 43. Video Filter Response
100M
–12–
REV. A
AD8057/AD8058
For zero volts input, the outputs of the op amps want to be at
2.5 V, which is the midsupply level of the A-to-D. This is accomplished by first taking the 2.5 V reference output of the
A-to-D and dividing it by two by a pair of 1 kΩ resistors. The
resulting 1.25 V is applied to each op amp’s positive input. This
voltage is then multiplied by the gain of 2 of the op amps to
provide a 2.5 V level at each output.
this voltage in the negative direction. The inverting stage does
not have this problem, because its common-mode input voltage
remains fixed at 1.25 V. If dc-coupling is not required, various
ac-coupling techniques can be used to eliminate this problem.
Layout
The assumption for this circuit is that the input signal is bipolar
with respect to round and the circuit must be dc coupled. This
implies the existence of a negative supply elsewhere in the system.
This circuit uses –5 V as the negative supply for the AD8058.
The AD8057 and AD8058 are high speed op amps and should
be used in a board layout that follows standard high speed design rules. All the signal traces should be as short and direct as
possible. In particular, the parasitic capacitance on the inverting
input of each device should be kept to a minimum to avoid
excessive peaking and other undesirable performance.
If the AD8058 negative supply were tied to ground, there would
be a problem at the input of the noninverting op amp. The
input common-mode voltage can only go to within 1 V of the
negative rail. Since this circuit requires that the positive inputs
operate with a 1.25 V bias, there is not enough room to swing
The power supplies should be bypassed very close to the power
pins of the package with 0.1 µF in parallel with a larger, approximately 10 µF tantalum capacitor. These capacitors should be
connected to a ground plane that is either on an inner layer, or
fills the area of the board that is not used for other signals.
REV. A
–13–
AD8057/AD8058
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead ␮SOIC
(RM-8)
0.122 (3.10)
0.114 (2.90)
8
0.122 (3.10)
0.114 (2.90)
0.1968 (5.00)
0.1890 (4.80)
5
0.199 (5.05)
0.187 (4.75)
1
C3388a–0–9/99
8-Lead Narrow Body SOIC
(SO-8)
0.1574 (4.00)
0.1497 (3.80)
8
5
1
4
0.2440 (6.20)
0.2284 (5.80)
4
PIN 1
0.0098 (0.25)
0.0040 (0.10)
PIN 1
0.0256 (0.65) BSC
0.120 (3.05)
0.112 (2.84)
0.018 (0.46)
SEATING 0.008 (0.20)
PLANE
0.120 (3.05)
0.112 (2.84)
0.043 (1.09)
0.037 (0.94)
0.011 (0.28)
0.003 (0.08)
0.0500 0.0192 (0.49)
SEATING (1.27)
0.0098 (0.25)
PLANE BSC 0.0138 (0.35) 0.0075 (0.19)
338
278
0.0196 (0.50)
x 45°
0.0099 (0.25)
8°
0° 0.0500 (1.27)
0.0160 (0.41)
0.028 (0.71)
0.016 (0.41)
5-Lead Surface Mount (SOT-23)
(RT-5)
0.1181 (3.00)
0.1102 (2.80)
0.0669 (1.70)
0.0590 (1.50)
5
1
4
2
3
0.1181 (3.00)
0.1024 (2.60)
PIN 1
0.0374 (0.95) BSC
0.0748 (1.90)
BSC
0.0512 (1.30)
0.0354 (0.90)
0.0059 (0.15)
0.0019 (0.05)
0.0079 (0.20)
0.0031 (0.08)
0.0571 (1.45)
0.0374 (0.95)
0.0197 (0.50)
0.0138 (0.35)
SEATING
PLANE
10°
0°
0.0217 (0.55)
0.0138 (0.35)
PRINTED IN U.S.A.
0.006 (0.15)
0.002 (0.05)
0.0688 (1.75)
0.0532 (1.35)
–14–
REV. A