CET CEP20A03 N-channel enhancement mode field effect transistor Datasheet

CEP20A03/CEB20A03
N-Channel Enhancement Mode Field Effect Transistor
PRELIMINARY
FEATURES
30V, 197A, RDS(ON) = 2 mΩ @VGS = 10V.
RDS(ON) = 3 mΩ @VGS = 4.5V.
Super high dense cell design for extremely low RDS(ON).
High power and current handing capability.
D
Lead-free plating ; RoHS compliant.
TO-220 & TO-263 package.
D
G
G
S
CEB SERIES
TO-263(DD-PAK)
G
D
S
CEP SERIES
TO-220
S
ABSOLUTE MAXIMUM RATINGS
Parameter
Tc = 25 C unless otherwise noted
Symbol
Limit
Drain-Source Voltage
VDS
Gate-Source Voltage
VGS
Drain Current-Continuous @ TC = 25 C
ID
@ TC = 100 C
Drain Current-Pulsed a
IDM
Maximum Power Dissipation @ TC = 25 C
PD
- Derate above 25 C
30
Units
V
±20
V
197
A
124
A
788
A
139
W
1.1
W/ C
d
EAS
800
mJ
Single Pulsed Avalanche Current d
IAS
40
A
TJ,Tstg
-55 to 150
C
Symbol
Limit
Units
Single Pulsed Avalanche Energy
Operating and Store Temperature Range
Thermal Characteristics
Parameter
Thermal Resistance, Junction-to-Case
RθJC
0.9
C/W
Thermal Resistance, Junction-to-Ambient
RθJA
62.5
C/W
This is preliminary information on a new product in development now .
Details are subject to change without notice .
1
Rev 1. 2012.Jun
http://www.cetsemi.com
CEP20A03/CEB20A03
Electrical Characteristics
Parameter
Tc = 25 C unless otherwise noted
Symbol
Test Condition
Min
Drain-Source Breakdown Voltage
BVDSS
VGS = 0V, ID = 250µA
30
Zero Gate Voltage Drain Current
IDSS
Gate Body Leakage Current, Forward
Gate Body Leakage Current, Reverse
Typ
Max
Units
VDS = 30V, VGS = 0V
1
µA
IGSSF
VGS = 20V, VDS = 0V
100
nA
IGSSR
VGS = -20V, VDS = 0V
-100
nA
Off Characteristics
V
On Characteristics b
Gate Threshold Voltage
VGS(th)
Static Drain-Source
On-Resistance
RDS(on)
Rg
Gate input resistance
Dynamic Characteristics
VGS = VDS, ID = 250µA
3
V
VGS = 10V, ID = 30A
1
1.6
2
mΩ
VGS = 4.5V, ID = 30A
2
3
mΩ
f=1MHz,open Drain
2
Ω
7950
pF
1055
pF
740
pF
c
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Switching Characteristics
VDS = 15V, VGS = 0V,
f = 1.0 MHz
c
Turn-On Delay Time
td(on)
Turn-On Rise Time
tr
Turn-Off Delay Time
td(off)
VDD = 15V, ID = 15A,
VGS = 4.5V, RGEN = 1Ω
41
82
ns
32
64
ns
92
184
ns
Turn-Off Fall Time
tf
30
60
ns
Total Gate Charge
Qg
96
125
nC
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
VDS = 15V, ID = 50A,
VGS = 4.5V
24
nC
39
nC
Drain-Source Diode Characteristics and Maximun Ratings
Drain-Source Diode Forward Current
IS
Drain-Source Diode Forward Voltage b
VSD
VGS = 0V, IS = 30A
Notes :
a.Repetitive Rating : Pulse width limited by maximum junction temperature
b.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%.
c.Guaranteed by design, not subject to production testing.
d.L = 1mH, IAS = 40A, VDD = 24V, RG = 25Ω, Starting TJ = 25 C
2
115
A
1.2
V
CEP20A03/CEB20A03
300
VGS=10,8,6,4V
100
ID, Drain Current (A)
ID, Drain Current (A)
125
75
VGS=3V
50
25
0
0
2
4
6
8
1.5
3
4.5
6
7.5
Figure 1. Output Characteristics
Figure 2. Transfer Characteristics
RDS(ON), Normalized
RDS(ON), On-Resistance(Ohms)
Ciss
4500
3000
Coss
1500
Crss
0
3
6
9
12
15
2.2
1.9
ID=30A
VGS=10V
1.6
1.3
1.0
0.7
0.4
-100
-50
0
50
100
150
200
VDS, Drain-to-Source Voltage (V)
TJ, Junction Temperature( C)
Figure 3. Capacitance
Figure 4. On-Resistance Variation
with Temperature
VDS=VGS
ID=250µA
1.1
1.0
0.9
0.8
0.7
0.6
-50
0
-55 C
VGS, Gate-to-Source Voltage (V)
IS, Source-drain current (A)
C, Capacitance (pF)
VTH, Normalized
Gate-Source Threshold Voltage
25 C
60 T =125 C
J
0
6000
1.2
120
VDS, Drain-to-Source Voltage (V)
7500
1.3
180
10
9000
0
240
-25
0
25
50
75
100
125
VGS=0V
10
2
10
1
10
0
0.4
150
0.6
0.8
1.0
1.2
1.4
TJ, Junction Temperature( C)
VSD, Body Diode Forward Voltage (V)
Figure 5. Gate Threshold Variation
with Temperature
Figure 6. Body Diode Forward Voltage
Variation with Source Current
3
5
10
VDS=15V
ID=50A
3
2
1
0
0
3
RDS(ON)Limit
100ms
4
ID, Drain Current (A)
VGS, Gate to Source Voltage (V)
CEP20A03/CEB20A03
20
40
60
80
10
10ms
DC
10
10
100
1ms
2
1
TC=25 C
TJ=150 C
Single Pulse
0
10
-1
10
0
10
1
10
Qg, Total Gate Charge (nC)
VDS, Drain-Source Voltage (V)
Figure 7. Gate Charge
Figure 8. Maximum Safe
Operating Area
VDD
t on
V IN
RL
D
VGS
RGEN
toff
tr
td(on)
td(off)
tf
90%
90%
VOUT
VOUT
10%
INVERTED
10%
G
90%
S
VIN
50%
50%
10%
PULSE WIDTH
Figure 10. Switching Waveforms
r(t),Normalized Effective
Transient Thermal Impedance
Figure 9. Switching Test Circuit
10
0
D=0.5
0.2
10
-1
PDM
0.1
t1
0.05
0.02
0.01
Single Pulse
10
1. RθJC (t)=r (t) * RθJC
2. RθJC=See Datasheet
3. TJM-TC = P* RθJC (t)
4. Duty Cycle, D=t1/t2
-2
10
-5
t2
10
-4
10
-3
10
-2
10
-1
Square Wave Pulse Duration (sec)
Figure 11. Normalized Thermal Transient Impedance Curve
4
10
0
10
1
2
Similar pages