Renesas FP-20DAV Continuous conduction mode interleaving pfc control ic Datasheet

Data Sheet
R2A20104/114 Series
Continuous Conduction Mode Interleaving
PFC Control IC
R03DS0008EJ0301
Rev.3.01
Jan 08, 2016
Description
R2A20104/114 series is a boost converter control IC with PFC (Power Factor Correction). Employing continuous
conduction mode interleaving PFC, it performs higher efficiency and lower switching noise even for high power use.
The control of continuous conduction mode is carried out by detecting the current in power MOSFET. The R2A20114
series supports two types of current detection methods; current detection by current transformers (R2A20104SP/FP),
and that by shunt resisters (R2A20114SP/FP). So that, it can be applicable for a variety of applications. Interleaving
control of the boost converters, namely, producing 180 degrees phase shift between the output signals (GD1,2) driving
the boost converters, enables the system to perform high conversion efficiency and low switching noises and, at the
same time, to reduces ripple currents in input and output current and then this allows use of smaller components such as
boost inductors, input filters and output capacitors. R2A20114 series integrates a various kinds of protection circuits,
such as the detection circuit of breaking of wire in feedback loop, two modes of over voltage protection circuits, over
current protection circuit and error output circuit (*1), which improve the reliability of the power supply system and
reduce the number of component parts on the system.
Features
• Maximum Ratings
⎯ Supply voltage Vcc: 24 V
⎯ Junction temperature Tj: from –40 to +150 degrees centigrade
• Electrical characteristics
⎯ VFB feedback voltage VREF: 2.5 V ± 1.5%
⎯ UVLO (Undervoltage Lockout) operation start voltage VH: 10.4 V ± 0.7 V
⎯ UVLO operation shutdown voltage VL: 8.9 V ± 0.5 V
⎯ UVLO hysteresis voltage Hysuvl : 1.5 V ± 0.5 V
• Functions
⎯ Boost converter control with continuous conduction mode
⎯ Interleaving control
⎯ Frequency modulation (*2)
⎯ Brownout
⎯ Phase drop (*1)
⎯ External clock synchronization input
⎯ External clock synchronization output (*1)
⎯ Two modes of over voltage protections
Mode 1: Dynamic OVP preventing over voltage after sudden variation of load.
Mode 2: Static OVP preventing over voltage in the period of normal operation.
⎯ Feedback loop wire breaking/open detector
⎯ Dual over voltage protection circuits (*1): FB and OVP2 terminals
⎯ Current balance control
⎯ Phase 1 and Phase 2 independent over current protection
⎯ Package line-up
Pb-free LQFP-40 (R2A20104FP, R2A20114FP)
Pb-free SOP-20 (R2A20104SP, R2A20114SP)
Notes: *1 Supported only by R2A20104FP and R2A20114FP
*2 Frequency modulation periods (dfm) of R2A20104SP and R2A20114SP are fixed.
R03DS0008EJ0301 Rev.3.01
Jan 08, 2016
Page 1 of 11
R2A20104/114 Series
The Function List of R2A20104/114 Series
Item
R2A20104SP
R2A20104FP
R2A20114SP
R2A20114FP
PFC control
Continuous conduction mode interleaving
Current detection method
Current transformer
Package
SOP-20
LQFP-40
SOP-20
LQFP-40
Supported
Supported
Supported
Supported
Protection circuits
Brownout detection
Noise reduction
Synchronization with
external signal
Efficiency
improvement
Note:
Shunt resistor
2nd OVP
Not supported
Supported
Not supported
Supported
Phase error
Not supported
Supported
Not supported
Supported
Jitter generation
(Frequency
modulation)
Supported
(But, frequency
modulation period
(dfm)(*1) is fixed)
Supported
Supported
(But, frequency
modulation period
(dfm)(*1) is fixed)
Supported
Input
Supported
Supported
Supported
Supported
Output
Not supported
Supported
Not supported
Supported
Phase drop
Not supported
Supported
Not supported
Supported
*1 Refer to the figure depicted below:
Switching frequency
dfm
fout
ffm = 1/T
time
Ordering Information
Part No.
R2A20104FPW0
R2A20104FPW5
R2A20114FPW0
R2A20114FPW5
R2A20104SPW0
R2A20104SPW5
R2A20114SPW0
R2A20114SPW5
Package Name
FP-40EV
Package Code
PLQP0040JB-C
Package
Abbreviation
FP
Taping Abbreviation
(Quantity)
W (2000 pcs/reel)
FP-20DAV
PRSP0020DD-B
SP
W (2000 pcs/reel)
Remarks
non-HF
HF
non-HF
HF
non-HF
HF
non-HF
HF
Note: HF: Halogen-Free
R03DS0008EJ0301 Rev.3.01
Jan 08, 2016
Page 2 of 11
R2A20104/114 Series
30
29
28
27
26
25
24
23
22
21
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
10
N.C.
N.C.
VCC
N.C.
CS1
CS2
CSO1
CSO2
IRAMP
N.C.
ERROR
OFF
RS
SS
COMP
N.C.
FB
OVP2
N.C.
N.C.
FMR
FMC
VREF
BO
VAC
PD
AGND
E-DELAY
N.C.
N.C.
40
39
38
37
36
35
34
33
32
31
N.C.
N.C.
CT
RT/SYNC
SYNC-O
N.C.
GD1
PGND
GD2
N.C.
Pin Arrangement of R2A20104FP and R2A20114FP
(Top view)
Pin Functions of R2A20104FP and R2A20114FP
Pin No.
1
2
3
4
5
6
7
8
9, 10
11
12
13
14
15
16
17
18
19-21
22
23
24
25
26
27
28
29-31
32
33
34
35
36
37
38
39, 40
Pin Name
FMR
FMC
VREF
BO
VAC
PD
AGND
E-DELAY
N.C.
ERROR
OFF
RS
SS
COMP
N.C.
FB
QVP2
N.C.
IRAMP
CSO2
CSO1
CS2
CS1
N.C.
VCC
N.C.
GD2
PGND
GD1
N.C.
SYNC-O
RT/SYNC
CT
N.C.
Input/Output
Input
Input
Output
Input
Input
Input
—
Input
—
Output
Input
Input
Input
Output
—
Input
Input
—
Input
Output
Output
Input
Input
—
Input
—
Output
—
Output
—
Output
Input
Input
—
R03DS0008EJ0301 Rev.3.01
Jan 08, 2016
Function
Frequency modulation setting resistor connecting terminal
Frequency modulation setting capacitor connecting terminal
Reference voltage output terminal
Brownout input terminal
AC voltage input terminal
Phase drop input terminal
Analog ground
Delay of the Error signal setting terminal
Open
Error output terminal
Shutdown terminal (VCC Reset)
Current correction setting resistor connecting terminal
Soft start setting capacitor connecting terminal
Error amplifier output terminal (to be phase-compensated)
Open
Error amplifier input terminal (feedback voltage input terminal)
OVP2 input terminal
Open
Ramp waveform setting resistor connecting terminal
Current sense amplifier 2 output terminal (to be phase-compensated)
Current sense amplifier 1 output terminal (to be phase-compensated)
Current sense 2 input terminal
Current sense 1 input terminal
Open
Supply voltage terminal
Open
Converter 2 Power MOSFET drive terminal
Power ground
Converter 1 Power MOSFET drive terminal
Open
Synchronization signal output terminal
Frequency setting resistor connecting terminal / Sync. Signal input terminal
Frequency setting capacitor connecting terminal
Open
Page 3 of 11
R2A20104/114 Series
Pin Arrangement of R2A20104SP and R2A20114SP
RT/SYNC
1
20
GD1
CT
2
19
PGND
FM
3
18
GD2
VREF
4
17
VCC
BO
5
16
CS1
VAC
6
15
CS2
AGND
7
14
CSO1
RS
8
13
CSO2
SS
9
12
IRAMP
10
11
FB
COMP
(Top view)
Pin Functions of R2A20104SP and R2A20114SP
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Pin Name
RT/SYNC
CT
FM
VREF
BO
VAC
AGND
RS
SS
COMP
FB
IRAMP
CSO2
CSO1
CS2
CS1
VCC
GD2
PGND
GD1
Input/Output
Input
Input
Input
Output
Input
Input
—
Frequency setting timing capacitor connecting terminal
Frequency modulation setting timing capacitor connecting terminal
Reference voltage output terminal
Brownout input terminal
AC voltage input terminal
Analog ground
Input
Input
Output
Input
Input
Output
Output
Input
Input
Input
Output
—
Current correction setting resistor connecting terminal
Soft start setting capacitor connecting terminal
Error amplifier output terminal (to be phase-compensated)
Error amplifier input terminal (feedback voltage input terminal)
Ramp waveform setting resistor connecting terminal
Current sense amplifier 2 output terminal (to be phase-compensated)
Current sense amplifier Output 1 output terminal (to be phase-compensated)
Current sense 2 input terminal
Current sense 1 input terminal
Supply voltage terminal
Converter 2 Power MOSFET drive terminal
Power ground
Output
Converter 1 Power MOSFET drive terminal
R03DS0008EJ0301 Rev.3.01
Jan 08, 2016
Function
Frequency setting timing resistor connecting terminal / Sync. signal input terminal
Page 4 of 11
R2A20104/114 Series
Block Diagram of R2A20104FP and R2A20114FP
VCC
28
VREF
800nA/200nA (*2)
CS1 26
UVL
VREF
3
VREF
34
GD1
22
IRAMP
32
GD2
33
PGND
18
OVP2
OCP1
3V/0.31V (*1)
VCC
CURRENT FORMING
BLOCK 1
OSC1
OCP1
INTERLEAVE
Logic 1
CSO1 24
VAC 5
RS 13
FB
CURRENT FORMING
BLOCK 2
OSC2
OCP2
CSO2 23
INTERLEAVE
Logic 2
VREF
800nA
/200nA (*2)
CS2 25
OCP2
3V/0.31V (*1)
UVL
PD 6
2.5V
200nA
SOVP
OCP1
E-DELAY 8
ERROR
ERROR
BLOCK
11
FBOPEN
OCP2
OVP2
GD1
DOVP
PROTECTION
BLOCK
GD2
VREF
500nA
Latch
(UVL Reset)
OFF 12
E-AMP
100kΩ
300nA
UVL
4V
0.82V/0.81V
CT
10kΩ
OSC1
OSC1
CT 38
FB
15
COMP
14
SS
2.5V
BO 4
RT/SYNC 37
17
VCC
28μA
OSC2
OSC2
SYNC-O
FMR 1
UVL
SYNC-O
2
36
7
FMC
SYNC-O
AGND
5.7V
Notes: *1. R2A20104FP: 3V
R2A20114FP: 0.31V
*2. R2A20104FP: 800nA
R2A20114FP: 200nA
R03DS0008EJ0301 Rev.3.01
Jan 08, 2016
Page 5 of 11
R2A20104/114 Series
Block Diagram of R2A20104SP and R2A20114SP
VCC
17
VREF
800nA/200nA (*2)
CS1 16
UVL
VREF
4
VREF
20
GD1
12
IRAMP
18
GD2
19
PGND
OCP1
3V/0.31V (*1)
VCC
CURRENT FORMING
BLOCK 1
OSC1
OCP1
INTERLEAVE
Logic 1
CSO1 14
VAC 6
RS 8
FB
CURRENT FORMING
BLOCK 2
OSC2
OCP2
CSO2 13
INTERLEAVE
Logic 2
VREF
800nA
/200nA (*2)
CS2 15
OCP2
3V/0.31V (*1)
UVL
SOVP
FBOPEN
DOVP
PROTECTION
BLOCK
VREF
500nA
E-AMP
300nA
UVL
4V
0.82V/0.81V
CT
10kΩ
OSC1
OSC1
CT 2
FB
10
COMP
9
SS
2.5V
BO 5
RT/SYNC 1
11
VCC
28μA
OSC2
OSC2
UVL
3
7
FM
AGND
5.7V
Notes: *1. R2A20104SP: 3V
R2A20114SP: 0.31V
*2. R2A20104SP: 800nA
R2A20114SP: 200nA
R03DS0008EJ0301 Rev.3.01
Jan 08, 2016
Page 6 of 11
R2A20104/114 Series
Absolute Maximum Ratings
Item
Supply voltage
GD1 and 2
Peak current
DC current
Vref terminal current
Terminal current
RS terminal current
RT terminal current
RAMP terminal current
BO clamp current
Terminal voltage
Vref terminal voltage
SS terminal voltage
Power dissipation
Operating ambient temperature
Junction temperature
Storage temperature
Symbol
VCC
Ipk-gd1, Ipk-gd2
Idc-gd1, Idc-gd2
Iref
It-group
Irs
Irt
Iramp
Ibo
Vt-group
Vt-ref
Vt-ss
Pt
Ta-opr
Tj
Tstg
Value
–0.3 to +24
±1
±0.1
–5
±1
–500
–200
–200
300
–0.3 to Vref
–0.3 to Vref+0.3
–0.3 to Vref+1
1
–40 to +125
–40 to +150
–55 to +150
Unit
V
A
A
mA
mA
μA
μA
μA
μA
V
V
V
W
°C
°C
°C
Note
3
3, 4
3
3
3, 5
3
3
3
3
3, 6
3
3
3, 7
8
Notes: 1. Rated voltages are with reference to the AGND and PGND terminal.
2. For the direction of Rated currents, (+) denotes the current flowing into the IC, and (–) denotes the current
flowing out of the IC.
3. Ambience temperature, Ta is 25 degrees centigrade.
4. Transient current when driving a capacitive load.
5. Rated currents of the terminals listed below:
COMP, CSO1, CSO2
6. Rated voltages of the terminals listed below:
in the case of R2A20104FP/R2A20114FP: CS1, CS2, VAC, RS, FB, PD, BO, ERROR, E-DLAY, OFF,
OVP2, FMC, FMR, RT/SYNC, IRAMP, SYNC-O, CT, COMP,
CSO1, CSO2
in the case of R2A20104SP/R2A20114SP: CS1, CS2, VAC, RS, FB, BO, IRAMP, FM, RT/SYNC, CT,
COMP, CSO1, CSO2
7. Thermal resistor
in the case of R2A20104FP/R2A20114FP: θja = 85.3 degrees centigrade/W
in the case of R2A20104SP/R2A20114SP: θja = 120 degrees centigrade/W
These values are obtained under the condition that the IC is mounted on the glass epoxy board, of which size
is 50 × 50 × 1.6 [mm] and wiring density is 10%.
8. Stresses exceeding the absolute maximum ratings may damage the device.
These are stress ratings only. Functional operation above the recommended operating ambient temperature
range is not implied.
Extended exposure to stresses above the absolute maximum ratings may affect device reliability.
R03DS0008EJ0301 Rev.3.01
Jan 08, 2016
Page 7 of 11
R2A20104/114 Series
Electrical Characteristics
(Ta = 25°C, VCC = 12 V, CT = 1000 pF, RT = 27 kΩ, CS1, CS2 = GND, IRAMP = 10 kΩ, BO = 1 V, VAC = 0 V,
RS = 220 kΩ, FMC = GND (*1), FM = GND (*2), FB = COMP)
Item
Supply
VREF
Error
amplifier
Brownout
Oscillator
Notes: *1
*2
*3
*4
Min
Typ
Max
Unit
UVLO turn-on threshold
Vuvlh
Symbol
9.7
10.4
11.1
V
UVLO turn-off threshold
Vuvll
8.4
8.9
9.4
V
UVLO hysteresis
Hysuvl
1.0
1.5
2.0
V
Standby current
Istby
—
100
160
μA
mA
Operating current
Icc
—
5
7.5
Output voltage
Vref
4.85
5.00
5.15
V
Line regulation
Vref-line
—
5
20
mV
Test Conditions
VCC = 8.9 V
Isource = –1 mA
Isource = –1 mA,
VCC = 10 V to 24 V
Load regulation
Vref-load
—
5
20
mV
Temperature stability
dVref
—
±80
—
ppm/°C
Isource = –1 mA to -5 mA
Feedback voltage
Vfb
2.462
2.500
2.538
V
Input bias current
Ifb
–0.8
–0.5
–0.2
μA
Measured pin: FB
Open loop gain
Av
—
40
—
dB
(*3)
Upper clamp voltage
Vclamp-comp
3.8
4.0
4.3
V
FB = 2.0 V, COMP: Open
Low voltage
Vl-comp
0.0
0.1
0.3
V
FB = 3.0 V, COMP: Open
Source current
Isrc-comp
–190
–135
–80
μA
FB = 1.5 V, COMP = 2.5 V
Sink current 1
Isnk-comp1
—
120
—
μA
(*3)
Sink current 2
Isnk-comp2
220
320
420
μA
FB =3.5 V, COMP = 2.5 V
Transconductance
gm
120
200
290
μs
FB = 2.45 V ↔ 2.55 V,
COMP = 2.5 V
Ta = –40 to 125°C (*3)
FB-COMP Short
PFC enable voltage
Von-pfc
0.74
0.82
0.9
V
Input pin: BO
PFC disable voltage
Voff-pfc
0.73
0.81
0.89
V
Input pin: BO
Initial accuracy
fout
70
78
86
kHz
Measured pin: OUT,
FMC = 0 V
fout temperature stability
dfout/dTa
—
±0.1
—
%/°C
Ta = –40 to 125°C (*3)
fout voltage stability
fout-line
–1.5
0.5
1.5
%
VCC = 12 V to 18 V
CT top voltage
Vct-H
—
3.6
4.0
V
(*3)
RT voltage
Vrt
1.15
1.25
1.35
V
FMC sink current (*1)/
FM sink current (*2)
Isnk-fmc (*1)/
Isnk-fm (*2)
6
11
16
μA
FMC = 1 V (*1)/
FM = 1 V (*2)
FMC source current (*1)/
FM source current (*2)
Iso-fmc (*1)/
Iso-fm (*2)
–16.5
–11.5
–6.5
μA
FMC = 1 V (*1)/
FM = 1 V (*2)
FM magnitude change
dfm
19
24
29
kHz
FMC = 5 V (*1)/FM = 5 V (*2)
(*3, *4)
FM frequency 1 (*1)
ffm1
0.25
0.38
0.5
kHz
FMC = 6.8 nF, FMR = 4 V
(*4)
FM frequency 2 (*1)
ffm2
14
25
35
kHz
FM = 220 pF, FMR = 1.2 V
(*4)
FM frequency (*2)
ffm
6
10
14
kHz
FMC = 220 pF (*4)
Applied to R2A20104FP, R2A20114FP
Applied to R2A20104SP, R2A20114SP
Design Specification (Reference data)
Refer to the figure shown below:
Switching frequency
dfm
fout
ffm = 1/T
time
R03DS0008EJ0301 Rev.3.01
Jan 08, 2016
Page 8 of 11
R2A20104/114 Series
Electrical Characteristics (cont.)
(Ta = 25°C, VCC = 12 V, CT = 1000 pF, RT = 27 kΩ, CS1, CS2 = GND, IRAMP = 10 kΩ, BO = 1 V, VAC = 0 V,
RS = 220 kΩ, FMC = GND (*1), FM = GND (*2), FB = COMP)
Item
Synchronization
Current
slope
Symbol
Min
Typ
Max
Unit
SYNC threshold voltage
(rising)
Vsync
2.0
2.5
3.0
V
SYNC Min. pulse
Psync
2
—
—
μs
SYNC-OUT shunt current
(*1)
Isync-s
5.0
—
—
mA
SYNC-OUT leakage current
(*1)
Isync-l
—
—
1.0
μA
RS output voltage 1
Vrs1
0.56
0.65
0.74
V
Test Conditions
VAC = 0 V, VFB = 2.5 V
RS output voltage 2
Vrs2
0.04
0.14
0.26
V
VAC = 2.5 V, VFB = 0 V
VAC bias current
Ivac
–0.4
–0.2
–0.05
μA
Measured pin: VAC
Soft start
Source current
Iss
–40
–28
–16
μA
SS = 2 V
Phase drop
Phase drop threshold
voltage (*1)
Vpd
2.4
2.5
2.6
V
Phase drop hysteresis (*1)
Hya-pd
150
200
250
mV
PD bias current (* )
Ipd
0.05
0.2
0.5
μA
Measured pin: PD
CSO offset voltage1 (*5)
Voffset
0.68
0.88
1.0
V
Vcs = 0 V
CSO offset voltage1 (*6)
Voffset
0.54
0.74
0.86
V
Vcs = 0 V
CSO offset voltage2
Vcaoh
2.83
3
3.17
V
Vcs = 0.24 V (*5),
Vcs = 2.3 V (*6)
CS Bias current (*5)
Ics-r
–0.4
–0.2
–0.05
μA
Measured pin: CS1, 2
CS Bias current (*6)
Ics-ct
–1.1
–0.8
–0.5
μA
Measured pin: CS1, 2
Gate drive rise time
tr-gd
—
30
100
ns
CL = 500 pF
Gate drive fall time
tf-gd
—
30
100
ns
CL = 500 pF
1
AMP1, 2
Gate drive
1, 2
Gate drive low voltage
Over
voltage
protection
Vol1-gd
—
0.05
0.2
V
Isink = 10 mA
Vol2-gd
—
1
1.25
V
Isink = 0.25 mA, VCC = 5 V
Gate drive high voltage
Voh-gd
11.5
11.9
—
V
Isource = –10 mA
Minimum duty cycle
Dmin-out
—
—
0
%
Maximum duty cycle
Dmax-out
90
95
98
%
Dynamic OVP Threshold
voltage
Vdovp
VFB×
1.025
VFB×
1.040
VFB×
1.055
V
Static OVP Threshold
voltage
Vsovp
VFB×
1.065
VFB×
1.080
VFB×
1.095
V
COMP = OPEN
30
80
130
mV
COMP = OPEN
VFB×
1.065
VFB×
1.080
VFB×
1.095
μA
Static OVP Hysteresis
Hys-sovp
1
OVP2 Threshold voltage (* )
Over
current
protection
Notes: *1
*2
*5
*6
Vovp2
OVP2 Hysteresis (*1)
Hys-ovp2
30
80
130
mV
COMP = OPEN
OVP2 Bias current (*1)
Iovp2
–0.5
–0.3
–0.05
μA
Measured pin: OVP2
FB Open Detect Threshold
voltage
Vfbopen
0.45
0.5
0.55
V
FB Open Detect hysteresis
Vfbopen
0.16
0.2
0.24
V
OCP Threshold voltage (*5)
VCL
0.28
0.31
0.34
V
OCP Threshold voltage (* )
VCL
2.9
3
3.1
V
Delay to output
td-CL
—
100
250
ns
6
Applied to R2A20104FP, R2A20114FP
Applied to R2A20104SP, R2A20114SP
Applied to R2A20114FP, R2A20114SP
Applied to R2A20104FP, R2A20104SP
R03DS0008EJ0301 Rev.3.01
Jan 08, 2016
Page 9 of 11
R2A20104/114 Series
Electrical Characteristics (cont.)
(Ta = 25°C, VCC = 12 V, CT = 1000 pF, RT = 27 kΩ, CS1, CS2 = GND, IRAMP = 10 kΩ, BO = 1 V, VAC = 0 V,
RS = 220 kΩ, FMC = GND (*1), FM = GND (*2), FB = COMP)
Item
Error signal
Symbol
1
Min
Typ
Max
Unit
ERROR shunt current (* )
Ierror-s
5.0
—
—
mA
ERROR leakage current (*1)
Ierror-l
—
—
1.0
μA
Phase error detect point
Perror
1.1
1.35
1.6
—
OFF threshold voltage (*1)
Voff
3.3
4.0
4.7
V
E-DELAY charge current (*1)
Ied-c
–55
–36
–20
μA
E-DELAY discharge current
(*1)
Ied-d
20
36
55
μA
E-DELAY threshold voltage
(*1)
Vdelay
2.35
2.45
2.55
V
Test Conditions
Vcso1 or 2 = 2.5 V,
Vcso2 or 1: sweep (*7)
Notes: *1 Applied to R2A20104FP, R2A20114FP
*2 Applied to R2A20104SP, R2A20114SP
*7 Refer to the figure shown below:
V'cso1(or 2)
Vcso2(or 1)
CSO1(or 2)
CSO2(or 1)
ERROR
Perror =
V'cso1(or 2)[V] – 0.55[V]
Vcso2(or 1)[V] – 0.55[V]
R03DS0008EJ0301 Rev.3.01
Jan 08, 2016
Page 10 of 11
R2A20104/114 Series
Package Dimensions
• R2A20104FP and R2A20114FP
JEITA Package Code
P-LQFP40-7x7-0.65
RENESAS Code
PLQP0040JB-C
Previous Code
FP-40EV
MASS[Typ.]
0.2g
NOTE)
1. DIMENSIONS"*1"AND"*2"
DO NOT INCLUDE MOLD FLASH
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
HD
*1
D
30
21
31
20
c
HE
E
bp
*2
Reference
Symbol
ZE
Terminal cross section
(Ni/Pd/Au plating)
11
40
1
D
E
A2
HD
HE
A
A1
bp
b1
c
c1
θ
e
x
y
ZD
ZE
L
L1
10
ZD
c
θ
A
F
A2
Index mark
L
A1
S
L1
Detail F
*3
e
bp
x
M
y S
Dimension in Millimeters
Nom
7.0
7.0
1.40
9.0
9.0
Max
0.08
0.17
9.2
9.2
1.70
0.13 0.22
0.22 0.27
0.10
0.15
0.20
Min
8.8
8.8
0°
8°
0.65
0.13
0.10
0.575
0.575
0.40 0.50 0.60
1.0
• R2A20104SP and R2A20114SP
JEITA Package Code
P-SOP20-5.5x12.6-1.27
RENESAS Code
PRSP0020DD-B
*1
Previous Code
FP-20DAV
D
MASS[Typ.]
0.31g
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
F
20
11
c
HE
*2
E
bp
Index mark
Terminal cross section
Reference
Symbol
(Ni/Pd/Au plating)
10
1
Z
*3
e
bp
x
M
L1
A1
θ
A
S
L
y S
Detail F
R03DS0008EJ0301 Rev.3.01
Jan 08, 2016
D
E
A2
A1
A
bp
b1
c
c1
θ
HE
e
x
y
Z
L
L1
Dimension in Millimeters
Min
Nom Max
12.60 13.0
5.50
0.00
0.10
0.34
0.40
0.20
2.20
0.46
0.15
0.20
0.25
0°
7.50
0.50
7.80
1.27
0.70
1.15
8°
8.00
0.12
0.15
0.80
0.90
Page 11 of 11
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