PD - 97091A IRF6609PbF IRF6609TRPbF RoHS Compliant Lead-Free (Qualified up to 260°C Reflow) Application Specific MOSFETs Ideal for CPU Core DC-DC Converters Low Conduction Losses and Switching Losses High Cdv/dt Immunity Low Profile (<0.7mm) Dual Sided Cooling Compatible Compatible with existing Surface Mount Techniques l l l l l l l l l DirectFET Power MOSFET VDSS RDS(on) max Qg 20V 2.0mΩ@VGS = 10V 2.6mΩ@VGS = 4.5V 46nC DirectFET ISOMETRIC MT Applicable DirectFET Outline and Substrate Outline (see p.8,9 for details) SQ SX ST MQ MX MT Description The IRF6609PbF combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve the lowest on-state resistance in a package that has the footprint of an SO-8 and only 0.7 mm profile. The DirectFET package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%. The IRF6609PbF balances both low resistance and low charge along with ultra low package inductance to reduce both conduction and switching losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power the latest generation of processors operating at higher frequencies. The IRF6609PbF has been optimized for parameters that are critical in synchronous buck operating from 12 volt bus converters including Rds(on), gate charge and Cdv/dt-induced turn on immunity. The IRF6609PbF offers particularly low Rds(on) and high Cdv/dt immunity for synchronous FET applications. Absolute Maximum Ratings Parameter Max. Units 20 ±20 V V DS V GS Drain-to-Source Voltage Gate-to-Source Voltage ID @ TC = 25°C Continuous Drain Current, V GS @ 10V 150 ID @ TA = 25°C Continuous Drain Current, V GS 31 ID @ TA = 70°C Continuous Drain Current, V GS IDM Pulsed Drain Current P D @TC = 25°C Power Dissipation e P D @TA = 70°C k Power Dissipation h Power Dissipation h TJ Linear Derating Factor Operating Junction and TSTG Storage Temperature Range RθJA Junction-to-Ambient P D @TA = 25°C k @ 10V h @ 10V h A 25 250 89 1.8 W 2.8 0.022 -40 to + 150 W/°C °C Thermal Resistance Parameter RθJA RθJA RθJC RθJ-PCB hl Junction-to-Ambient il Junction-to-Ambient jl Junction-to-Case kl Junction-to-PCB Mounted Notes through are on page 10 www.irf.com Typ. Max. ––– 45 12.5 ––– 20 ––– ––– 1.4 1.0 ––– Units °C/W 1 7/3/06 IRF6609PbF Static @ TJ = 25°C (unless otherwise specified) Parameter Min. Typ. Max. Units BVDSS Drain-to-Source Breakdown Voltage 20 ––– ––– ∆ΒVDSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 15 ––– RDS(on) Static Drain-to-Source On-Resistance ––– 1.6 2.0 ––– 2.0 2.6 V mV/°C Reference to 25°C, ID = 1mA mΩ VGS = 10V, ID = 31A VGS = 4.5V, ID = 25A VGS(th) Gate Threshold Voltage 1.55 ––– 2.45 V ∆VGS(th)/∆TJ Gate Threshold Voltage Coefficient ––– -6.1 ––– mV/°C IDSS Drain-to-Source Leakage Current ––– ––– 1.0 µA ––– ––– 150 Gate-to-Source Forward Leakage ––– ––– 100 Gate-to-Source Reverse Leakage ––– ––– -100 gfs Forward Transconductance 91 ––– ––– Qg IGSS Conditions VGS = 0V, ID = 250µA g g VDS = VGS, ID = 250µA VDS = 16V, VGS = 0V VDS = 16V, VGS = 0V, TJ = 150°C nA VGS = 20V VGS = -20V S VDS = 10V, ID = 25A nC VGS = 4.5V Total Gate Charge ––– 46 69 Qgs1 Pre-Vth Gate-to-Source Charge ––– 15 ––– Qgs2 Post-Vth Gate-to-Source Charge ––– 4.7 ––– Qgd Gate-to-Drain Charge ––– 15 ––– ID = 17A Qgodr Gate Charge Overdrive ––– 11 ––– See Fig. 16 Qsw Switch Charge (Qgs2 + Qgd) ––– 20 ––– Qoss Output Charge ––– 26 ––– td(on) Turn-On Delay Time ––– 24 ––– VDD = 16V, VGS = 4.5V tr Rise Time ––– 95 ––– ID = 25A td(off) Turn-Off Delay Time ––– 26 ––– tf Fall Time ––– 9.8 ––– Ciss Input Capacitance ––– 6290 ––– Coss Output Capacitance ––– 1850 ––– Crss Reverse Transfer Capacitance ––– 860 ––– VDS = 10V nC ns VDS = 10V, VGS = 0V g Clamped Inductive Load VGS = 0V pF VDS = 10V ƒ = 1.0MHz Avalanche Characteristics Parameter EAS (Thermally limited) Single Pulse Avalanche Energy e IAR Avalanche Current EAR Repetitive Avalanche Energy f e Typ. Max. Units ––– 240 mJ ––– See Fig. 12, 13, 18a, 18b, A ––– mJ Diode Characteristics Parameter IS Continuous Source Current Min. Typ. Max. Units Pulsed Source Current e MOSFET symbol ––– ––– 89 ––– ––– 250 integral reverse (Body Diode) ISM Conditions A (Body Diode) D showing the G VSD Diode Forward Voltage ––– 0.80 1.2 V p-n junction diode. TJ = 25°C, IS = 25A, VGS = 0V trr Reverse Recovery Time ––– 32 48 ns TJ = 25°C, IF = 25A Reverse Recovery Charge ––– 26 39 nC di/dt = 100A/µs Qrr 2 g S g www.irf.com IRF6609PbF 1000 1000 100 BOTTOM 10 1 2.7V ≤ 60µs PULSE WIDTH Tj = 25°C TOP ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) TOP VGS 10V 7.0V 4.5V 4.0V 3.5V 3.2V 2.9V 2.7V 100 BOTTOM 10 2.7V ≤ 60µs PULSE WIDTH Tj = 150°C 0.1 1 0.1 1 10 100 0.1 1 10 VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 100 1.5 RDS(on) , Drain-to-Source On Resistance (Normalized) 1000.0 ID, Drain-to-Source Current (Α) VGS 10V 7.0V 4.5V 4.0V 3.5V 3.2V 2.9V 2.7V 100.0 T J = 150°C 10.0 T J = 25°C 1.0 VDS = 10V ≤ 60µs PULSE WIDTH 0.1 2.0 3.0 4.0 VGS, Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics www.irf.com 5.0 ID = 31A VGS = 10V 1.0 0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 T J , Junction Temperature (°C) Fig 4. Normalized On-Resistance vs. Temperature 3 IRF6609PbF 100000 12 VGS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd VGS, Gate-to-Source Voltage (V) ID= 17A C, Capacitance (pF) C oss = C ds + C gd 10000 Ciss Coss 1000 Crss 8 6 4 2 0 100 1 10 0 100 20 1000 ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) 1000.0 T J = 150°C 10.0 1.0 60 80 100 120 Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage Fig 5. Typical Capacitance vs. Drain-to-Source Voltage 100.0 40 QG Total Gate Charge (nC) VDS, Drain-to-Source Voltage (V) T J = 25°C OPERATION IN THIS AREA LIMITED BY R DS (on) 100 1msec 100µsec 10 10msec 1 Tc = 25°C Tj = 150°C Single Pulse VGS = 0V 0.1 0.1 0.0 0.4 0.8 1.2 1.6 VSD, Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 4 VDS= 20V VDS= 10V 10 2.0 0.1 1 10 100 VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area www.irf.com IRF6609PbF 2.5 VGS(th) Gate threshold Voltage (V) 150 ID , Drain Current (A) 120 90 60 30 2.0 ID = 250µA 1.5 1.0 0 25 50 75 100 125 -75 150 -50 -25 0 25 50 75 100 125 150 T J , Temperature ( °C ) T J , Junction Temperature (°C) Fig 10. Threshold Voltage vs. Temperature Fig 9. Maximum Drain Current vs. Case Temperature 100 D = 0.50 0.20 0.10 0.05 0.02 0.01 Thermal Response ( Z thJA ) 10 1 0.1 τJ 0.01 SINGLE PULSE ( THERMAL RESPONSE ) 0.001 R1 R1 τJ τ1 R2 R2 τ2 τ1 R3 R3 Ri (°C/W) R4 R4 τC τ τ3 τ2 τ3 τ4 τ4 Ci= τi/Ri Ci i/Ri τi (sec) 0.6784 0.00086 17.299 0.57756 17.566 8.94 9.4701 106 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthja + Tc 0.0001 1E-006 1E-005 0.0001 0.001 0.01 0.1 1 10 100 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient www.irf.com 5 IRF6609PbF 10000 Avalanche Current (A) 1000 Allowed avalanche Current vs avalanche pulsewidth, tav assuming ∆Tj = 25°C due to avalanche losses. Note: In no case should Tj be allowed to exceed Tjmax Duty Cycle = Single Pulse 100 10 0.01 1 0.05 0.10 0.1 0.01 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 1.0E+00 1.0E+01 tav (sec) Fig 12. Typical Avalanche Current vs.Pulsewidth 250 EAR , Avalanche Energy (mJ) Single Pulse ID = 25A 200 150 100 50 0 25 50 75 100 125 Starting TJ , Junction Temperature (°C) Fig 13. Maximum Avalanche Energy vs. Temperature 6 Notes on Repetitive Avalanche Curves , Figures 12, 13: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 12, 13). tav = Average time in avalanche. 150 D = Duty cycle in avalanche = tav ·f ZthJC(D, tav) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC Iav = 2DT/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav www.irf.com RDS(on), Drain-to -Source On Resistance ( mΩ) IRF6609PbF 1000 ID = 31A 8 6 4 T J = 125°C 2 T J = 25°C 0 2.0 4.0 6.0 8.0 10.0 VGS, Gate-to-Source Voltage (V) Fig 14. On-Resistance Vs. Gate Voltage EAS, Single Pulse Avalanche Energy (mJ) 10 ID 11A 14A BOTTOM 25A TOP 800 600 400 200 0 25 50 75 100 125 150 Starting T J, Junction Temperature (°C) Fig 15. Maximum Avalanche Energy Vs. Drain Current Id Vds Vgs L VCC DUT 0 1K Vgs(th) Fig 16a. Gate Charge Test Circuit LD VDS Qgs1 Qgs2 Qgd Qgodr Fig 16b. Gate Charge Waveform VDS + 90% VDD D.U.T VGS 10% Pulse Width < 1µs Duty Factor < 0.1% VGS Fig 17a. Switching Time Test Circuit td(on) td(off) tr tf Fig 17b. Switching Time Waveforms 15V V(BR)DSS tp L VDS D.U.T RG IAS 20V VGS tp DRIVER + V - DD A 0.01Ω Fig 18a. Unclamped Inductive Test Circuit www.irf.com I AS Fig 18b. Unclamped Inductive Waveforms 7 IRF6609PbF D.U.T Driver Gate Drive P.W. + + - * D.U.T. ISD Waveform Reverse Recovery Current + RG • • • • dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test P.W. Period VGS=10V Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer - D= Period VDD + Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage - Body Diode VDD Forward Drop Inductor Curent Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 19. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs DirectFET Substrate and PCB Layout, MT Outline (Medium Size Can, T-Designation). Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes all recommendations for stencil and substrate designs. G = GATE D = DRAIN S = SOURCE D S D G D 8 S D www.irf.com IRF6609PbF DirectFET Outline Dimension, MT Outline (Medium Size Can, T-Designation). Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes all recommendations for stencil and substrate designs. DIMENSIONS METRIC MAX CODE MIN 6.35 A 6.25 5.05 B 4.80 3.95 C 3.85 0.45 D 0.35 0.82 E 0.78 0.92 F 0.88 1.82 G 1.78 H 0.98 1.02 0.67 J 0.63 K 0.88 1.01 2.63 L 2.46 M 0.616 0.676 R 0.020 0.080 0.17 P 0.08 IMPERIAL MIN MAX 0.246 0.250 0.189 0.199 0.152 0.156 0.014 0.018 0.031 0.032 0.035 0.036 0.070 0.072 0.039 0.040 0.025 0.026 0.035 0.039 0.097 0.104 0.0235 0.0274 0.0008 0.0031 0.003 0.007 DirectFET Part Marking www.irf.com 9 IRF6609PbF DirectFET Tape & Reel Dimension (Showing component orientation). LOADED TAPE FEED DIRECTION NOTE: Controlling dimensions in mm Std reel quantity is 4800 parts. (ordered as IRF6609TRPBF). For 1000 parts on 7" reel, order IRF6609TR1PBF REEL DIMENSIONS STANDARD OPTION (QTY 4800) TR1 OPTION (QTY 1000) IMPERIAL IMPERIAL METRIC METRIC MAX CODE MIN MIN MIN MIN MAX MAX MAX N.C A 6.9 12.992 N.C 330.0 177.77 N.C N.C N.C B 0.75 0.795 20.2 19.06 N.C N.C N.C C 0.53 0.504 0.50 12.8 13.5 0.520 13.2 12.8 D 0.059 0.059 N.C 1.5 1.5 N.C N.C N.C E 2.31 3.937 N.C 100.0 58.72 N.C N.C N.C F N.C N.C 0.53 N.C N.C 0.724 18.4 13.50 G 0.47 0.488 N.C 12.4 11.9 0.567 14.4 12.01 H 0.47 0.469 11.9 11.9 N.C 0.606 15.4 12.01 CODE A B C D E F G H DIMENSIONS IMPERIAL METRIC MIN MAX MIN MAX 0.311 0.319 7.90 8.10 0.154 0.161 3.90 4.10 0.469 0.484 11.90 12.30 0.215 0.219 5.45 5.55 0.201 0.209 5.10 5.30 0.256 0.264 6.50 6.70 0.059 N.C 1.50 N.C 0.059 0.063 1.50 1.60 Notes: Click on this section to link to the appropriate technical paper. Surface mounted on 1 in. square Cu board. Click on this section to link to the DirectFET Website. Used double sided cooling, mounting pad. Repetitive rating; pulse width limited by max. junction Mounted on minimum footprint full size board with temperature. Starting TJ = 25°C, L = 0.75mH, RG = 25Ω, IAS = 25A. Pulse width ≤ 400µs; duty cycle ≤ 2%. metalized back and with small clip heatsink. TC measured with thermal couple mounted to top (Drain) of part. Rθ is measured at TJ of approximately 90°C. Data and specifications subject to change without notice. This product has been designed and qualified for the Consumer market. Qualification Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.07/06 10 www.irf.com Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/