1/4 STRUCTURE Silicon monolithic integrated circuits PRODUCT SERIES 2ch DC brush motor driver TYPE BD63821EFV FUNCTION ・PWM constant current controllable two H bridge driver ・Forward, reverse, brake and stop function ・Direct PWM control ○Absolute maximum ratings(Ta=25°C) Item Supply voltage Symbol VCC1,2 Ratings Unit -0.3～+36.0 V 1.45※1 W Power dissipation Pd 4.70※2 W Input voltage for control pin VIN -0.3～+7.0 V RNF voltage VRNF 0.7 V ※3 Output current IOUT 1.0 A/ch Output current(peak)※4 IOUTPEAK 1.5※3 A/ch FAULT, LOCK voltage VFAULT -0.3～+7.0 V FAULT, LOCK current IFAULT 5 mA Operating temperature range Topr -25～+85 °C Storage temperature range Tstg -55～+150 °C Junction temperature Tjmax +150 °C ※1 70mm×70mm×1.6mm glass epoxy board. Derating in done at 11.6mW/°C for operating above Ta=25°C. ※2 4-layer recommended board. Derating in done at 37.6mW/°C for operating above Ta=25°C. ※3 Do not, however exceed Pd, ASO and Tjmax=150°C. ※4 Pulse width tw≦20ms. ○Operating conditions (Ta=-25～+85°C) Item Symbol Supply voltage VCC1,2 Input voltage for control pin VIN PWM input frequency FIN Min. 19 0 - Typ. 24 - This product isn’t designed for protection against radioactive rays. REV. B Max. 28 5.5 100 Unit V V kHz 2/4 ○Electrical characteristics (Unless otherwise specified Ta=25°C, VCC1,2=24V) Item Min. Limit Typ. Max. - 1.0 2.5 2.5 5.0 mA mA PS=0V PS=IN1A=IN2A=5V 2.0 35 -10 50 0 0.8 100 - V V µA µA VIN=5V VIN=0V - 50 - 100 10 mV µA IFAULT=1mA VFAULT=5V RON - 1.90 2.50 Ω ILEAK - - 10 µA IRNFS IRNF IVREF VREF tONMIN -2.0 -40 -2.0 0 0.7 -0.1 -20 -0.1 1.5 3.0 3.0 µA µA µA V µs RNFXS=0V RNFX=0V VREFX=0V VCTH 0.57 0.60 0.63 V VREFX=3V Symbol Whole Circuit current at standby ICCST Circuit current ICC Control input (IN1A, IN1B, IN2A, IN2B, PS) H level input voltage VINH L level input voltage VINL H level input current IINH L level input current IINL FAULT LOCK output (FAULT, LOCK) Output low voltage VFAULT Output leak current IFAULT_LEAK Output (OUT1A, OUT1B, OUT2A, OUT2B) Output on resistance Output leak current Current control RNFXS input current RNFX input current VREFX input current VREFX input voltage range Minimum on time (Blank time) Current limit Comparator threshold REV. B Unit Conditions IOUT=0.5A, Sum of upper and lower 3/4 ○Package outline Product No. BD63821EFV Lot No. HTSSOP-B28 (Unit:mm) ○Block diagram ○Pin No. / Pin name VREF1 11 ＋ － ＋ 1/5 － RNF1S VREF2 12 ＋ － 1/5 14 FAULT Regulator ＋ － RNF2S Blank time PWM control CR 10 TSD OCP UVLO OVLO 15 LOCK OSC 7 VCC1 5 OUT1A IN2A 19 IN2B 20 PS 13 GND 9 TEST 18 Forward Reverse BRAKE Open 2 OUT1B 3 RNF1 Predriver IN1B 17 Forward Reverse BRAKE Open Control logic IN1A 16 4 RNF1S Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Pin name GND OUT1B RNF1 RNF1S OUT1A NC VCC1 NC GND CR VREF1 VREF2 PS FAULT 22 VCC2 24 OUT2A NC : Non Connection 27 OUT2B 26 RNF2 25 RNF2S 1 GND REV. B Pin No. 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Pin name LOCK IN1A IN1B TEST IN2A IN2B NC VCC2 NC OUT2A RNF2S RNF2 OUT2B NC 4/4 ○Operation Notes (1) Absolute maximum ratings An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as fuses. (2) Power supply lines As return of current regenerated by back EMF of motor happens, take steps such as putting capacitor between power supply and GND as an electric pathway for the regenerated current. Be sure that there is no problem with each property such as emptied capacity at lower temperature regarding electrolytic capacitor to decide capacity value. If the connected power supply does not have sufficient current absorption capacity, regenerative current will cause the voltage on the power supply line to rise, which combined with the product and its peripheral circuitry may exceed the absolute maximum ratings. It is recommended to implement a physical safety measure such as the insertion of a voltage clamp diode between the power supply and GND pins. (3) GND potential The potential of GND pin must be minimum potential in all operating conditions. (4) Metal on the backside (Define the side where product markings are printed as front) The metal on the backside is shorted with the backside of IC chip therefore it should be connected to GND. Be aware that there is a possibility of malfunction or destruction if it is shorted with any potential other than GND. (5) Thermal design Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions. This IC exposes the metal on the backside of package. Note that this part is assumed to use after providing heat dissipation treatment to improve heat dissipation efficiency. Try to occupy as wide as possible with heat dissipation pattern not only on the board surface but also the backside. (6) Operation in strong electromagnetic field Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction. (7) ASO When using the IC, set the output transistor so that it does not exceed absolute maximum ratings or ASO. (8) Thermal shutdown circuit The IC has a built-in thermal shutdown circuit (TSD circuit). If the chip temperature becomes Tjmax=150°C, and higher, coil output to the motor will be open. The TSD circuit is designed only to shut the IC off to prevent runaway thermal operation. It is not designed to protect or indemnify peripheral equipment. Do not use the TSD function to protect peripheral equipment. (9) Over current protection circuit The IC has a built-in over current protection circuit (OCP circuit). The OCP circuit is designed only to shut the IC off to prevent abnormal situations, when absolute maximum output current is exceeded. It is not designed to protect or indemnify peripheral equipment. Do not use the OCP function to protect peripheral equipment. (10) Ground Wiring Pattern When using both large current and small signal GND patterns, it is recommended to isolate the two ground patterns, placing a single ground point at the ground potential of application so that the pattern wiring resistance and voltage variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the GND wiring pattern of any external components, either. (11) TEST pin Be sure to connect TEST pin to GND. REV. B Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. 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