Hynix GMS30120 4-bit single chip microcomputer Datasheet

$35 5HY 4-BIT SINGLE CHIP MICROCOMPUTERS
GMS300 SERIES
USER`S MANUAL
• GMS30004
• GMS30012
• GMS30112
• GMS30120
• GMS30140
• GMS30000 EVA
INTRODUCTION
We hereby introduce the manual for CMOS 4-bit
microcomputer GMS300 Series.
This manual is prepared for the users who should
understand fully the functions and features of
GMS300 Series so that you can utilize this
product to its fullest capacity. A detailed explanations of the specifications and applications regarding the hardware is hereby provided.
The contents of this user`s manual are subject to
change for the reasons of later improvement of
the features.
The information, diagrams, and other data in this
user`s manual are correct and reliable; however,
Hyundai Electronics Industrial Co., Ltd. is in no
way responsible for any violations of patents
or other rights of the third party generated by
the use of this manual
GMS300 SERIES
Revision History: 1997. APR.
Previous Release: 1994.NOV., 1994.JUN., 1994.JAN., 1995.JAN,
1995.AUG., 1996.APR., 1996.JUL.
Page
Subject(Change since last revision)
Appendix
Modification(Magic IIa Removal)
Table of Contents
Table of Contents
Chapter 1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Outline of Characteristics
.....................
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Assignment and Dimension . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics of GMS300 Series . . . . . . . . . .
I/O circuit types and options . . . . . . . . . . . . . . . . . . . . . . .
Masked options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
STOP Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1-1
1-1
1-1
1-2
1-3
1-8
1-10
1-13
1-13
Chapter 2
Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Block Description . . . . . . . . . . . . . . . . . . . . . . . . . . .. . .. . .
Program Memory (ROM). . . . . . . . . . . . . . . . . . . . . . . . .
ROM Address Register . . . . . . . . . . . . . . . . . . . . . . . . .
Data Memory (RAM) . . . . . . . . . . . . . . . . . . . . . . . . . . .
X-Register (X) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Y-Register (Y) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Accumulator (Acc) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Arithmetic and Logic Unit (ALU) . . . . . . . . . . . . . . . . . . .
I/O circuit . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
State Counter (SC) . . . . . . . . . . . .. . . . . . . . . . . . . . . . .
Clock Generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Carrier Generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Initial Reset Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Watch Dog Timer (WDT) . . . . . . . . . . . . . . . . . . . . . . . .
2-1
2-1
2-1
2-2
2-3
2-3
2-4
2-4
2-4
2-4
2-5
2-6
2-6
2-7
2-7
Chapter 3
Instruction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3-1
Instruction format . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Instruction Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Details of Instruction System . . . . . . . . . . . . . . . . . . . .
3-1
3-2
3-5
Detailed Description . . . . . . . . . . . . . . . . . . . . . . .
3-6
Table of Contents
Chapter 4
Evaluation Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4-1
Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Product Specification . . . . . . . . . . . . . . . . . . . . . . . . . . .
Connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Optional Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Caution of Operation . . . . . . . . . . . . . . . . . . . . . .. . . . .
4-1
4-1
4-2
4-3
4-6
Chapter 5
Software
......................................
Configuration of Assembler . . . . . . . . . . . . . . . . . . . . . .
Booting up Assembler . . . . . . . . . . . . . . . . . . . . . . . . .
Configuration of Simulator . . . . . . . . . . . . . . . . . . . . . . .
Booting up Simulator . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Simulator commands . . . . . . . . . . . . . . . . . . . . . . . . . . .
Description of commands . . . . . . . . . . . . . . . . . . . . . . . .
File types used in the simulator . . . . . . . . . . . . . . . . . . .
Error message and troubleshooting . . . . . . . . . . . . . . . .
5-1
5-1
5-1
5-2
5-2
5-15
5-18
5-48
5-49
Appendix
é
Magic. . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Magic- Ia . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
êb.. .. .. .. ....... .. .. .. .. .. .. .. .. ....... .. .. .. .. .. .. .. .. ....... .. .. .. .
ê
Magic-ëa .. . . . . . . . . . . . . . . . . . .. . . . . . . . . . .
Magic-ëb . . . . . . . . . . . . . . .. . .. . . . . . . . . . . . ..
Magic-ëc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A-1
B-1
Magic-
C-1
Magic-
D-1
E-1
F-1
G-1
INTRODUCTION
1
ARCHITECTURE
2
INSTRUCTION
3
EVALUATION BOARD
4
SOFTWARE
5
APPENDIX
6
Chapter 1. Introduction
CHAPTER 1. Introduction
OUTLINE OF CHARACTERISTICS
The GMS300 series is a family of 4-bit, single chip CMOS microcomputer.
Since it can form a system by one chip, it contributes to cost reduction and higher
efficiency in system.
Characteristics
6
6
6
6
6
6
6
6
6
6
6
6
6
Program memory :
512 bytes for GMS30004/012
1024 bytes for GMS30112/120/140
Data memory : 32 4 bits
43 types of instruction set
3 levels of subroutine nesting
1 bit output port for a large current (REMOUT signal)
Operating frequency : 300KHz to 1MHz
Instruction cycle : 12.5usec @480KHz
CMOS process (Single 3.0V power supply)
Stop mode (Through internal instruction)
Released stop mode by key input (Masked option)
Built in capacitor for ceramic oscillation circuit (Masked option)
Built in a watch dog timer (WDT)
Low operating voltage : (2.0~4.0V)
Ø
Series
GMS30004
GMS30012
GMS30112
GMS30120
GMS30140
512
à
1024
à
à
Ø4
à
à
à
à
I/O ports
-
4
à
à
à
Input ports
4
à
à
à
à
Program memory
Data memory
Output ports
Package
32
6
6
6
8
10
D0 ~ D5
D0 ~ D5
D0 ~ D5
D0 ~ D7
D0 ~ D9
16DIP/SOP
20DIP/SOP
à
24DIP/SOP
à
Table 1-1 GMS300 series members
1- 1
Chapter 1. Introduction
Block Diagram
The GMS300 series is composed as shown below. These blocks are detailed in
CHAPTER2.
RESET
VDD
GND
1
24
2
Reset
ROM
64word
16page
8bit
10
Ø
Program counter
Ø
8
Watchdog
timer
Stack
10
4
4
8
4
08;
Instruction
Decoder
4
ALU
MUX
4
4
Control Signal
2
RAM
16word x
2page x 4bit
X-Reg
16
RAM
Word
Selector
Y-Reg
ST
4
ACC
4
OSC
23
22
4
D-Latch
Pluse
Generator
4
OSC1 OSC2
10
R-Latch
7
8
9
K0 ~ K3
4
10
10
4
3
4
5
6
11
12
R0 ~ R3
13
14
15
16
D0 ~ D9
Fig 1-1 Block Diagram (for GMS30140)
1- 2
17
18
19
20
21
REMOUT
Chapter 1. Introduction
Pin Assignment and terminals
Pin Assignment
RESET 1
16 VDD
K0 1
20 R3
GND 2
15 OSC1
K1 2
19 R2
K0 3
14 OSC2
K2 3
18 R1
K1 4
13 REMOUT
K3 4
17 R0
K2 5
12 D5
D0 5
16 GND
K3 6
11 D4
D1 6
15 RESET
D0 7
10 D3
D2 7
14 VDD
D1 8
9
D3 8
13 OSC1
D4 9
12 OSC2
D5 10
11 REMOUT
D2
Fig 1-2 GMS30004 Pin Assignment
RESET 1
Fig 1-3 GMS30012/112 Pin Assignment
24 VDD
RESET 1
24 VDD
GND 2
23 OSC1
GND 2
23 OSC1
R0 3
22 OSC2
R0 3
22 OSC2
R1 4
21 REMOUT
R1 4
21 REMOUT
R2 5
20 D7
R2 5
20 D7
R3 6
19 D6
R3 6
19 D6
K0 7
18 D5
K0 7
18 D5
K1 8
17 D4
K1 8
17 D4
K2 9
16 D3
K2 9
16 D3
K3 10
15 D2
K3 10
15 D2
D0 11
14 D1
D0 11
14 D1
NC 12
13 NC
D8 12
13 D9
Fig 1-5 GMS30140 Pin Assignment
Fig 1-4 GMS30120 Pin Assignment
1- 3
Chapter 1. Introduction
14 13
1
2
3
4
12
11
10
9
5
6
7
8
0.300BSC
0$;
0.785MAX
0.745MIN
0.280MAX
0.240MIN
0,1
15
0,1
16
0.065MAX
0.050MIN
0,1
0$;
0$;
Pin Dimension
â à
0.100BSC
0.014MAX
0.022MAX
0.015MIN
0.008MIN
â à
0~15Ë
0.040MAX
Outline (Unit:Inch)
0.020MIN
15
14
13
12
11
10
1
2
3
4
5
6
7
9
8
0.244MAX
0.230MIN
0.157MAX
0.150MIN
0.392MAX
0.386MIN
a Ë
0,1
0$;
0.050BSC
0.0200MAX
0.0138MIN
Outline (Unit : Inch)
Fig 1-7 16SOP Pin Dimension (150Mil)
1- 4
0.035MAX
0.016MIN
â
âà
âà
Base Plane
Seating Plane
0,1
16
0$;
0$;
0,1
Fig 1-6 16PDIP Pin Dimension
à
Chapter 1. Introduction
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
0.3TYP
0.270MAX
0.250MIN
0$;
0,1
0,1
0$;
0.984MAX
0.968MIN
0.1TYP
0.065MAX
0.022MAX
0.055MIN
0.015MIN
â à
0.012MAX
0.008MIN
â à
0~15Ë
Outline (Unit : Inch)
20
19
1 8 17
1
2
3
4
16
15
14
13
12
11
5
6
7
8
9
10
0.419MAX
0.398MIN
0.299MAX
0.292MIN
0.5118MAX
0.4961MIN
âà
0$;
0,1
0$;
0,1
Fig 1-8 20PDIP Pin Dimension
0.020MAX
0.014MIN
0.125MAX
0.0091MIN
0.05TYP
Outline (Unit : Inch)
Fig 1-9 20SOP Pin Dimension
1- 5
â
à
0.042MAX
0.016MIN
Chapter 1. Introduction
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
0.3TYP
0.270MAX
0.250MIN
0.1TYP
0.065MAX
0.022MAX
0.055MIN
0.015MIN
0,1
0$;
0,1
0$;
1.255MAX
1.245MIN
â à
â à
0.012MAX
0.008MIN
0~15Ë
Outline (Unit : Inch)
0$;
0,1
Fig 1-10 24PDIP Pin Dimension
24
23
22
21
20
19
18
17
16
15
14 13
1
2
3
4
5
6
7
8
9
10
11
12
0.419MAX
0.396MIN
0.299MAX
0.292MIN
0.618MAX
0.595MIN
âà
0.05TYP
0.020MAX
0.018MAX
0.004MIN
0.125MAX
0.0091MIN
0.014MIN
Outline (Unit : Inch)
Fig 1-11 24SOP Pin Dimension
1- 6
â à
0.042MAX
0.016MIN
Chapter 1. Introduction
Pin Description
Pin
Name
Input/Output
VDD
GND
Function
Connected to 2.0~4.0V power supply
Ground
Connected to 0V power supply.
Reset input
I
Reset signal input which is a low active.
OSC1
Oscillator input
I
OSC2
Oscillator output
O
I/O pins of internal clock oscillating circuit.
Built in feedback resistor. Connect a ceramic
resonator to these pins.
RESET
REMOUT
O
Remocon signal output port which has high
current driving capability.
4bit programmable I/O port.
R0 ~ R3
R-Port
I/O
K0 ~ K3
K-Port
I
4bit input port with built in pull-up resistor.
D-Port
O
10bit output port which can be set or reset pin
by pin independently.
The output structure is N-channel open drain.
D0 ~ D9
1- 7
Chapter 1. Introduction
Electrical Characteristics for GMS300 series
Î
Absolute maximum ratings (Ta = 25 )
Parameter
Symbol
Max. rating
Unit
Supply Voltage
VDD
-0.3 ~ 5.0
V
Power dissipation
PD
700*
mW
Tstg
-55 ~ 125
Î
VIN
-0.3 ~ VDD+0.3
V
VOUT
-0.3 ~ VDD+0.3
V
Storage temperature range
Input voltage
Output voltage
* Thermal derating above 25
Î : 6mW per degree Î rise in temperature.
Recommended operation condition
Parameter
Symbol
Rating
Unit
Supply Voltage
VDD
2.2 ~ 4.0
V
Operating temperature
Topr
-20 ~ +70
Î
* In case of using 455KHz resonator.
1- 8
Chapter 1. Introduction
Î
Electrical characteristics (Ta=25 , VDD=3V)
Limits
Parameter
Symbol
Unit
Min.
Typ.
Max.
Condition
Input H current
IIH
-
-
1
uA
VI=VDD
RESET input L current
IIL2
-3
-7.5
-16
uA
VI=GND
K, R input L current
IIL1
-9
-25
-50
uA
K, R input H voltage
VIH1
2.1
-
-
V
-
K, R input L voltage
VIL1
-
-
0.9
V
-
RESET input H voltage
VIH2
2.25
-
-
V
-
RESET input L voltage
VIL2
-
-
0.75
V
-
D. R output L voltage
VOL2
-
0.15
0.4
V
IOL=1mA
REMOUT output L voltage
VOL1
-
0.15
0.4
V
IOL=100uA
REMOUT output H voltage
VOH1
2.1
2.5
-
V
IOH=-8mA
OSC2 output L voltage
VOL3
-
0.4
0.9
V
IOL=70uA
OSC2 output H voltage
VOH3
2.1
2.5
-
V
IOH=70uA
IOL
-
-
1
uA
V0=VDD, Output off
Current on STOP mode
ISTOP
-
-
1
uA
At STOP mode
Operating supply current 1
IDD1
-
0.3
1.0
mA
fOSC = 455KHz
Operating supply current 2
IDD2
-
0.2 5
-
mA
fOSC = 1MHz
Operating frequency
fOSC
0.3
-
1
MHz
-
VI=GND, Output off,
D, R output leakage current
1- 9
Pull-up resistor
provided.
Chapter 1. Introduction
I/O circuit types and options
GMS300 series I/O port types
Pin
I/O
Function
VDD
-
Connected to 2.0~4.0V power supply.
GND
-
Connected to 0V power supply.
RESET
Input
Used to input a manual reset. When the pin goes ÌLÌ, the
D-output ports and REMOUT-output port are initialized to
ÌLÌ, and ROM address is set to address 0 on page 0.
K0~K3
Input
4-bit input port.
Released STOP mode built in pull-up resistor by each pin
as masked option.
(It is released by ÌLÌ input at STOP)
D0~D9
Output
Each can be set and reset independently. The output is in
the form of N-channel-open-drain.
R0~R3
I/O
REMOUT
Output
OSC1
Input
OSC2
Output
4-bit I/O port. (Input mode is set only when each of them
output ÌHÌ.)
In outputting, each can be set and reset independently(or at
once.)
The output is in the form of N-channel-open-drain.
Pull-up resistor and STOP release mode can be respectively
selected as masked option for each bit. (It is released by ÌLÌ
input at STOP.)
High current output port.
The output is in the form of C-MOS.
The state of large current on is ÌHÌ.
Oscillator input. Input to the oscillator circuit and connection
point for ceramic resonator.
Internal capacitors available as masked option.
A feedback resistor is connected between this pin and OSC2
Connect a ceramic resonator between this pin and OSC1.
1 - 10
Chapter 1. Introduction
I/O circuit types and options
RESET
R0~R3
I/O
I/O circuit
I
â
à
â
â
I/O
K0~K3
I
D0~D9
O
REMOUT
O
Note
â
à
â
à
Hysteresis Input Type
Built in pull-upresistor About 400
Ï
Open drain output
ÌHÌ output at reset
(Option)
Built in MOS Tr for
pull-up About 120
Ï
à
Pin
â
à
à
â
à
1 - 11
Built in MOS Tr for
pull-up About 120
Ï
Open drain output
ÌLÌ output at reset
CMOS output
ÌLÌ output at reset
High current source
output
Chapter 1. Introduction
Pin
I/O
I/O circuit
Note
Built in feedback-Resister
About 1
Ð
OSCSTB
OSC2
OSC1
O
â à
â
à
OSC1
I
C1
á
á
Rd
OSC2
Built in dumping-Resister
Rd : About 6
Ï
C2
Rf
(Option)
Built in resonance
Capacitor
C1/C2 = 100pF n%
or C1/C2 = 10 ~
100pF
²
: Masked option
*. Recommendable circuit
OSC1
OSC2
C1
C2
Frequency
(KHz)
Resonator
Maker
Part Name
Load
Capacitor
Operating
Voltage
320
Murata
CSB320D
C1=C2=220pF
2.0 ~ 4.0V
Murata
CSB455E35
C1=C2=Open
2.0 ~ 4.0V
KBR-455BKTL70 C1=C2=Open
2.0 ~ 4.0V
Kyocera
455
480
Chequers
ZTB-455ET4C
C1=C2=Open
2.0 ~ 4.0V
TDK
FCR455K3
C1=C2=Open
2.0 ~ 4.0V
Murata
CSB480E35
C1=C2=Open
2.0 ~ 4.0V
1 - 12
Chapter 1. Introduction
Masked options
The GMS300 series offer the following optional features.
These options are masked.
1. Watch dog timer reset by REMOUT output signal.
2. Input terminals having STOP release mode : K0~K3, R0~R3.
3. I/O terminals having pull-up resistor : R0~R3
4. Ceramic oscillation circuit contained (or not contained).
5. Output form at stop mode
D0~D7 : ÌLÌ or keep before stop mode
STOP Function
Stop mode can be achieved by STOP instructions.
In stop mode :
1. Oscillator is stopped, the operating current is low.
2. Watch dog timer is reset, D8~D9 output and REMOUT output are ÌLÌ.
3. Part other than WDT, D8~D9 output and REMOUT output have a value before
come into stop mode.
ÌBut, the state of D0~D7 output in stop mode is able to choose as masked
option. ÌLÌ output or same level before come into stop mode.
The function to release stop mode is able to choose each bit of K or R input.
Stop mode is released when one of K or R input is going to ÌLÌ.
1. State of D0~D7 output and REMOUT output is return to state of before stop mode
is achieved.
2. After 1024 8 enable clocks for stable oscillating. First instruction start to operate.
3. In return to normal operation, WDT is counted from zero again.
Ø
But, at executing stop instruction, if one of K or R input is chosen to ÌLÌ, stop
instruction is same to NOP instruction.
1 - 13
INTRODUCTION
1
ARCHITECTURE
2
INSTRUCTION
3
EVALUATION BOARD
4
SOFTWARE
5
APPENDIX
6
Chapter 2. Architecture
CHAPTER 2. Architecture
BLOCK DESCRIPTION
Characteristics
Ø
The GMS300 series can incorporate maximum 1024 words (64 words 16
pages 8bits) for program memory. Program counter PC (A0~A5) and page
address register (A6~A9) are used to address the whole area of program memory
having an instruction (8bits) to be next executed.
The program memory consists of 64 words on each page, and thus each page
can hold up to 64 steps of instructions.
The program memory is composed as shown below.
Ø
Program capacity (pages)
01
8
2 3
4 5
6 7
Page 0
Page 1
Page 2
Page 15
63
0
1
2
15
A0~A5
A6~A9
Program counter (PC)
Page address register (PA)
6
4
(Level Ì1Ì)
Stack register
(Level Ì2Ì)
(SR)
(PRS)
(Level Ì3Ì)
Fig 2-1 Configuration of Program Memory
2- 1
Page buffer (PB)
Chapter 2. Architecture
ROM Address Register
The following registers are used to address the ROM.
• Page address register (PA) :
Holds ROM`s page number (0~Fh) to be addressed.
• Page buffer register (PB) :
Value of PB is loaded by an LPBI command when newly addressing a page.
Then it is shifted into the PA when rightly executing a branch instruction (BR)
and a subroutine call (CAL).
• Program counter (PC) :
Available for addressing word on each page.
• Stack register (SR) :
Stores returned-word address in the subroutine call mode.
(1) Page address register and page buffer register :
Address one of pages #0 to #15 in the ROM by the 4-bit binary counter.
Unlike the program counter, the page address register is usually unchanged
so that the program will repeat on the same page unless a page changing
command is issued. To change the page address, take two steps such as
(1) writing in the page buffer what page to jump to (execution of LPBI) and
(2) execution of BR or CAL, because and instruction code is of eight bits so
that page and word cannot be specified at the same time.
In case a return instruction (RTN) is executed within the subroutine that has
been called in the other page, the page address will be changed at the same
time.
(2) Program counter :
This 6-bit binary counter increments for each fetch to address a word in the
currently addressed page having an instruction to be next executed.
For easier programming, at turning on the power, the program counter is
reset to the zero location. The PA is also set to Ì0Ì. Then the program
counter specifies the next ROM address in random sequence.
When BR, CAL or RTN instructions are decoded, the switches on each step
are turned off not to update the address. Then, for BR or CAL, address data
are taken in from the instruction operands (a0 to a5), or for RTN, and
address is fetched from stack register No. 1.
(3) Stack register :
This stack register provides two stages each for the program counter (6 bits)
and the page address register (4bits) so that subroutine nesting can be
mode on two levels.
2- 2
Chapter 2. Architecture
Data memory (RAM)
Ø
Ø
Up to 32 nibbles (16 words 2pages 4bits) is incorporated for storing data.
The whole data memory area is indirectly specified by a data pointer (X,Y). Page
number is specified by zero bit of X register, and words in the page by 4 bits in
Y-register. Data memory is composed in 16 nibbles/page. Figure 2.2 shows the
configuration.
D0
D9 R0
R3 REMOUT
Output port
Data memory page (0~1)
0
1
2
3
Page 0
Page 1
15
4
A0~A3
0
1
Y-register (Y)
X-register (X)
4
2
Fig 2-2 Composition of Data Memory
X-register (X)
X-register is consist of 2bit, X0 is a data pointer of page in the RAM, X1 is only
used for selecting of D8~D9 with value of Y-register
X1=0
X1=1
Y=0
D0
D8
Y=1
D1
D9
Table 2-1 Mapping table between X and Y register
2- 3
Chapter 2. Architecture
Y-register (Y)
Y-register has 4 bits. It operates as a data pointer or a general-purpose register.
Y-register specifies and address (a0~a3) in a page of data memory, as well as it
is used to specify an output port. Further it is used to specify a mode of carrier
signal outputted from the REMOUT port. It can also be treated as a generalpurpose register on a program.
Accumulator (ACC)
The 4-bit register for holding data and calculation results.
Arithmetic and Logic Unit (ALU)
In this unit, 4bits of adder/comparator are connected in parallel as it`s main
components and they are combined with status latch and status logic (flag.)
(1) Operation circuit (ALU) :
The adder/comparator serves fundamentally for full addition and data
comparison. It executes subtraction by making a complement by processing
an inversed output of ACC (ACC+1)
(2) Status logic :
This is to bring an ST, or flag to control the flow of a program. It occurs when
a specified instruction is executed in two cases such as overflow in operation
and two inputs unequal.
I/O circuit
Ports K0~K3 are 4-bit input ports were pulled up by MOS Tr resistor internally.
Ports D0~D9 are output ports, each of which can be independently set and
reset. The output is in the form of Nch-open-drain circuit. The input is in the
form of a MOS transistor input (MOS Tr resistor pull-up. Masked option).
Further, the REMOUT port is a large current driven output port. This port is
designed for source current to drive a high current device.
2- 4
Chapter 2. Architecture
State Counter (SC)
A fundamental machine cycle timing chart is shown below. Every instruction is
one byte length. Its execution time is the same. Execution of one instruction
takes 6 clocks for fetch cycle and 6 clocks for execute cycle (12 clocks in total).
Virtually these two cycles proceed simultaneously, and thus it is apparently
completed in 6 clocks (one machine cycle). Exceptionally BR, CAL and RTN
instructions is normal execution time since they change an addressing
sequencially. Therefore, the next instruction is prefetched so that its execution
is completed within the fetch cycle.
T1 T2 T3 T4 T5 T6 T1 T2 T3 T4 T5 T6
Fetch cycle N
Execute cycle N
Execute cycle N-1
Fetch cycle N-1
Machine
Cycle
Machine
Cycle
é
Phase
ê
Phase
ë
Phase
Fig. 2-3 Fundamental timing chart
2- 5
Chapter 2. Architecture
Clock Generator
The GMS300 series has an internal clock oscillator. The oscillator circuit is
designed to operate with an external ceramic resonator. Internal capacitors are
available as a masked option. Oscillator circuit is able to organize by connecting
ceramic resonator to outside. (In order to built in capacitor for oscillation as
masked option.)
* It is necessary to connect capacitor to outside in order to change ceramic
resonator, You must examine refer to a manufacturer`s
22
OSC2
23
OSC1
Pulse generator
The following frequency and duty ratio are selected for carrier signal outputted
from the REMOUT port depending on a PMR (Pulse Mode Register) value set in
a program.
T
T1
PMR
REMOUT signal
0
T=1/fPUL = 12/fOSC,
T1/T = 1/2
1
T=1/fPUL = 12/fOSC,
T1/T = 1/3
2
T=1/fPUL = 8/fOSC,
T1/T = 1/2
3
T=1/fPUL = 8/fOSC,
T1/T = 1/4
4
T=1/fPUL = 11/fOSC,
T1/T = 4/11
5
No Pulse (same to D0~D9)
* Default value is Ì0Ì
Table 2-2 PMR selection table
2- 6
Chapter 2. Architecture
Initial Reset Circuit
RESET pin must be down to ÌLÌ more than 4 machine cycle by outside
capacitor or other for power on reset.
The mean of 1 machine cycle is below. 1 machine cycle is 6/fOSC, however,
operating voltage must be in recommended operating conditions, and clock
oscillating stability.
* It is required to adjust C value depending on rising time of power supply.
(Example shows the case of rising time shorter than 10ms.)
1
RESET
0.1uF
Watch Dog Timer (WDT)
Watch dog timer is organized binary counter of 14 steps. The selected of
fOSC/6 cycle come in the first step of WDT. If this counter was overflowed, come
out reset signal automatically, internal circuit is initialized.
The overflow time is 6 213/fOSC (108.026ms at fOSC = 455KHz).
Normally, the binary counter must be reset before the overflow by using reset
instruction (WDTR) or / and REMOUT port (Y-reg=8, SO instruction execution) at
masked option.
Ø
* It is constantly reset in STOP mode. When STOP is released, counting is
restarted. (Refer to 1-13 STOP function>)
fOSC/6
Binary counter
(14 steps)
RESET (edge-trigger)
Reset
by instruction
REMOUT
output
Mask Option
2- 7
CPU reset
INTRODUCTION
1
ARCHITECTURE
2
INSTRUCTION
3
EVALUATION BOARD
4
SOFTWARE
5
APPENDIX
6
Chapter 3. Instruction
CHAPTER 3. Instruction
INSTRUCTION FORMAT
All of the 43 instruction in GMS300 series is format in two fields of OP code and
operand which consist of eight bits. The following formats are available with
different types of operands.
é
Format
All eight bits are for OP code without operand.
ê
Format
Two bits are for operand and six bits for OP code.
Two bits of operand are used for specifying bits of RAM and X-register (bit 1 and
bit 7 are fixed at Ì0Ì)
ë
Format
Four bits are for operand and the others are OP code.
Four bits of operand are used for specifying a constant loaded in RAM or Yregister, a comparison value of compare command, or page addressing in ROM.
Format
ì
Six bits are for operand and the others are OP code.
Six bits of operand are used for word addressing in the ROM.
3- 1
Chapter 3. Instruction
INSTRUCTION TABLE
The GMS300 series provides the following 43 basic instructions.
Category
Mnemonic
Function
ST*1
LAY
A à Y
S
LYA
Y à A
S
3
LAZ
A à 0
S
4
LMA
M(X,Y) à A
S
5
LMAIY
M(X,Y) à A, Y à Y+1
S
LYM
Y à M(X,Y)
S
7
LAM
A à M(X,Y)
S
8
XMA
A ä M(X,Y)
S
9
LYI i
Y à i
S
M(X,Y) à i, Y à Y+1
S
X à n
S
SEM n
M(n) à 1
S
REM n
M(n) à 0
S
TM n
TEST M(n) = 1
E
BR a
if ST = 1 then Branch
S
if ST = 1 then Subroutine call
S
Return from Subroutine
S
PB à i
S
1
2
6
10
Register to
Register
RAM to
Register
Immediate
11
LXI n
12
13
14
RAM Bit
Manipulatio
n
15
16
17
LMIIY i
ROM
Address
CAL a
RTN
18
LPBI i
19
AM
A à A + M(X,Y)
C
20
SM
A à M(X,Y) - A
B
21
IM
A à M(X,Y) + 1
C
DM
A à M(X,Y) - 1
B
22
Arithmetic
23
IA
A à A+1
S
24
IY
Y à Y+1
C
25
DA
A à A-1
B
3- 2
Chapter 3. Instruction
Category
Mnemonic
Function
ST*1
Y à Y-1
B
EORM
A à A + M (X,Y)
S
28
NEGA
A à A+1
Z
29
ALEM
TEST A õ M(X,Y)
E
30
ALEI i
TEST A õ i
E
31
MNEZ
TEST M(X,Y) ó 0
N
YNEA
TEST Y ó A
N
33
YNEI i
TEST Y ó i
N
34
KNEZ
TEST K ó 0
N
35
RNEZ
TEST R ó 0
N
36
LAK
A à K
S
LAR
A à R
S
SO
Output(Y) à 1*2
S
39
RO
Output(Y) à 0*2
S
40
WDTR
Watch Dog Timer Reset
S
STOP
Stop operation
S
26
27
32
37
38
DY
Arithmetic
Comparison
Input /
Output
41
Control
42
LPY
PMR à Y
S
43
NOP
No operation
S
Note) i = 0~f, n = 0~3, a = 6bit PC Address
*1 Column ST indicates conditions for changing status. Symbols have the following
meanings
S : On executing an instruction, status is unconditionally set.
C : Status is only set when carry or borrow has occurred in operation.
B : Status is only set when borrow has not occurred in operation.
E : Status is only set when equality is found in comparison.
N : Status is only set when equality is not found in comparison.
Z : Status is only set when the result is zero.
3- 3
Chapter 3. Instruction
*2 Operation is settled by a value of Y-register.
Value of X-reg
Value of Y-reg
Operation
0 or 1
0~7
0 or 1
8
REMOUT port repeats ÌHÌ and ÌLÌ in pulse
frequency. (when PMR = 5, it is fixed at ÌHÌ)
SO : REMOUT (PMR) à 1
RO : REMOUT (PMR) à 0
0 or 1
9
SO : D0 ~ D9 à 1 (High-Z)
R0 : D0 ~ D9 à 0
0 or 1
A~D
SO : R(Y-Ah) à 1, RO : R(Y-Ah) à 0
0 or 1
E
SO : R0 ~ R3 à 1, RO : R0~R3 à 0
0 or 1
F
SO : D0 ~ D9 à 1 (High-Z) R0~R3 à 1
R0 : D0 ~ D9 à 0
R0~R3 à 0
2 or 3
0
SO : D(8) à 1, RO : D(8) à 0
2 or 3
1
SO : D(9) à 1, RO : D(9) à 0
SO : D(Y) à 1, RO : D(Y) à 0
3- 4
Chapter 3. Instruction
DETAILS OF INSTRUCTION SYSTEM
All 43 basic instructions of the GMS300 Series are one by one described in detail
below.
Description Form
Each instruction is headlined with its mnemonic symbol according to the
instructions table given earlier.
Then, for quick reference, it is described with basic items as shown below. After
that, detailed comment follows.
• Items :
- Naming :
- Status :
- Format :
- Operand :
- Function
Full spelling of mnemonic symbol
Check of status function
Categorized into
to
Omitted for Format
é ì
é
3- 5
Chapter 3. Instruction
Detailed Description
(1) LAY
Naming :
Status :
Format :
Function :
<Comment>
Load Accumulator from Y-Register
Set
I
A à Y
Data of four bits in the Y-register is unconditionally transferred
to the accumulator. Data in the Y-register is left unchanged.
(2) LYA
Naming :
Status :
Format :
Function :
<Comment>
Load Y-register from Accumulator
Set
I
Y à A
Load Y-register from Accumulator
(3) LAZ
Naming :
Status :
Format :
Function :
<Comment>
Clear Accumulator
Set
I
A à 0
Data in the accumulator is unconditionally reset to zero.
(4) LMA
Naming :
Status :
Format :
Function :
<Comment>
(5) LMAIY
Naming :
Status :
Format :
Function :
<Comment>
Load Memory from Accumulator
Set
I
M(X,Y) à A
Data of four bits from the accumulator is stored in the RAM
location addressed by the X-register and Y-register. Such data
is left unchanged.
Load Memory from Accumulator and Increment Y-Register
Set
I
M(X,Y) à A, Y à Y+1
Data of four bits from the accumulator is stored in the RAM
location addressed by the X-register and Y-register. Such data
is left unchanged.
3- 6
Chapter 3. Instruction
(6) LYM
Naming :
Status :
Format :
Function :
<Comment>
(7) LAM
Naming :
Status :
Format :
Function :
<Comment>
(8) XMA
Naming :
Status :
Format :
Function :
<Comment>
(9) LYI i
Naming :
Status :
Format :
Operand :
Function :
<Purpose>
<Comment>
Load Y-Register form Memory
Set
I
Y à M(X,Y)
Data from the RAM location addressed by the X-register and
Y-register is loaded into the Y-register. Data in the memory is
left unchanged.
Load Accumulator from Memory
Set
I
A à M(X,Y)
Data from the RAM location addressed by the X-register and
Y-register is loaded into the Y-register. Data in the memory is
left unchanged.
Exchanged Memory and Accumulator
Set
I
M(X,Y) ä A
Data from the memory addressed by X-register and Y-register
is exchanged with data from the accumulator. For example,
this instruction is useful to fetch a memory word into the
accumulator for operation and store current data from the
accumulator into the RAM. The accumulator can be restored
by another XMA instruction.
Load Y-Register from Immediate
Set
ë
Constant 0 õ i õ 15
Y à i
To load a constant in Y-register. It is typically used to specify
Y-register in a particular RAM word address, to specify the
address of a selected output line, to set Y-register for
specifying a carrier signal outputted from OUT port, and to
initialize Y-register for loop control. The accumulator can be
restored by another XMA instruction.
Data of four bits from operand of instruction is transferred to
the Y-register.
3- 7
Chapter 3. Instruction
(10) LMIIY i
Naming :
Status :
Format :
Operand :
Function :
<Comment>
(11) LXI n
Naming :
Status :
Format :
Operand :
Function :
<Comment>
(12) SEM n
Naming :
Status :
Format :
Operand :
Function :
<Comment>
(13) REM n
Naming :
Status :
Format :
Operand :
Function :
<Comment>
Load Memory from Immediate and Increment Y-Register
Set
ë
Constant 0 õ i õ 15
M(X,Y) à i, Y à Y + 1
Data of four bits from operand of instruction is stored into the
RAM location addressed by the X-register and Y-register.
Then data in the Y-register is incremented by one.
Load X-Register from Immediate
Set
ê
X file address 0 õ n õ 3
X à n
A constant is loaded in X-register. It is used to set X-register in
an index of desired RAM page. Operand of 1 bit of command
is loaded in X-register.
Set Memory Bit
Set
ê
Bit address 0 õ n õ 3
M(X,Y,n) à 1
Depending on the selection in operand of operand, one of four
bits is set as logic 1 in the RAM memory addressed in
accordance with the data of the X-register and Y-register.
Reset Memory Bit
Set
ê
Bit address 0 õ n õ 3
M(X,Y,n) à 0
Depending on the selection in operand of operand, one of four
bits is set as logic 0 in the RAM memory addressed in
accordance with the data of the X-register and Y-register.
3- 8
Chapter 3. Instruction
(14) TM n
Naming :
Status :
Format :
Operand :
Function :
<Purpose>
(15) BR a
Naming :
Status :
Format :
Operand :
Function :
<Purpose>
<Comment>
Test Memory Bit
Comparison results to status
ê
Bit address 0 õ n õ 3
M(X,Y,n) à 1?
ST à 1 when M(X,Y,n)=1, ST à 0 when M(X,Y,n)=0
A test is made to find if the selected memory bit is logic. 1
Status is set depending on the result.
Branch on status 1
Conditional depending on the status
ì
Branch address a (Addr)
When ST =1 , PA à PB, PC à a(Addr)
When ST = 0, PC à PC + 1, ST à 1
Note : PC indicates the next address in a fixed sequence that
is actually pseudo-random count.
For some programs, normal sequential program execution can
be change.
A branch is conditionally implemented depending on the status
of results obtained by executing the previous instruction.
• Branch instruction is always conditional depending on the
status.
a. If the status is reset (logic 0), a branch instruction is not
rightly executed but the next instruction of the sequence is
executed.
b. If the status is set (logic 1), a branch instruction is executed
as follows.
• Branch is available in two types - short and long. The former
is for addressing in the current page and the latter for
addressing in the other page. Which type of branch to exeute
is decided according to the PB register. To execute a long
branch, data of the PB register should in advance be modified
to a desired page address through the LPBI instruction.
3- 9
Chapter 3. Instruction
(16) CAL a
Naming :
Status :
Format :
Operand :
Function :
<Comment>
Subroutine Call on status 1
Conditional depending on the status
ì
Subroutine code address a(Addr)
When ST =1 , PC à a(Addr)
PA à PB
SR1 à PC + 1,
PSR1 à PA
SR2 à SR1
PSR2 à PSR1
SR3 à SR2
PSR3 à PSR2
When ST = 0 PC à PC + 1
PB à PS ST à 1
Note : PC actually has pseudo-random count against the next
instruction.
• In a program, control is allowed to be transferred to a mutual
subroutine. Since a call instruction preserves the return
address, it is possible to call the subroutine from different
locations in a program, and the subroutine can return control
accurately to the address that is preserved by the use of the
call return instruction (RTN).
Such calling is always conditional depending on the status.
a. If the status is reset, call is not executed.
b. If the status is set, call is rightly executed.
The subroutine stack (SR) of three levels enables a subroutine to
be manipulated on three levels. Besides, a long call (to call
another page) can be executed on any level.
• For a long call, an LPBI instruction should be executed before
the CAL. When LPBI is omitted (and when PA=PB), a short
call (calling in the same page) is executed.
3 - 10
Chapter 3. Instruction
(17) RTN
Naming :
Status :
Format :
Function :
<Purpose>
<Comment>
(18) LPBI i
Naming :
Status :
Format :
Operand :
Function :
<Purpose>
<Comment>
(19) AM
Naming :
Status :
Format :
Function :
<Comment>
Return from Subroutine
Set
é
PC à SR1
SR1 à SR2
SR2 à SR3
SR3 à SR3
PA, PB à PSR1
PSR1 à PSR2
PSR2 à PSR3
PSR3 à PSR2
à1
ST
Control is returned from the called subroutine to the calling
program.
Control is returned to its home routine by transferring to the PC
the data of the return address that has been saved in the stack
register (SR1).
At the same time, data of the page stack register (PSR1) is
transferred to the PA and PB.
Load Page Buffer Register from Immediate
Set
ë
ROM page address 0 õ i õ 15
PB à i
A new ROM page address is loaded into the page buffer
register (PB).
This loading is necessary for a long branch or call instruction.
The PB register is loaded together with three bits from 4 bit
operand.
Add Accumulator to Memory and Status 1 on Carry
Carry to status
é
A à M(X,Y)+A, ST à 1(when total>15),
ST à 0 (when total õ15)
Data in the memory location addressed by the X and Y-register
is added to data of the accumulator. Results are stored in the
accumulator. Carry data as results is transferred to status.
When the total is more than 15, a carry is caused to put Ì1Ì
in the status. Data in the memory is not changed.
3 - 11
Chapter 3. Instruction
(20) SM
Naming :
Status :
Format :
Function :
Subtract Accumulator to Memory and Status 1 Not Borrow
Carry to status
é
ST à 1(when A õ M(X,Y))
ST à 0(when A > M(X,Y))
<Comment>
Data of the accumulator is, through a 2`s complemental
addition, subtracted from the memory word addressed by the
Y-register. Results are stored in the accumulator. If data of
the accumulator is less than or equal to the memory word, the
status is set to indicate that a borrow is not caused.
If more than the memory word, a borrow occurs to reset the
status to Ì0Ì.
(21) IM
Naming :
Status :
Format :
Function :
A à M(X,Y) - A
Increment Memory and Status 1 on Carry
Carry to status
é
ST à 1(when M(X,Y) ö 15)
ST à 0(when M(X,Y) < 15)
<Comment>
Data of the memory addressed by the X and Y-register is
fetched. Adding 1 to this word, results are stored in the
accumulator. Carry data as results is transferred to the status.
When the total is more than 15, the status is set. The memory
is left unchanged.
(22) DM
Naming :
Status :
Format :
Function :
<Comment>
A à M(X,Y) + 1
Decrement Memory and Status 1 on Not Borrow
Carry to status
é
A à M(X,Y) - 1
ST à 1(when M(X,Y) ö1)
ST à 0 (when M(X,Y) = 0)
Data of the memory addressed by the X and Y-register is
fetched, and one is subtracted from this word (addition of Fh)>
Results are stored in the accumulator. Carry data as results is
transferred to the status. If the data is more than or equal to
one, the status is set to indicate that no borrow is caused. The
memory is left unchanged.
3 - 12
Chapter 3. Instruction
(23) IA
Naming :
Status :
Format :
Function :
<Comment>
(24) IY
Naming :
Status :
Format :
Function :
<Comment>
(25) DA
Naming :
Status :
Format :
Function :
<Comment>
Increment Accumulator
Set
é
A à A+1
Data of the accumulator is incremented by one. Results are
returned to the accumulator.
A carry is not allowed to have effect upon the status.
Increment Y-Register and Status 1 on Carry
Carry to status
é
Y à Y+1
ST à 1 (when Y = 15)
ST à 0 (when Y < 15)
Data of the Y-register is incremented by one and results are
returned to the Y-register.
Carry data as results is transferred to the status. When the
total is more than 15, the status is set.
Decrement Accumulator and Status 1 on Borrow
Carry to status
é
A à A -1
ST à 1(when A ö1)
ST à 0 (when A = 0)
Data of the accumulator is decremented by one. As a result
(by addition of Fh), if a borrow is caused, the status is reset to
Ì0Ì by logic. If the data is more than one, no borrow occurs
and thus the status is set to Ì1Ì.
3 - 13
Chapter 3. Instruction
(26) DY
Naming :
Status :
Format :
Function :
<Purpose>
<Comment>
(27) EORM
Naming :
Status :
Format :
Function :
<Comment>
(28) NEGA
Naming :
Status :
Format :
Function :
<Purpose>
<Comment>
Decrement Y-Register and Status 1 on Not Borrow
Carry to status
é
Y à Y -1
ST à 1 (when Y ö 1)
ST à 0 (when Y = 0)
Data of the Y-register is decremented by one.
Data of the Y-register is decremented by one by addition of
minus 1 (Fh).
Carry data as results is transferred to the status. When the
results is equal to 15, the status is set to indicate that no
borrow has not occurred.
Exclusive or Memory and Accumulator
Set
é
A à M(X,Y) + A
Data of the accumulator is, through a Exclusive OR,
subtracted from the memory word addressed by X and Yregister. Results are stored into the accumulator.
Negate Accumulator and Status 1 on Zero
Carry to status
é
A à A+1
ST à 1(when A = 0)
ST à 0 (when A != 0)
The 2`s complement of a word in the accumulator is obtained.
The 2`s complement in the accumulator is calculated by adding
one to the 1`s complement in the accumulator. Results are
stored into the accumulator. Carry data is transferred to the
status. When data of the accumulator is zero, a carry is
caused to set the status to Ì1Ì.
3 - 14
Chapter 3. Instruction
(29) ALEM
Naming :
Status :
Format :
Function :
<Comment>
(30) ALEI
Naming :
Status :
Format :
Function :
Accumulator Less Equal Memory
Carry to status
é
A õ M(X,Y)
ST à 1 (when A õ M(X,Y))
ST à 0 (when A > M(X,Y))
Data of the accumulator is, through a complemental addition,
subtracted from data in the memory location addressed by the
X and Y-register. Carry data obtained is transferred to the
status. When the status is Ì1Ì, it indicates that the data of
the accumulator is less than or equal to the data of the
memory word. Neither of those data is not changed.
Accumulator Less Equal Immediate
Carry to status
ë
ST à 1 (when A õ i)
ST à 0 (when A > i)
<Purpose>
Data of the accumulator and the constant are arithmetically
compared.
<Comment>
Data of the accumulator is, through a complemental addition,
subtracted from the constant that exists in 4bit operand. Carry
data obtained is transferred to the status. The status is set
when the accumulator value is less than or equal to the
constant. Data of the accumulator is left unchanged.
(31) MNEZ
Naming :
Status :
Format :
Function :
<Purpose>
<Comment>
A õi
Memory Not Equal Zero
Comparison results to status
é
M(X,Y) ó 0
ST à 1(when M(X,Y) ó 0)
ST à 0 (when M(X,Y) = 0)
A memory word is compared with zero.
Data in the memory addressed by the X and Y-register is
logically compared with zero. Comparison data is thransferred
to the status. Unless it is zero, the status is set.
3 - 15
Chapter 3. Instruction
(32) YNEA
Naming :
Status :
Format :
Function :
<Purpose>
<Comment>
(33) YNEI
Naming :
Status :
Format :
Operand :
Function :
<Comment>
(34) KNEZ
Naming :
Status :
Format :
Function :
<Purpose>
<Comment>
(35) RNEZ
Naming :
Status :
Format :
Function :
<Purpose>
<Comment>
Y-Register Not Equal Accumulator
Comparison results to status
é
YóA
ST à 1 (when Y ó A)
ST à 0 (when Y = A)
Data of Y-register and accumulator are compared to check if
they are not equal.
Data of the Y-register and accumulator are logically compared.
Results are transferred to the status. Unless they are equal,
the status is set.
Y-Register Not Equal Immediate
Comparison results to status
ë
Constant 0 õ i õ 15
Yói
ST à 1 (when Y ó i)
ST à 0 (when Y = i)
The constant of the Y-register is logically compared with 4bit
operand. Results are transferred to the status. Unless the
operand is equal to the constant, the status is set.
K Not Equal Zero
The status is set only when not equal
é
When K ó 0, ST à 1
A test is made to check if K is not zero.
Data on K are compared with zero. Results are transferred to
the status. For input data not equal to zero, the status is set.
R Not Equal Zero
The status is set only when not equal
é
When R ó 0, ST à 1
A test is made to check if R is not zero.
Data on R are compared with zero. Results are transferred to
the status. For input data not equal to zero, the status is set.
3 - 16
Chapter 3. Instruction
(36) LAK
Naming :
Status :
Format :
Function :
<Comment>
(37) LAR
Naming :
Status :
Format :
Function :
<Comment>
(38) SO
Naming :
Status :
Format :
Function :
<Purpose>
<Comment>
Load Accumulator from K
Set
é
AàK
Data on K are transferred to the accumulator
Load Accumulator from R
Set
é
AàR
Data on R are transferred to the accumulator
Set Output Register Latch
Set
é
D(Y) à 1
0õYõ7
REMOUT à 1(PMR=5)
Y=8
D0~D9 à 1 (High-Z)
Y=9
R(Y) à 1
Ah õ Y õ Dh
Rà1
Y = Eh
D0~D9, R à 1
Y = Fh
A single D output line is set to logic 1, if data of Y-register is
between 0 to 7.
Carrier frequency come out from REMOUT port, if data of
Y-register is 8.
All D output line is set to logic 1, if data of Y-register is 9.
It is no operation, if data of Y-register between 10 to 15.
When Y is between Ah and Dh, one of R output lines is set at
logic 1.
When Y is Eh, the output of R is set at logic 1.
When Y is Fh, the output D0~D9 and R are set at logic 1.
Data of Y-register is between 0 to 7, selects appropriate D
output.
Data of Y-register is 8, selects REMOUT port.
Data of Y-register is 9, selects all D port.
Data in Y-register, when between Ah and Dh, selects an
appropriate R output (R0~R3).
Data in Y-register, when it is Eh, selects all of R0~R3.
Data in Y-register, when it is Fh, selects all of D0~D9 and
R0~R3.
3 - 17
Chapter 3. Instruction
(39) RO
Naming :
Status :
Format :
Function :
<Purpose>
<Comment>
(40) WDTR
Naming :
Status :
Format :
Function :
<Purpose>
Reset Output Register Latch
Set
é
D(Y) à 0
0õYõ7
REMOUT à 0
Y=8
D0~D9 à 0
Y=9
R(Y) à 0
Ah õ Y õ Dh
Rà0
Y = Eh
D0~D9, R à 0
Y = Fh
A single D output line is set to logic 0, if data of Y-register is
between 0 to 9.
REMOUT port is set to logic 0, if data of Y-register is 9.
All D output line is set to logic 0, if data of Y-register is 9.
When Y is between Ah and Dh, one of R output lines is set at
logic 0.
When Y is Eh, the output of R is set at logic 0
When Y is Fh, the output D0~D9 and R are set at logic 1.
Data of Y-register is between 0 to 7, selects appropriate D
output.
Data of Y-register is 8, selects REMOUT port.
Data of Y-register is 9, selects D port.
Data in Y-register, when between Ah and Dh, selects an
appropriate R output (R0~R3).
Data in Y-register, when it is Eh, selects all of R0~R3.
Data in Y-register, when it is Fh, selects all of D0~D9 and
R0~R3.
Watch Dog Timer Reset
Set
é
Reset Watch Dog Timer (WDT)
Normally, you should reset this counter before overflowed
counter for dc watch dog timer. this instruction controls this
reset signal.
3 - 18
Chapter 3. Instruction
(41) STOP
Naming :
Status :
Format :
Function :
<Purpose>
(42) LPY
Naming :
Status :
Format :
Function :
<Comment>
(43) NOP
Naming :
Status :
Format :
Function :
STOP
Set
é
Operate the stop function
Stopped oscillator, and little current.
(See 1-12 page, STOP function.)
Pulse Mode Set
Set
é
PMR à Y
Selects a pulse signal outputted from REMOUT port.
No Operation
Set
é
No operation
3 - 19
INTRODUCTION
1
ARCHITECTURE
2
INSTRUCTION
3
EVALUATION BOARD
4
SOFTWARE
5
APPENDIX
6
Chapter 4. Evaluation Board
CHAPTER 4. Evaluation Board
OUTLINE
The GMS 30000 EVA is an evaluation board for GMS300 series, 4-bit, 1-chip
microcomputer. It is designed to evaluate and confirm the operations of the
application system in the nearest possible form of final products while it is under
development.
The major features are as follows :
• The GMS 30000 EVA is used for the evaluation chip.
• The board is connected to the application system through an connection
cable (DIP24).
• EPROM of 2764, 27128, and 27256 are used for the program memory.
• The instruction system and I/O specifications are basically the same as
those of the GMS300 series.
Product Specifications
• GMS 30000 EVA board module
• Connection cable
Ø
Dimensions
64 82 (mm)
Supply Voltage
2.5 ~ 5.5 (V)
Operating temperature 0~50 ( )
DIP 24 cable
4- 1
Î
Chapter 4. Evaluation Board
Connection
Perform emulation with the following connectors.
[User] Connection socket
The cable for the target system is connected.
Pin No.
Signal
Pin No.
Signal
1
Reset
13
D9
2
GND
14
D1
3
R0
15
D2
4
R1
16
D3
5
R2
17
D4
6
R3
18
D5
7
K0
19
D6
8
K1
20
D7
9
K2
21
Remout
10
K3
22
OSC2
11
D0
23
OSC1
12
D8
24
VDD
[M1] Monitor pin
Operations inside the GMS 30000 EVA can be monitored. Signals that can be
monitored are as follows.
AC0~AC3, X0, X1, Y0~Y3, REMDATA, CK2, CK5, WDTR, GND
[M2] Oscillation monitoring pin
The oscillation output signal can be monitored.
[T1] D8 output monitoring pin
The D8 output signal can be monitored.
[T2] D9 output monitoring pin
The D9 output signal can be monitored.
4- 2
Chapter 4. Evaluation Board
Optional setting
The following optional setting in accordance with the application system
specifications is required :
[S1] Optional mask setting
Optional masks available with GMS300 series units can be set by selecting
short posts.
1. Setting of K-input and R-Port for STOP release
Shorting the KSR0 ~ KSR3 and RSR0 ~ RSR3 with the side of H can set the
STOP releasing function by the corresponding KSR0 ~ KSR3 and RSR0 ~
RSR3. If no STOP releasing function is desired, short them with the side of L.
Setting pin
K0
K1
K2
K3
R0
R1
R2
R3
Short post
KSR0
KSR1
KSR2
KSR3
RSR0
RSR1
RSR2
RSR3
Setting of STOP
H
H
H
H
H
H
H
H
No setting of STOP
L
L
L
L
L
L
L
L
2. Setting of pull-up resistor built-in R-Port pull-up resistor can be built in the
R-Port by shorting the corresponding RPU0 ~ RPU3 with the side of H.
If installation of built-in pull-up resistor is not desired, short them with the
side of L.
Setting pin
R0
R1
R2
R3
Short post
RPU0
RPU1
RPU2
RPU3
Built-in pull-up resistor installation
H
H
H
H
No built-in pull-up resistor installation
L
L
L
L
4- 3
Chapter 4. Evaluation Board
3. Setting of output condition of D0~D7 in STOP
Shorting the DSC0~DSC7 with the side of H can set the output condition of
corresponding D-output in STOP at ÌLÌ forcibly.
To set the condition of usual output (the condition before STOP started is
maintained), short them with the side of L.
Setting pin
D0
D1
D2
D3
D4
D5
D6
D7
Short post
DSC0
DSC1
DSC2
DSC3
DSC4
DSC5
DSC6
DSC7
Forced setting at
ÌLÌ in STOP
release
H
H
H
H
H
H
H
H
Usual output in
STOP released
L
L
L
L
L
L
L
L
4. Setting of watch dog timer release with REMOUT output
The watch dog timer can be reset with REMOUT output signals by shorting
the WDTM with the side of L.
If the WDT resetting with REMOUT output signals is not desired, short it
with the side of H.
Short post
WDTM
Reset timer
L
Do not reset timer
H
[S2] External STOP setting
STOP can be set from the outside by shorting the S2 toward the side of H.
Usually, short it toward the side of L.
[S3] Power supply connection
This selection should be strapped to VDD.
4- 4
Chapter 4. Evaluation Board
[S4] EPROM 2764/128, and 27256 can be installed by switching over the S4. For
EPROM, however, right-justify ROM chip pin 1 from socket pin 3.
Short post
S4
2764/128
H
27256
L
[S5, S6] Clock input selection
Self-induced oscillation with the external clock input and oscillator can be set by
switching over the S5 & S6
Short post
S5 & S6
External clock input
U
Internal self-induced oscillation
X
For internal clock input, install an oscillator on the PCB. Since the oscillation
circuit constant varies depending on the oscillator, adjust the constant by
referring to the oscillator manufacture`s recommendable values.
[S7, S8, JP] Clock input selection
MHz and KHz oscillation can be selected by switching over the S7, S8 and JP.
Short post
S7 & S8 & JP
MHz oscillation
M
KHz oscillation
K
4- 5
Chapter 4. Evaluation Board
Caution on Operation
• It is required to install a 24DIP IC socket in the application system. The
connection cable is connected to the socket.
• There is a possibility that the ceramic oscillator on the application system cannot
oscillate properly due to the influence of connection cable wiring capacitor or other
reasons. In such a case, install the oscillator on the evaluation board.
• Since the GMS 30000 EVA is designed to evaluate the program operations, there
is a case where the AC and DC characteristics differ from those of the massproduced chips
S3
L
U
S5
X
U
S6
X
H
S4
L
M
S7
K
M
S8
K
M
JP
K
3
H
1
28
GND
CX3
CX2
X1
X0
E V A
(3520
Connector
M1
AC3
80
AC2
1
AC1
AC0
Y3
(80QFP)
Y2
Y1
Y0
WDTR
H
REM DATA
RSR0
S1
RSR1
RSR2
GND
S2
GSEN
EVA30000
T2
RPU0
RSR3
USER
T1
S1
DSC6
DSC5
Connector
(24Pin Socket)
DSC4
DSC3
KSR1
DSC2
KSR2
DSC1
KSR3
DSC0
BKPOINT
DSC7
RPU2
KSR0
H
L
Fig 4-1 Layout Diagram
4- 6
L
WDTM
RPU1
RPU3
H
L
INTRODUCTION
1
ARCHITECTURE
2
INSTRUCTION
3
EVALUATION BOARD
4
SOFTWARE
5
APPENDIX
6
Chapter 5. Software
CHAPTER 5. Software
Configuration of Assembler
Execute File
Description
GA80.EXE
Assembler
GMSLST.EXE
Create assembler list file
GMSHEX.EXE
Create HEX.file
GMSCRF.EXE
Create cross reference file
GMSTST.EXE
Create instruction check file
GMSROM.EXE
Create ROM dump file
GS.BAT
Batch processing of the above
GMS30K.LIB
Instruction library file
Boothing up Assembler
Creating your own source file with the extension name of SRC and execute batch
file (GS.BAT). This batch file converts the source code written in mnemonic into
machine language and generate a kind of useful file.
C> GS Source file (.SRC)
Input File
Output File
EX.SRC
EX.LST
EX.RHX
EX.CRF
EX.TST
EX.DMP
EX.SYM
Content
List file
Hexa file (for EPROM, simulator)
Cross reference file
Instruction check file
ROM dump file (for masking data)
Symbol file
* HEX and PRN file is intermediate file
5- 1
Chapter 5. Software
Configuration of Simulator
1. Overview
The simulator is a program for GMS300 Series 4-bit one-chip microcomputer.
The environment is organized based upon Hexa file of *.RHX and Cross Reference
file of *.CRF generated by assembling the source program coded by programmer.
Execution Environment
System : IBM-PC/AT or higher (MS-DOS or PC-DOS)
Video : Hercules, EGA or VGA color
Organizing files
GSSIM.EXE
GMS30K.GSP
:
:
GMS30K.HLP
GMS30K.LOG
:
:
*.BAT
:
PORTIN.DAT
:
Simulator execution file
Store the simulator environment. It is
generated automatically when executing
the program initially (Selected CPU.
Store the file names previously loaded.).
Help file of simulator commands.
Record the working history of users. Generated
by LOG ON and LOG OFF commands.
List a set of simulator command. Generated by
user.
Provide the port input-value when executing
the simulator. Generated by user.
Supporting CPU
GMS30004, GMS30012, GMS30112, GMS30120, GMS30140
5- 2
Chapter 5. Software
2. Characteristics of Simulator
- User-friendly pop-up window menu. Select the necessary command and display
the screen in windows format so that users can know the execution results.
- Display always the register window in the right side so that programmer can check
easily the change of data memory value as program proceeds.
- Maintain the previous simulator environment if user does not make the extra
changes when re-executing after logging out completely from the simulator
previously executed by loading the source program. In other words, the previouslyexecuted file is automatically loaded when the simulator is executed (GMS30K.GSP
file).
- When trace command ([F8] or > T command) is executed, the changed values are
noticed easily by displaying the highlighted changed values in register and memory
windows, if the contents of each register or data memory is changed as command
line is processed.
- When trace command ([F8] or > T command) is executed, the current execution
line is highlighted.
- Out of the simulator commands, load or save commands is executable in pop-up
windows. In-line command is executable as prompt command in the command
window.
5- 3
Chapter 5. Software
3. Screen Organization of Simulator
Screen is basically organized with four windows; Memory, Source, Command and
Register. Source and Command windows can be enlarged up to the full screen
size (CTRL-[F10]). Movement between windows is made by [F6].
3.1 Memory Window
Data memory contents of the currently selected micom is displayed. 32 nibble
data values of 00~1F(h) addresses are displayed.
3.2 Source Window
The contents of *.RHX file called by load command is displayed in the state of
being disassembled. Addresses are displayed randomly in the state of
polynomial together with instruction code and mnemonic. If *.CRF file is
called, label is displayed at the corresponding position. Display position of
source program is adjustable with Up/Down arrow keys and Page Up/Down
keys.
3.3 Command Window
All kinds of commands provided by simulator is executed by In-line command,
and the execution results of the commands are displayed. Command window
size is adjustable with [CTRL]-[F10].
5- 4
Chapter 5. Software
3.4 Register Window
Display each register value inside micom, I/O port value and machine cycle
altogether. When trace command is executed by function key [F8], the
register value after the previous command before the current program counter
is executed is displayed. All kinds of register and I/O ports displayed in
register window are as follows.
PC
: Program counter
2digit 6bit
[Hexa]
ACC
: Accumulator
1digit 4bit
[Hexa]
PA
: Page address
1digit 4bit
[Hexa]
PB
: Page buffer
1digit 4bit
[Hexa]
X
: X register
1digit 1 or 2 [Hexa]
Y
: Y register
1digit 4bit
[Hexa]
ST
: Status register
1digit 1bit
[Binary]
PMR
: Pulse mode register
1digit
[Hexa]
WDT
: Watch dog timer
1digit 14bit
{Hexa]
SP
: Stack pointer level
1digit
SR0
: Stack level 0
4digit
SR1
: Stack level 1
4digit
SR2
: Stack level 2
4digit
OUT
: Remocon out output
[Binary]
K
: K port input register
4bit
[Binary]
Rin
: R port input register
[Binary]
Rout
: R port output register
[Binary]
D
: output port
6or8 10bit [Binary]
Machine Cycle :
The number of command execution is displayed in decimal.
5- 5
Chapter 5. Software
4. Commands in Each Menu
^stands for [CTRL] key, while @ stands for [ALT] key.
4.1 File Menu
Use the function key behind each command as a hot key or execute each
command through selecting [ALT]-[F] key and pressing the highlighted
character.
Load RHX F2 : Load the file named *.RHX, analyze the selected Hexa file
and disassemble it. Display the program address, assemble
code and mnemonic. The order of displayed program
addresses follows the POLYNOMIAL form. Even when the
extention is not input in case of selection, .RHX extension is
presumed to include.
Load CRF @F2 : If Cross reference file of loaded file loads the *.CRF file,
labels and variables assigned by programmer are displayed
at accurate position of Source window so that programmer
can read the program easily. Even when the extension is not
input in case of file selection, .CRF extension is presumed to
include.
Write RHX F3 : When any modifications are made to source program or
program memory after the simulator is loaded once, the
modifications are stored in the same or new filename as
loaded. It has the same command and function as > WP
[filename] of In-line command.
Log ON/OFF F4 : After the simulator is executed, all the input and results are
stored in the filename GMS30K.LOG Once function key [F4]
is pressed, log-in starts, and if the key is pressed one more
time, log-in file is closed in a toggling way. The ON/OFF
state of log-in is displayed in the upper-right corner. It has
the same function as > LOGON and > LOGOFF of In-line
commands.
Os shell @S : When users want to work temporarily under DOS environment,
this command is used. When users want to back to Windows
environment, input > EXIT.
Exit @X
: Used when getting completely out of the simulator environment.
5- 6
Chapter 5. Software
4.2 Window Menu
Use the function key behind each command as a hot key or execute each
command through selecting [ALT]-[W] key and pressing the highlighted
character. Function key [F6] provides the return function to each window.
Command Box: Position the cursor in command window to make it possible to
use In-line command provided by the simulator.
Source Box
: Position the cursor in source window to make it possible for
programmer to see the disassembled source program. It is
possible to use Up/Down arrow keys and Page Up/Down
keys.
Zoom ^F10
: Position the cursor in command or source window, and then
select Zoom or press [CTRL]-[F10] key to enlarge the window
to the full screen size.
5- 7
Chapter 5. Software
4.3 Run Menu
Use the function key behind each command as a hot key or execute each
command through selecting [ALT]-[R] key and pressing the highlighted
character.
MCU Reset ^F9 : Initialize the execution environment of the simulator. In
other words, initialize the register value to 0 or 1, and
machine cycle value is changed to 0. It has the same
command and function as > CR command of In-line
command.
Go F5
: Program executes from the current value of program counter.
Press [ESC], [Enter] or [Space] key to stop execution, and
display the current register value.
Animate @5 : Program executes from the current value of program counter.
The value of data memory or registers are highlighted in the
corresponding window. Press [ESC], [Enter] or [Space] key to
stop execution. Because of speed difference among system,
the speed is adjustable from 0 to 40.
(0 : fastest, 40 : slowest)
Trace F8
: Program executes line by line from the current value of
program counter. The changing values of registers and
memory are highlighted in register window and memory window
respectively.
Execute Batch : When the batch filename consisted of a set of commands
made by user using editor is input, each command executes
automatically as In-line command is input. It has the same
function as > BAT command of In-line command.
5- 8
Chapter 5. Software
4.4 Option Menu
To execute each command, select [ALT]-[O] key and press the highlighted
character in each command line. Or select the menu and press the [Enter]
key.
MCU Select
: Select according to the kind of micom. Able to select on of
GMS30004, 30012, 30112, 30120 or 30140 among GMS300
series. Once the command is executed, the window
indicating the characteristics of each micom is open. Press
Left, Right, Up Down key to select the micom to work.
Setup
: Set the execution mode of selected micom. It has the same
function as > SET command of In-line command. Once the
function is executed, a small <Setup> window is open.
Position the cursor in either of I/O Input and Output mode,
Symbol, Execution Mode of Watch Dog Timer with the item to
change. Assign the corresponding execution mode with Left,
Right arrow key.
Execution Mode to be Assigned in <Setup>
I/O Input [pi]
= [0] Port Input from I/O register
[1] Port input from keyboard
[2] Port input from file (PORTIN.DAT)
I/O Output
= [0] No display
[1] Display
[2] Display & Break
Symbol
= [0] Search
[1] Unsearch
Watch Dog Timer = [0] OFF
[1] ON (No option)
[2] ON (Option)
5- 9
Chapter 5. Software
5. Simulator Execution
5.1 File Load
Use one of three ways to load the file to run from the simulator. First execute
the GSSIM.EXE file from DOS and name it as a parameter.
>a:\GSSIM TEST.RHX (Here the extention needs not be input.)
The following screen will be displayed.
)LOH
:LQGRZ
5XQ
2SWLRQ
/RJ
2))
*06
5HJLVWHU
3& 3$
$FF
3%
;
<
&
/;,
67
305
)
/<,
)
:'7
'
62
)
/$=
63
)
/0$
65
)
&
'<
65
)
)
%5
)
65
(
/<,
'
&
5
6RXUFH
$?7(675+;
,2 3RUWV
&RPPDQG
&38
287
.
*06
520
,2
,QSXW
,2
2XWSXW >SR@
6\PERO
%\WHV
>SL@
>@
5$0
1LEEOHV
5LQ
>@ 3RUW ,QSXW )URP ,2 5HJLVWHU
5RXW
>@ 1R 'LVSOD\
'
>@ 6HDUFK
:DWFK 'RJ 7LPHU>:G@
0DFKLQH &\FOH
>@ 2))
!
) +(/3!
&WUO ) =220!
) 6ZLWFK!
5 - 10
*6(1*06. 6LPXODWRU 9HU Chapter 5. Software
Second, execute the GSSIM.EXE file and then the Load RHX (Hot key is
[F2]). The following small window is open at the center of screen waiting for
user to input the Hexa filename to work.
*
File
Name
*
A : \UNNAMED.RHX
When no file is selected, Unnamed.rhx filename is displayed. When the
filename to work is input immediately, the file from the current directory is
called. If the specific directory is assigned, the file from the assigned directory
is called.
Third, call the file to work through using the >LP [filename] from command
window by in-line command.
Here for example, load the TEST.RHX file
*
File
Name
*
A : \TEST.RHX
TEST.RHX file is called and the contents of HEXA file is analyzed from the
simulator. The source contents in the state of being disassembled is
displayed from Source window. Incase of filename input, although RHX is not
input, .RHX extension presumed to include by default.
5 - 11
Chapter 5. Software
Also when there is Cross Reference File of working file, press Load CRF (Hot
key [ALT]-[F2]). The following small window is open at the center of screen
waiting for user to input *.CRF filename.
*
File
Name
*
A : \TEST.CRF
The filename called by Load RHX command is displayed by default as .CRF
filename. When .CRF file is called, the label of source program created by
programmer is displayed at the label position of Source window for easy
reading of program by user.
5 - 12
Chapter 5. Software
5.2 File Store
When the specific part of source program is changed under the simulator
environment by calling the working file, the corresponding Hexa file needs to
be stored. Use one of the following two methods.
First, when executing the pop-up command Save RHX (Hot key is [F3]), the
following small window is open at the center of screen waiting for user to input
the Hexa filename. The filename called by file load command by default is
displayed. When the filename is not changed, hit just the [Enter] key. When
user wants to change the filename to store, input the filename to change.
*
File
Name
*
A : \TEST.RHX
Second, store the processed Hexa file using > WP [filename] from command
window with In-line command.
Here when the same filename to store already exists in the disk, ÌFile
Already ExistÌ message comes up asking user by [YES/NO] if user overwrite
or not.
5 - 13
Chapter 5. Software
5.3 Closing the Simulator
Using the pop-up command Exit (Hot key [ALT]-[X]) or In-line command > Q,
exit from the simulator environment.
When execute the command, the following message comes up for the checkup asking the user`s intention to store, if user does not store the changed file
after changing the loaded file to work. Use Tab key or left, right direction key
to select YES/NO.
Program have changed. Save it ?
Yes
No
Also for recording the work contents, even when exiting the simulator without
Log OFF, Log OFF is done automatically and GMS30K.LOG file is stored.
5 - 14
Chapter 5. Software
6. Simulator Commands
6.1 Command Syntax
1) A (Assemble)
To assemble what is commanded for every line from the specified
<address> and write in the memory.
2) BAT (Batch)
To execute what is commanded in the command file in a batch.
When there is a format error, command error is issued and execution is
stopped at the error point.
3) BP (Break Point set), BL (Break point List)
To set break point.
To display the set break Point.
4) BS (Break point set step)
To set break point with No. of steps.
5) BC (Break point Clear)
To clear the specified No. break point.
6) CR (CPU Reset)
To reset the simulator to the initial state.
7) DPP (Dump Program memory)
To display the content of the memory in the area of the No. of pages
specified with <In> from the specified <address> in hexadecimal. The
address here is polynomial.
8) DPS (Dump Program memory)
To display the content of the memory in the area of the No. of pages
specified with <In> from the specified <address> in hexadecimal.
9) DD (Dump Data memory)
To display all the data in Data Memory in hexadecimal.
10) EPP (Exchange Program memory)
To display and modify the specified data in the program memory.
Address here is polynomial.
5 - 15
Chapter 5. Software
11) EPS (Exchange Program memory)
To display and modify the specified data in the program memory.
12) ED (Exchange Data memory)
To display or modify data in the specified data memory.
13) FPP (Fill Program memory)
To fill the area of the program memory specified with <In> from the specified
<address> with the specified byte data. The address here is polynomial.
14) FPS (Fill Program memory)
To fill the area of the program memory specified with <In> from the specified
<address> with the specified byte data.
15) FD (Fill Data memory)
To fill the area of the data memory specified with <In> from the specified
<address> with the specified nibble data.
16) G (Go)
To execute the program in the specified program memory.
17) H (Hex calculate)
To add or subtract in hexadecimal.
18) LOGON (LOGIN)
To log the commands executed after this command.
19) LOGOFF (LOGOUT)
To end logging.
20) LP (Load Program from MS-DOS* file)
To load `files` on MS-DOS* to the memory.
21) MPP ( Move Program memory)
To transfer data in the memory area to another area.
The address here is polynomial.
5 - 16
Chapter 5. Software
22) MPS (Move Program memory)
To transfer data in the memory area to another area.
23) P (Port set)
To set the specified data at the specified I/O register.
24) Q (Quit)
To return to MS-DOS*.
25) R (Register dump or change)
To display or modify the register data.
26) SET (setup)
To set the operation Mode for the simulator.
27) SL (Symbol file Load)
To load symbol tables from the specified symbol file.
28) ST (Status)
To display the simulator status.
29) T (Trace)
To execute the program in the specified program memory address a single step.
30) TMT(Time)
To obtain time from the No. of machine cycles and clock frequency.
31) TMC (Time)
To obtain No. of machine cycle from the time and clock frequency.
32) U (Unassemble)
To unassemble data in the area specified with <In> from the specified <address>
and display in mnemonic.
33) Wp (Write Program to MS-DOS* file)
To read-out data in all the ROM area and write the Intel hexa data in the files
specified with <file name>.
34) ? (Help)
To display the list of commands of this simulator
5 - 17
Chapter 5. Software
6.3 Description of Commands
The symbols used in this chapter are defined as in below.
1) XXXX
Indicates input from the keyboard.
Indicates Return key.
2) ã
3) _
Indicates insertion of space characters.
4) In
Indicates range.
5) [ ]
Indicates it is omittable.
6) No. used on this system are hexadecimal. However, the machine cycles are
decimal.
(Common items on this simulator)
1) This simulator accepts up to 132 characters per each line.
Before pressing `ã` key, data can be modified in the following procedure.
<BS> Key deletes one character and the cursor sets back by one character.
2) Commands can be input both in block and small letters and both are treated
as the same.
3) Commands can be terminated by inputting `.`.
4) Command history (recall)
This simulator has 16 command buffers and each time `Control A` is
pressed, command immediately before the current one is displayed.
5) When `!XX` is executed to `*`, MS-DOS* commands can be executed
temporarily.
6) Regarding the omission indicated with [ ], when one [<address>] or [In] is
omitted, the area may not be recognized. In this case, be careful as the
current operation cannot be ensured.
7) When `.XXXX` is specified, it is treated as a symbol. Therefore, before using
this specification, specification of Symbol file should have been made.
8) When `ESC` key is pressed, command execution is stopped and the system
moves to `*` mode.
9) When In is LXX< XX indicates No. of words and when there is no L, XX
indicates an address.
10) For command separator (indicated with_in this Manual), `_` or `,` can be
used.
11) When `Control C` is pressed, the system goes back to `MS-DOS*`.
12) In case of both sequential and polynomial address, the first two digits of an
<address> indicate No. of page and the latter two digits indicate the address.
Hereunder is the explanation on each command used on this system.
5 - 18
Chapter 5. Software
A (Assemble)
[Function]
To assemble commands for each line from the specified <address> and write
them in the memory.
[Format]
> A_ [<address>] ã
[Explanation]
With this, the system assembles commands for each line from the specified
<address> and writes them in the memory.
When <address> is omitted, data is written from the current `PC` address.
Assemble can be finished by keying in `.`.
When `_` is keyed in, the system goes back the address just before the current
one.
[e.g.]
>A 200
0200
0201
0203
0201
0200
>
ã
40
21
77
03
0D
LYI
LAM
ALEI
LMA
SO
0
14
SO ã
LMA ã
- ã
- ã
. ã
BAT (Batch)
[Function]
To execute commands in the command file in a batch. When there is a format
error, execution is stopped there and command error is issued.
[Format]
BAT_<File Name> ã
[Explanation]
With this command, the system executes commands in the command file in a
batch. When there is a format error, execution is stopped there and command
error is issued. In order to execute this command, it is required to create the
command file on the editor in advance.
[e.g]
>BAT test.bat ã
>R PA 0
>R PB 0BATCH END
>
5 - 19
Chapter 5. Software
BP (Break Point set), BL (Break point List)
[Function]
BP
To set the break point.
BL
To display the set break point
BPS
To set step break point.
[Format]
BP[n]_adr[_m]ã
n:
adr :
m:
Set break No. 0~9.
Set address for setting break
Valid only when n=0, setting No. of times to pass the break
point. The m range is 1õmõ255. m value should be set in
hexadecimal.
BPS_stã
st :
Set No. of steps.
st range is 1õstõ2147483647.
st value should be set in decimal.
BPIã
BPOã
BLã
[Explanation]
This command is used to the break point.
Break on this simulator is to stop after executing the command on the specified
address.
When `BPS st` is specified, the system stops when the value on the machine
cycle register becomes equal to st.
When `BPI` is specified, the system stops before command execution every time
command input is made.
Unassemble displayed in this case is the address with input command.
When `BPO` is specified, the system displays the value on that occasion on CRT
and stops every time output command is made.
When `BP` only or `BL` is specified, the state of the currently set break point is
displayed.
It is possible to used symbols for specifying adr.
When `n` is omitted in break setting command, No. shall be allocated from 1 to all
empty No.
5 - 20
Chapter 5. Software
[e.g.]
1) Example to occur break after passing page 1 address 0 three times.
>BP0
100
3ã
2) Example to set a break point at page 5 address 0.
>BP
>BL ã
0 =
1 =
500
0100
0500
ã
( 3)
3) Example to occur break on the main label (in case the main label is at page 5
address 0.)
>BP
>BL ã
0 =
1 =
>
.main
0100
0500
ã
( 3)
.MAIN
4) Example to occur break by No. of steps (50 steps).
>BPS
50ã
>BL ã
0 = 0100
1 = 0500
S
50
>
( 3)
.MAIN
5) Example to occur break with input command.
>BPI ã
>G ã
RUN
******** MC Step Break ********
0004
00
NOP
PC=00 PA=09 PB=00 A=0 X=0 Y=0
>R
R
00
ã
>G
ã
ST=1
PMR=0
WD=0000
MC=50
WD=0000
MC=125
6) Example to occur break with output command.
ã
>BP0
>G ã
RUN
Rout=1111
D=11111111
OUT=0
MC=125
******** Break AT Port Out !! ********
002F
0D
SO
PC=00 PA=1E PB=00 A=0 X=0 Y=F ST=1 PMR=0
>G
ã
5 - 21
Chapter 5. Software
BC (Break Point Clear)
[Function]
To clear the break point at the specified No.
[Format]
BC_nã
[Explanation]
With this, the system clear the break point at the specified No.
When n is omitted, the state of the currently set break shall be displayed.
When n is `*`, all the break points shall be cleared.
[e.g]
>BL ã
0 = 0100
1 = 0200
2 = 0500
S 50
I
O
>BC 1 ã
>BC S ã
>BC I ã
>BC O ã
>BC ã
0 = 0100
2 = 0500
>BC * ã
>BL ã
>
(
3)
(
3)
5 - 22
Chapter 5. Software
CR (CPU Reset)
[Function]
To set simulator to the initial state.
[Format]
CRã
[Explanation]
When this command is executed, the simulator is set back to the initial state. In
this case, the registers are also initialized according to each CPU. However, MC
is cleared irregardless of the CPU status.
Initial State of each register.
PA, PC, PB, SP and D PORT become 0.
All the ports of R PORT become 1.
The other registers are undefined.
[e.g]
>CR ã
CPU
GMS30140
ROM
1024
Byte
I/O Input [pi]
I/O Output [po]
SYMBOL
[1]
Watch Dog Timer [wd]
PC=00
I/O
>
PA=00
Reg.
RAM 32
= [0]
= [0]
= [0]
= [0]
PB=00
Nibble
Port input I/O register
No Display
Search
off
A=0 X=0 Y=0 ST=0 PMR=0 WD=0000 MC=0
SP=0 SR1=0000 SR2=0000 SR3=0000
Rin=1111 Rout=1111 D=00000000 OUT=0 K=0000(0h)
5 - 23
Chapter 5. Software
DPP (Dump Program memory)
[Function]
To display data in the program memory area specified with <In> from the
specified <address> in hexadecimal.
[Format]
DPP_[<address>_<In>]ã
[Explanation]
When this the system displays data in the program memory area specified with
<In> from the specified <address> in hexadecimal. When [ ] is omitted, 64 bytes
of data from the succeeding address shall be displayed. The address used with
this command is polynomial.
[e.g]
>DPP
0000
0027
001C
0022
>
0
:
:
:
:
20
00 01
10 11
20 21
31 32
ã
02
12
22
33
03
13
23
33
04
14
24
34
05
15
25
35
06
16
26
36
07
17
27
37
-
08
18
28
38
09
19
29
39
0A
1A
2A
3A
0B
1B
2B
3B
0C
1C
2C
3C
0D
1D
2D
3E
0E
1E
2E
3E
0F
1F
2F
3F
DPS (Dump Program memory)
[Function]
To display data in the program memory area specified with <In> from the
specified <address> in hexadecimal.
[Format]
DPS_[<address>_<In>]ã
[Explanation]
When this the system displays data in the program memory area specified with
<In> from the specified <address> in hexadecimal. When [ ] is omitted, 64 bytes
of data from the succeeding address shall be displayed. The address used with
this command is sequential.
[e.g]
>DPS_0_3F ã
0000 : 00 01
0010 : 27 0E
0020 : 1C 38
0030 : 22 04
>
03
1D
31
09
07
3A
23
13
0F
35
06
26
1F
2B
0D
0C
3F
16
1B
19
E3
2C
36
32
-
5 - 24
3D
18
2D
25
3B
30
1A
0A
37
21
34
15
2F
02
29
2A
1E
05
12
14
3C
0B
24
28
39
17
08
10
33
2E
11
20
Chapter 5. Software
DD (Dump Data memory)
[Function]
To display data in the data memory in hexadecimal.
[Format]
DDã
[Explanation]
With this, the system displays all the data in the data memory in hexadecimal.
[e.g]
>DD
000
010
>
ã
:
:
6
1
C
2
6
3
0
4
0
0
0
0
0
0
0
0
-
0
3
0
2
0
1
0
0
0
0
0
1
0
0
0
1
ED (Exchange Data memory)
[Function]
To display and modify the specified data memory.
[Format]
ED_[<address>ã
[Explanation]
When this the system displays and modifies the specified data memory. This
Mode is continuous and processing shall be continued until *.* is pressed. When
`_` is pressed, the system goes back to the address immediately before.
[e.g]
>ED 0 ã
00 : 7
01 : 6
02 : 7
>
>
>
>
3ã
6ã
.ã
5 - 25
Chapter 5. Software
EPP (Exchange Program memory)
[Function]
To display and modify the specified program memory.
[Format]
EPP_<Address> ã
[Explanation]
With this, the system displays and modifies the specified program memory. This
mode is continuous and each time `ã` is pressed, the succeeding address shall
be displayed, setting operation shall be performed continuously until `.` is
pressed. When `_` is pressed, the system goes back to the address immediately
before. The address used with this command is polynomial. It is possible to use
symbols in <address>.
[e.g]
>EPP_100 ã
100 : 0D>37
101 : 77>AF
103 : 42> .
>
ã
ã
ã
EPS (Exchange Program memory)
[Function]
To display and modify the specified data memory.
[Format]
EPS_<Address>ã
[Explanation]
With this, the system displays and modifies the specified program memory. This
Mode is continuous and each time `ã` is pressed, the succeeding address shall
be displayed and setting operation shall be performed continuously until `.` is
pressed. When `_` is pressed, the system goes back to the address immediately
before. The address used with this command is sequential.
It is possible to use symbols in <address>.
[e.g]
>EPS_100 ã
100 : 48>6ã
101 : 04>45ã
102 : 53>.ã
>
5 - 26
Chapter 5. Software
FPP (Fill Program memory)
[Function]
To fill the program memory area specified with <In> from the specified <address>
with 1 byte data.
[Format]
FPP_<Address>_<In>_<Data> ã
[Explanation]
With this, the system fills the program memory area specified with <In> from the
specified <address> with 1 byte data. It is possible to use symbols in <address>.
[e.g]
>FPP
>DPP
0100
0127
011C
0122
>
100 L10 55 ã
100 ã
: 55 55 55 55 55
: 10 11 12 13 14
: 20 21 23 24 25
: 31 32 33 34 35
55
15
26
36
55
16
27
37
55
17
29
38
-
55
18
29
39
55
19
2A
3A
55
1A
2B
3B
55
1B
2C
3C
55
1C
2D
3D
55
1D
2E
3E
55
1E
2F
3F
55
1F
30
40
FPS (Fill Program memory)
[Function]
To fill the program memory area specified with <In> from the specified <address>
with 1 byte data.
[Format]
FPS_<Address>_<In>_<Data>ã
[Explanation]
With this, the system fills the program memory area specified with <In> from the
specified <address> with 1 byte data.
It is possible to use symbols in <address>.
[e.g]
>FPS
>DPS
0100
0110
0120
0130
>
100
100
: 55
: 01
: 01
: 01
L10
ã
55
00
00
00
55
11
11
11
55
ã
55
01
01
35
55
01
01
01
55
20
20
20
55
00
00
00
55
00
00
55
-
55
01
01
01
5 -27
55
00
00
55
55
00
00
00
55
0C
0C
55
55
01
01
55
55
00
00
55
55
55
00
55
55
55
55
55
Chapter 5. Software
FD (Fill Data memory)
[Function]
To fill the program memory area specified with <In> from the specified <address>
with one specified nibble data.
[Format]
FD_<Address>_<In>_<Data> ã
[Explanation]
With this, the system fills the data memory area specified with <In> from the
specified <address> with one specified nibble data. It is possible to use symbols
in <address>.
[e.g]
>FD 0 L3 4 ã
>DD ã
000 : 4 4 4 0
010 : 0 0 0 0
>
0
0
0
0
0
0
0
0
-
5 - 28
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Chapter 5. Software
G (Go)
[Function]
To execute the program in the specified program memory
[Format]
G_[<Address 1>][_<Address 2>]...[_<Address 8>] ã
[Explanation]
With this, the system executes the program address specified with =, [=<address
1>] is omittable. When omitted, the command is executed from the present `PC`
address. The system also sets a break point in the specified address after
[_<address2>] . When `g` command is executed, simulation is started after
outputting `RUN` message. When any key is pressed in this state, simulation is
stopped.
It is possible to use symbols in the <address>.
[e.g]
1) >G
ã
RUN
******** User Break Point !! ********
010E 20
LMAIY
PC=01 PA=1D PB=01 A=7 X=1 Y=8 ST=1
>
2) >G=.START 37 3ã
******** Go Break Point !! ********
0003 BF
BR
3F
PC=00 PA=07 PB=06 A=F X=3 Y=5 ST=1
>
5 - 29
PMR=0
WD=0000
MC=297
PMR=0
WD=0000
MC=808
Chapter 5. Software
H (Hex calculate)
[Function]
To add and subtract hexadecimal No.
[Format]
H_XXXX_XXXX ã
[Explanation]
Hexadecimal Nos. are added or subtracted.
[e.g]
>H_e6ab_b7fc
9ea7
2eaf
>
ã
LOGON (LOGIN)
[Function]
To log the commands executed after this command.
[Format]
LOGONã
[Explanation]
After executing this command, all the information displayed on CRT shall be
written consecutively until LOGOFF command is given. The file created in this
event is ÌLOG.DAT`.
[e.g]
>LOGON
>
ã
5 - 30
Chapter 5. Software
LOGOFF (LOGOUT)
[Function]
To end logging
[Format]
LOGOFFã
[Explanation]
Logging is finished when this command is executed.
[e.g]
>LOGOFFã
>
LP (Load Program from MS-DOS* file)
[Function]
To read `file` on MS-DOS* and write it to the program memory of the simulator
[Format]
LP_<file name>ã
[Explanation]
The system reads the file specified with <file name. RHX> and writes the data to
the address specified with <address>.
The file format is the Intel hexa format.
[e.g]
>LP TEST. RHX ã
. . . . . . . . . . . . . . . . . . . . . . . . . .
. . . .
Program load OK!
>
5 - 31
Chapter 5. Software
MPP (Move Program memory)
[Function]
To transfer memory area data to other area.
[Format]
MPP_<address_s>_<In>_<address_d>ã
[Explanation]
With this command, the system transfers data upto the No. of words specified
with <In> from the address specified with <address_s> to the area specified with
<address_d>.
The address used with this command is polynomial.
[e.g]
>MPP
>
100
200
300ã
MPS (Move Program memory)
[Function]
To transfer memory area data to other area.
[Format]
MPS_<address_s>_<In>_<address_d>ã
[Explanation]
With this command, the system transfers data upto the No. of words specified
with <In> from the address specified with <address_s> to the area specified with
<address_d>.
The address used with this command is sequential.
[e.g]
>MPS
>
100
200
300ã
5 - 32
Chapter 5. Software
P (Port Set)
[Function]
To display and modify the specified I/O set registers.
[Format]
P_aa_bb_cã (When setting R, D port)
aa
: I/O set register name
bb
: Specify in or out
c
: Set value (0 or 1)
P_aa_cc ã / P_aa_cã (when setting K)
aa
: I/O set register name
bb
: set value (one digit of a hexadecimal No.)
c
: Set value (0 or 1)
[Explanation]
The system sets the value in the specified I/O set register.
[e.g]
1) Example of setting K
> P
K
8 ã
> Pã
I/O Regs. Rin=0000 Rout=1111
>
2) Example of K0-K3 setting
> P
OUT 1ã
> P
K1
1ã
> P ã
I/O Regs. Rin=0000 Rout=1111
>
D=00000000
OUT=0
K=1000(8h)
D=00000000
OUT=1
K=0010(2h)
(I/O setting registers used on this simulator)
• Dout (D port output register 6 or 8 or 10bit)
•K
(K input register 4bit)
• Rout (R port output register 4bit)
• Rin (R port input register 4bit)
• OUT (OUT port output register 10bit(
5 - 33
Chapter 5. Software
Q (Quit)
[Function]
To return to PC-DOS
[Format]
Qã
[Explanation]
When this command is executed on the system with prompt (*display) waiting for
a command, the system moves from `simulator` Mode to `MS-DOS*` Mode.
[e.g]
1)Q ã
A>
R (Register dump or change)
[Function]
To display and modify the register data.
[Format]
Rã
R_xã
R_a=xã
[Explanation]
With this, the register data is displayed and modified.
When `Rã` only is executed, all the registers are displayed.
[e.g]
>R ã
PC=00
PA=3E
>R PC=23
>R PC ã
PC=23
>R MC =0
>R MC ã
MC=0
>
PB=00
A=0 X=0 Y=1 ST=1 PMR=0 WD=0000
SP=0 SR0=0000 SR1=0000 SR2=0000
ã
ã
5 - 34
MC=10392
Chapter 5. Software
(Registers used on this simulator)
Simulator setting registers
• MC (Machine cycle register 32bit)
GMS300 series
• PC (Program counter 6bit)
• PA (Page address register 4bit)
• PB (Page buffer register 4bit)
• A (Acc register 4bit)
• X (X register 2bit)
• Y (Y register 4bit)
• SP (Stack pointer register 2bit)
• SR (Stack register 10bit)
Ø3
• ST (Status register 1bit)
• PMR (Pulse mode register 4bit)
• WD (Watch dog timer register 14bit)
5 - 35
Chapter 5. Software
SET (SETUP)
[Function]
To setup the operating mode for the simulator.
[Format]
SET_c_xã
[Explanation]
This is used to setup the simulator.
The following commands can be executed with this command.
• When setting symbols for Assembler and Unassembler.
SET L x ã
Here, the range of X is defined as in the below.
0 : Symbol shall be used. (Default)
1 : Symbol shall not be used.
• SET PO x ã
0 : When I/O WRITE command is executed while executing G command, no
display shall be mode. (Default)
1 : When I/O WRITE command is executed while executing G command, the
values in the event shall be displayed on CRT screen.
2 : When I/O WRITE command is executed while executing G command, the
values in the event shall be displayed on CRT screen and the operating
shall be stopped.
• SET PI x ã
0 : In case I/O READ command is to be executed while simulating, the
system reads the value set on the port input register. The port input
register setting is to be performed with `R` command.
1 : In case I/O READ command is to be executed while simulating, the
system stops before the execution.
In this case, set the value on the port input register.
2 : Value is set on the port input register from I/O file (PORT.DAT).
The file is opened when this command is executed and the file shall not be
reread. If there is no I/O file, error shall be issued.
5 - 36
Chapter 5. Software
Timing for setting port input register is :
a) When machine cycle of the file <current machine cycle after executing this
command, values shall be set on the port input register until the machine cycle
of the file> current machine cycle while executing the first G or T command.
b) When machine cycle of the file = current machine cycle, setting is made
immediately before the next command is executed.
In case there is a format error in I/O file while simulating, error message shall be
output and the operation is stopped.
In order to execute G or T command again, this mode has to be canceled first.
(Execute SET PI 0 or SET PI 1.)
Default value here is 0.
All the I/O READ commands are read from the port input register.
PORT.DAT format
Machine cycle I Port Name I Data ã
(I indicates space or tab)
• SET WD x ã
0 : Watch dog timer shall not be used.
1 : Watch dog timer shall be used. (No option)
Resetting watch dog timer
1) After executing WDTR command
2) After executing STOP command
3) After executing CR command
4) While converting to 0 with R command
5) When the set value is reached.
2 : Watch dog timer shall be used. (With option)
For resetting watch dog timer.
1) When SO command is executed to REMOUT output is added to the
above 1) ~ 5).
Defalut value here is 0.
5 - 37
Chapter 5. Software
[e.g]
1) Example of setting port input I/O file and measure in case of file format error.
>SET
>SET
>SET
PO
PI
ã
1
2
ã
ã
CPU
GMS30140
ROM
1024
Byte
RAM
32
Nibble
I/O Input [pi]
= [2] Port Input file (PORT.DAT)
I/O Output [po]
= [1] Display
Symbol
[1]
= [0] Search
Watch Dog timer [wd] = [0] off
>G ã
RUN
******** `PORTIN.DAT` File format error ********
0001
07
DA
PC=0 PA=01 PB=00 A=0 X=0 Y=0 ST=1 PMR=0 WD=0000
In this case, execute SET PI 0 or SET PI 1 and cancel the Mode.
Then you can execute the command again.
>SET PI 1
>G ã
RUN
ã
2) Example of setting watch dog timer
>SET WD 1
>SET ã
ã
CPU
GMS30140
ROM
1024
Byte
I/O Input [pi]
I/O Output [po]
Symbol
[1]
Watch Dog timer [wd]
>
=
=
=
=
[0]
[0]
[0]
[1]
RAM
32
Nibble
Port Input I/O register
No Display
Search
ON (no option)
5 - 38
MC=235
Chapter 5. Software
SL (Symbol file Load)
[Function]
To load the symbol table from the specified symbol file.
[Format]
SL_<file name>ã
[Explanation]
The system reads the symbol table from the specified symbol file.
When symbols are used with `U` or `A` or other commands on this system, this
command should be executed first prior to the execution of those commands.
When executing this command, the symbol table in the memory shall be cleared.
Data not in the set format shall not be loaded.
File format : Address_symbol_I ã
(_indicates space or tab. Space or tab after the symbol is valid but those coming
later shall be ignored.)
Address should be polynomial here.
[e.g]
>SL_TEST. CRF ã
. . . . . . . . . . . . . . . . . . . . . . . . . .
Symbol load OK!
>
5 - 39
Chapter 5. Software
ST (Status)
[Function]
To display the internal set condition of the simulator.
[Format]
STã
[Explanation]
The status of the simulator shall be displayed.
[e.g]
>ST ã
CPU
GMS30140
ROM
1024
Byte
RAM
32
Nibble
I/O Input [pi]
= [0] Port input I/O register
I/O Output [po]
= [0] No Display
Symbol
[1]
= [0] Search
Watch Dog timer [WD]
= [0] OFF
PC=00 PA=00 PB=00 A=0 X=0 Y=0 ST=0 PMR=0 WD=000 MC=0
SP=0 SR0=0000 SR1=0000 SR2=0000
I/O Reg. Rin=1111 Rout=1111 D=00000000 OUT=0 K=0000(0h)
>
5 - 40
Chapter 5. Software
T (Trace)
[Function]
To execute the program in the specified program memory address in a single
step.
[Format]
T_[=<address>] [_<step>]ã
[Explanation]
With this, the system executes the program in the specified program memory
address by a single step.
This command shall be valid until `.` key is pressed. That is, every time `ã` key
is pressed after executing this command, the command is executed by one step.
The No. of steps set here is in hexadecimal.
[e.g]
>T =F00 2ã
COUNT = 0000
0F00
1B
PC=0F PA=01 PB=0D
COUNT = 0001
0F01
87
PC=0D PA=07 PB=0D
. ã
>
LPBI
0D
A=0
X=0
Y=0
ST=1
PMR=0
WD=0001
MC=0
A=0
X=0
BR
Y=0
ST=1
PMR=0
07
WD=0002
MC=2
5 - 41
Chapter 5. Software
TMT (Time calculate)
[Function]
To calculate time from No. of machine cycles and clock frequency.
[Format]
TMT_m_cã
m : No. of machine cycles
Without any calculating factors.
c : Clock frequency (1K -10m)
Calculating factors must always be input in small letters.
k (kilohertz)
m (megahertz)
[Explanation]
With this, the system calculates time from No. of machine cycles and clock
frequency. Range of obtainable time :
6ns - 7158h
16m
43s
770ms
(nano second) (hour) (minute) (second) (millisecond)
Calculating equation : machine cycle
Ø (1/clock frequency Ø 6)
[e.g]
>TMT_1000_1m ã
6ms
0m
0ns
>
5 - 42
Chapter 5. Software
TMC (Time calculate)
[Function]
To calculate No. of machine cycles from time and clock frequency.
[Format]
TMC_t_cã
t : Time
Calculating factors must always be input in small letters.
h (hour)
m (minute)
s (second)
ms (millisecond)
us (microsecond)
ns (nano second)
c : Clock frequency (1K -10m)
Calculating factor must always be input in small letters.
k (kilohertz)
m (megahertz)
[Explanation]
With this, the system calculates No. of machine cycles and clock from time and
clock frequency. Range of obtainable machine cycle :
1-14984999833500
Calculating equation : Time (1/clock frequency 6)
ø
[e.g]
>TMC 6ms
MC=1000
>
Ø
1mã
5 - 43
Chapter 5. Software
U (Unassemble)
[Function]
To unassemble the area specified with <In> from the specified <address> and to
display in mnemonic.
[Format]
U_[<address>] [_<In>]ã
[Explanation]
With this, the system unassembles the area specified with <In> from the
specified <address> and displays in mnemonic.
When [<address>] [<In>] are omitted, unassembling is performed from the
address immediately after the display start address.
Default value for <In> is 16.
However, [<address>] cannot be omitted separately.
[e.g]
>U 200
0200
0201
0203
0207
>
L4 ã
40
21
77
AF
LYI
LAM
ALEI
BR
00
0E
2F
WP (Write Program to MS-DOS* file)
[Function]
To read data from the whole ROM area and write data in the file specified with
<file name>.
[Format]
WP_<file name>ã
[Explanation]
With this, the system reads data from the whole ROM area and writes data in the
file specified with <file name>.
The file format is the same as the Intel hexa.
[e.g]
>WP_test. rhx ã
. . . . . . . . . . . . .. . . . . . . . . .
Program write
5 - 44
Chapter 5. Software
? (help)
[Function]
To display the list of commands of this simulator.
[Format]
?ã
[Explanation]
With this, the system displays the list of commands of this simulator.
[e.g]
>?ã
GSEN-GMS30K Simulator Processor is GMS30K Series Version 1.0
A[<address>] - assemble
BAT <filename> - command repeat
BC [bc] - breakpoint clear
BL -list breakpoint(s)
BP [bp] <address> - set breakpoint
[S] <step> - set step breakpoint
CR - CPU reset
DD - dump data memory
DPP [<range>] - dump program memory
DPS [<range>] - dump program memory
ED [<address>]-exchange data memory
EPP[<address>]-exchange program memory
EPS[<address>]-exchange program memory
FD <range> <h> - fill program memory
FPP <range> <hh> - fill program memory
FPS <range> <hh> - fill program memory
G [=<address> [<address>..]] - go
H <value> <value> - hexa add, hexa sub
LOGON - command logging start
LOGOFF - command logging end
LP <filename>-load program from PC-DOS
MPP <range> <address> - move
MPS <range> <address> - move
P <address> - port input/output
Q - quit
R [<reg>] [[=] <value>] - register
SET <value> <range> - simulator setup
SL - <filename> - symbol file load
ST - simulator status dump
TMT <mc> <clock rate> - machine time
TMC <time> <clock rate> - step
T [=<address>] [<value>] - trace
U [<range>] - unassemble
WP <filename> - write program
? - help dump
^A - command recall
![DOS command] - shell escape
DPP, EPP, FPP, MPP=polynomial address DPS, EPS, FPS, MPS=sequential address
5 - 45
Chapter 5. Software
[CTRL]-[A] - command recall
[Explanation]
Repeat the previous command to execute in command prompt>. memorize up to
maximum 16 previous commands. That is to say, the previous commands are
displayed as many times as [CTRL]-[A] key is pressed.
! [Dos command] - dos shell
[Explanation]
Make it possible to execute the dos command within the simulator environment.
[e.g]
>! dir
- - - directory listing
>
- - -
5 - 46
Chapter 5. Software
File types used in the simulator:
1) Load Module file
2) Input port File (Pseudo Data)
3) BATCH File
4) Log File
Load Module File (RHX File)
Execution File for executing on the simulator.
File format is Intel hexa. format
Input port file (Pseudo data)
When Command concerning to input port is fetched while executing on the
simulator, if File Mode has been specified with SET command, data defined in
this file shall be read as input data.
(File Name : PORT.DAT)
BATCH File
Each command of the simulator described in 3. shall be consecutively executed
according to the order defined in this file.
Log FIle
After executing LOGON command, data displayed on CRT screen shall be
written to this file until LOGOFF command is executed.
The file created in this event is the log file.
(File Name : LOG.DAT)
5 - 47
Chapter 5. Software
7. Error Message and Troubleshooting
- CRF Error Occurred !
: In the process of reading Intel Hexa file, it occurs when error happens,
Re-assemble the source program and make the Hexa file
- Disk Error !
: It occurs when disk drive is not prepard.
- File not found !
: It occurs when the file input by user does not exit in disk. Check the
correct filename.
- Help file not found !
: It occurs when there is no `GMS30K.HLP` file.
- Hexa file format Mismatch !
: It occurs when the file format of*.rhx file is different. Check if it is intel
Hexa format or not.
- Memory not available !
: It occurs when system memory is lack. Execute the simulator after
deleting the memory resident program from system.
- `PORTIN.DAT` File format error!
: It occurs when the format of PORTIN.DAT file is not correct. Check if it is
created correctly according to PORTIN.DAT file structure.
5 - 48
Chapter 5. Software
- PORTIN.DAT` File not found !
: It occurs when there is no PORTIN.DAT file.
- Symbol file format mismatch!
: It occurs when the format of the symbol file(.CRF) to load is not correct.
- Write error!
: It occurs when the disk capacity is lack. Store the empty disk.
- ^???
: It occurs when the commands is input incorrectly in command window.
Check if it is the command provided from the simulator.
- ???^
: It occurs when the command is input correctly in command window, but
input format of paramater value is not mismatch. Check the parameter
format the corresponding command requests.
- ???
: It is displayed when the errors except for ^??? and ???^ happen in
command window.
5 - 49
INTRODUCTION
1
ARCHITECTURE
2
INSTRUCTION
3
EVALUATION BOARD
4
SOFTWARE
5
APPENDIX
6
Product Change note
Device
Subject
Magic-
Production Drop
ë
Magic-ëa
Magic-ëb
Magic-ëc
M3004 + SAA3010
uPD6122-001
uPD6122-002
é
Appendix A Magic-
Appendix A Magic-
é
Software Spec Sheet
• Product
4 bit 1 chip microcomputer
• Type
Magic-
• Purpose
Infrared remote control encoder
• Function
8
• Features
• Program memory (On-chip ROM) : 1024 bytes
é
Ø4 key matrix scan
Ø 4 bits
• Data memory (On-chip RAM) : 32
• 43 types of instruction sets
• 3 levels of subroutine nesting
• 1 bit output port for a large current (Output signal)
• Operating frequency : 300KHz to 1MHz
¶ (fosc=455KHz)
• Instruction cycle : 13.1868
• CMOS process (Single 3V power supply)
• Stand-by function (Through internal instruction)
• Released stand-by mode by key input (Masked option)
• Built in capacitor for ceramic oscillation circuit (Masked option)
• Built in a watch dog timer (WDT)
• 3 kind of double action key for uPD6121G
• Provided with indicator for transmission
A-1
é
Appendix A Magic-
1. Function
1) Stand-by
Output of D0~D3 is ÌLÌ
Oscillation is stop
Output of D4~D5 are held to ÌHÌ
2) Condition of stand-by mode
After reset
When scan strobe output is over, there is not any key input.
3) Release of stand-by mode
One of the key scan input (K0~K3, R0~R3) is changed to ÌLÌ level.
2. Key Input
1) Key-data mapping table
Input pin
Output pin
K0
K1
K2
K3
R0
R1
R2
R3
D0
1
2
3
4
5
6
7
8
D1
9
10
11
12
13
14
15
16
D2
17
18
19
20
21
22
23
24
D3
25
26
27
28
29
30
31
32
2) Double action key
Combi of Key
Key Data
K21 + K22
35h
K21 + K23
36h
K21 + K24
37h
A-2
é
Appendix A Magic-
3. Output
1) Output waveform for uPD6121G
A single pulse, modulated with 37.917KHz signal at 455KHz
7F
&DUULHU IUHTXHQF\
I
&$5
7F
'XW\ UDWLR
I
26&
77F
7
- Configuration of Flame
1st flame
Custom code
Low
Lead code
Custom code
High
Data code
Data code
C0 C1 C2 C3 C4 C5 C6 C7 C0` C1` C2` C3` C4` C5` C6` C7` D0 D1 D2 D3 D4 D5 D6 D7 D0 D1 D2 D3 D4 D5 D5 D7
Repeat flame
Repeat
code
Tf
A-3
é
Appendix A Magic-
- Lead code
9ms
4.5ms
- Repeat code
0.56ms
9ms
2.25ms
- Bit Description
Bit Ì0Ì
Bit Ì1Ì
0.56ms
0.56ms
1.125ms
2.25ms
- Flame Interval : Tf
The transmitted waveform as long as a key is depressed
Tf
Tf
Tf = 108ms @455KHz
A-4
é
Appendix A Magic-
2) Output waveform for MV500
A single pulse at 455KHz
- Bit Description
¶
¶
¶
26.37
26.37
Bit Ì1Ì
26.37
Bit Ì0Ì
¶
SYNC
Bit
¶
8004.4
¶
12,000
24,000
- Configuration of Flame
SYNC
D4
D3
D2
D1
D0
SYNC
- Flame Interval : Tf
The transmitted waveform as long as a key is depressed
SYNC
0
1
1
0
1
SYNC
0
Start
SYNC
Pulse
1
1
1
0
1
SYNC
End
SYNC
Pulse
A-5
é
Appendix A Magic-
4. Pin Description
Pin No.
Pin
Funcrion
1
K0
Key Input No. 0 pin
2
K1
Key Input No. 1 pin
3
K2
Key Input No. 2 pin
4
K3
Key Input No. 3 pin
5
D0
Key Scan Signal No. 0 pin
6
D1
Key Scan Signal No. 1 pin
7
D2
Key Scan Signal No. 2 pin
8
D3
Key Scan Signal No. 3 pin
9
D4
Custom code Low input pin
10
D5
Custom code High input pin
11
REMOUT
Out of Transmission pin
12
OSC2
Connect Ceramic Resonator between
OSC1 & OSC2
13
OSC1
Connect Ceramic Resonator between
OSC1 & OSC2
14
VDD
Connect 3V power source
15
RESET
Reset by input of ÌLÌ
16
GND
Reference voltage for all inputs & outputs 0V
17
R0
Key Input No. 4 pin
18
R1
Key Input No. 5 pin
19
R2
Key Input No. 6 pin
20
R3
Key Input No. 7 pin
A-6
Remark
é
Appendix A Magic-
5. Circuit Diagram & Key Data
1) NEC 16bit for uPD6121G
M3004C
C0`
C0
C1
89F6
C2`
C2
$
$
51AF
C3`
C3
%
%
42FD
C4`
C4
&
&
8117
C5`
C5
'
'
E09F
C6`
C6
(
(
00FF
C7`
C7
)
)
&XVWRP /RZ %\WH
&XVWRP +LJK %\WH
Ì+LJKÌ
A-7
26&
.
26&
.
.
5
5
5
5(0
287
é
C1`
.
0$*,&
25FA
5
'
'
'
'
'
9GG
5(6(7
*1'
'
Ì/RZÌ
é
Appendix A Magic-
2) MV500
$
%
%
&
&
'
'
(
(
)
)
,1'/('
Ì+LJKÌ
A-8
26&
.
26&
.
.
5
5
5
5(0
287
é
.
0$*,&
$
5
'
'
'
'
'
9GG
5(6(7
*1'
'
Ì/RZÌ
é
Appendix A Magic-
3) NEC 8bit for uPD6121G
C1
C2
$
$
C3
%
%
C4
&
&
C5
'
'
C6
(
(
C7
)
)
&XVWRP /RZ %\WH
Ì+LJKÌ
A-9
.
26&
.
26&
.
.
5
5
5
5(0
287
é
0$*,&
C0
5
'
'
'
'
'
9GG
5(6(7
*1'
'
Ì/RZÌ
é
Appendix B Magic- a
Appendix B Magic-
éa
Software Spec Sheet
• Product
4 bit 1 chip microcomputer
• Type
Magic-
• Purpose
Infrared remote control encoder
• Function
8
• Features
• Program memory (On-chip ROM) : 512 bytes
éa
Ø4 key matrix scan
Ø 4 bits
• Data memory (On-chip RAM) : 32
• 43 types of instruction sets
• 3 levels of subroutine nesting
• 1 bit output port for a large current (Output signal)
• Operating frequency : 300KHz to 1MHz
¶ (fosc=455KHz)
• Instruction cycle : 13.1868
• CMOS process (Single 3V power supply)
• Stand-by function (Through internal instruction)
• Released stand-by mode by key input (Masked option)
• Built in capacitor for ceramic oscillation circuit (Masked option)
• Built in a watch dog timer (WDT)
• 3 kind of double action key
B-1
é
Appendix B Magic- a
1. Function
1) Stand-by
Oscillation is stop
Output of D0~D3 is ÌLÌ, output of D4,D5 is ÌHÌ
2) Condition of stand-by mode
After reset
When scan strobe output is over, there is not any key input.
3) Release of stand-by mode
One of the key scan input (K0~K3, R0~R3) is change to ÌLÌ level
2. Key Input
1) Key-data mapping table
Input pin
Output pin
K0
K1
K2
K3
R0
R1
R2
R3
D0
1
2
3
4
5
6
7
8
D1
9
10
11
12
13
14
15
16
D2
17
18
19
20
21
22
23
24
D3
25
26
27
28
29
30
31
32
2) Double action key
Combi of Key
Key Data
K21 + K22
35h
K21 + K23
36h
K21 + K24
37h
B-2
é
Appendix B Magic- a
3. Output
Output waveform for LC7461M-C13
A single pulse, modulated with 37.917KHz signal at 455KHz
7F
&DUULHU IUHTXHQF\
I
&$5
7F
'XW\ UDWLR
I
26&
77F
7
- Configuration of Flame
1st flame
Lead
Code
Custom Code
C0
~
Custom Code
C12 C0
~
Data Code
C12 D0
~
Data Code
D7 D0
C2
Repeat flame
Repeat
code
Tf
- Lead code
9ms
4.5ms
B-3
D7
é
Appendix B Magic- a
- Repeat code
0.56ms
9ms
4.5ms
- Bit Description
Bit Ì0Ì
Bit Ì1Ì
0.56ms
0.56ms
1.125ms
2.25ms
- Flame Interval : Tf
The transmitted waveform as long as a key is depressed
Tf
Tf
Tf = 108ms @455KHz
- Double Key Operation
Key 21
(L : Key-ON state)
Key 22
Key 23
Key 21
Data
transmit
Key 21, 22
Multi-press
Data
transmit
Key 22
Data
transmit
B-4
Transmit
stop
Key 23
Data
transmit
Key 21, 23
Multi-press
Data
transmit
é
Appendix B Magic- a
4. Pin Description
Pin No.
Pin
Funcrion
1
K0
Key Input No. 0 pin
2
K1
Key Input No. 1 pin
3
K2
Key Input No. 2 pin
4
K3
Key Input No. 3 pin
5
D0
Key Scan Signal No. 0 pin
6
D1
Key Scan Signal No. 1 pin
7
D2
Key Scan Signal No. 2 pin
8
D3
Key Scan Signal No. 3 pin
9
D4
Custom code input pin
10
D5
Custom code input pin
11
REMOUT
Out of Transmission pin
12
OSC2
Connect Ceramic Resonator between
OSC1 & OSC2
13
OSC1
Connect Ceramic Resonator between
OSC1 & OSC2
14
VDD
Connect 3V power source
15
RESET
Reset by input of ÌLÌ
16
GND
Reference voltage for all inputs & outputs 0V
17
R0
Key Input No. 4 pin
18
R1
Key Input No. 5 pin
19
R2
Key Input No. 6 pin
20
R3
Key Input No. 7 pin
B-5
Remark
é
Appendix B Magic- a
5. Circuit Diagram & Key Data
C7
D6
C6
$
$
D7
C5
%
%
C4
C12
&
&
C3
C11
'
'
C2
C10
(
(
C1
C9
)
)
B-6
.
26&
.
26&
.
.
5
5
5
5(0
287
5
'
'
'
'
'
'
D
é
C8
0$*,&
C0
9GG
5(6(7
*1'
ê
Appendix C Magic-
Appendix C Magic-
ê
Software Spec Sheet
• Product
4 bit 1 chip microcomputer
• Type
Magic-
• Purpose
Infrared remote control encoder
• Function
8
• Features
• Program memory (On-chip ROM) : 1024 bytes
ê
Ø4 key matrix scan
Ø 4 bits
• Data memory (On-chip RAM) : 32
• 43 types of instruction sets
• 3 levels of subroutine nesting
• 1 bit output port for a large current (Output signal)
• Operating frequency : 300KHz to 1MHz
¶ (fosc=455KHz)
• Instruction cycle : 13.1868
• CMOS process (Single 3V power supply)
• Stand-by function (Through internal instruction)
• Released stand-by mode by key input (Masked option)
• Built in capacitor for ceramic oscillation circuit (Masked option)
• Built in a watch dog timer (WDT)
• Double action key is not supported
C-1
ê
Appendix C Magic-
1. Function
1) Stand-by
Output of D0~D3 is ÌLÌ
Oscillation is stop
Output of D4~D5 are held to ÌHÌ
2) Condition of stand-by mode
After reset
When scan strobe output is over, there is not any key input.
3) Release of stand-by mode
One of the key scan input (K0~K3, R0~R3) is change to ÌLÌ level
C-2
ê
Appendix C Magic-
2. Output
1) Output waveform for TC9012F
A single pulse, modulated with 37.917KHz signal at 455KHz
7F
&DUULHU IUHTXHQF\
I
&$5
7F
'XW\ UDWLR
I
26&
77F
7
- Configuration of Flame
1st flame
Lead code
Custom code
Custom code
Data code
Data code
C0 C1 C2 C3 C4 C5 C6 C7 C0 C1 C2 C3 C4 C5 C6 C7 D0 D1 D2 D3 D4 D5 D6 D7 D0 D1 D2 D3 D4 D5 D5 D7
- Repeat flame
C0=0
Repeat
code
Tf
C0=1
Repeat
code
Tf
C-3
ê
Appendix C Magic-
- Lead code
4.5ms
4.5ms
- Repeat code
0.56ms
C0=0
4.5ms
2.25ms
4.5ms
0.56ms
C0=1
4.5ms
4.5ms
1.125ms
- Bit Description
Bit Ì0Ì
Bit Ì1Ì
0.56ms
0.56ms
1.125ms
2.25ms
- Flame Interval : Tf
The transmitted waveform as long as a key is depressed
Tf
Tf
Tf=108ms @455KHz
C-4
ê
Appendix C Magic-
2) Output waveform for uPD1986C
A single pulse, modulated with 37.917KHz signal at 455KHz
7F
&DUULHU IUHTXHQF\
I
&$5
7F
'XW\ UDWLR
I
26&
77F
7
- Bit Description
Bit Ì0Ì
Bit Ì1Ì
1.121ms @455KHz
1.594ms @320KHz
1.121ms @455KHz
1.594ms @320KHz
- Configuration of Flame (Except 18~1Bh Key)
Head
Code
Data Code(ex ; 1Eh)
D0 D1 D2 D3 D4
36ms
@455KHz
51.187ms @320KHz
- Flame Interval :,Tf
The transmitted waveform as long as a key is depressed. (18~1Bh Key only)
C-5
ê
Appendix C Magic-
3) Output waveform for M50560-001P
A single pulse, modulated with 37.917KHz signal at 455KHz
7F
&DUULHU IUHTXHQF\
I
&$5
7F
'XW\ UDWLR
I
26&
77F
7
- Configuration of Flame
Low
Custom Code
Lead Pulse
Separation
Period
C0 C1 C2 C3 C4 C5 C6 C7
8ms
4ms
Data Code
D0 D1 D2 D3 D4 D5 D6 D7
4ms
- Bit Description
Bit Ì0Ì
Bit Ì1Ì
0.5ms
0.5ms
1.0ms
2.0ms
- Flame Interval :,Tf
The transmitted waveform as long as a key is depressed.
Tf=60ms
60ms
C-6
ê
Appendix C Magic-
3. Pin Description
Pin No.
Pin
Funcrion
1
K0
Key Input No. 0 pin
2
K1
Key Input No. 1 pin
3
K2
Key Input No. 2 pin
4
K3
Key Input No. 3 pin
5
D0
Key Scan Signal No. 0 pin
6
D1
Key Scan Signal No. 1 pin
7
D2
Key Scan Signal No. 2 pin
8
D3
Key Scan Signal No. 3 pin
9
D4
Custom code input pin
10
D5
Key Scan Signal No. 4 pin
11
REMOUT
Out of Transmission pin
12
OSC2
Connect Ceramic Resonator between
OSC1 & OSC2
13
OSC1
Connect Ceramic Resonator between
OSC1 & OSC2
14
VDD
Connect 3V power source
15
RESET
Reset by input of ÌLÌ
16
GND
Reference voltage for all inputs & outputs 0V
17
R0
Key Input No. 4 pin
18
R1
Key Input No. 5 pin
19
R2
Key Input No. 6 pin
20
R3
Key Input No. 7 pin
C-7
Remark
ê
Appendix C Magic-
4. Circuit Diagram & Key Data
Mitsubish for M50560-001P
C1
C2
$
$
$
C3
%
%
%
C4
&
&
&
D5
'
'
'
D6
(
(
(
D7
)
)
)
&XVWRP VHOHFW GLRGH
'DWD VHOHFW GLRGH
Ì+LJKÌ
.
26&
.
26&
.
.
5
5
5
5(0
287
ê
0$*,&
C0
5
'
'
'
'
'
9GG
5(6(7
*1'
'
Ì/RZÌ
* Extended key data is changed by D5~D7 data selection diode.
This example shows the extended key data when D5~D7 is open.
C-8
ê
Appendix C Magic-
Toshiba for TC9012
C1
C2
$
$
C3
%
%
C4
&
&
C5
'
'
C6
(
(
C7
)
)
.
.
26&
.
.
5
5
5
5(0
287
5
'
'
'
'
'
9GG
5(6(7
*1'
'
Ì+LJKÌ
C-9
26&
ê
0$*,&
C0
Ì/RZÌ
ê
Appendix C Magic-
NEC for uPD1986C
$
$
%
%
&
&
'
'
(
(
)
)
.
26&
.
26&
.
.
5
5
5
'
'
'
5
'
5(0
287
ê
0$*,&
'
'
C - 10
9GG
5(6(7
*1'
ê
Appendix D Magic- b
Appendix D Magic-
êb
Software Spec Sheet
• Product
4 bit 1 chip microcomputer
• Type
Magic-
• Purpose
Infrared remote control encoder
• Function
8
• Features
• Program memory (On-chip ROM) : 512 bytes
êb
Ø6 key matrix scan
Ø 4 bits
• Data memory (On-chip RAM) : 32
• 43 types of instruction sets
• 3 levels of subroutine nesting
• 1 bit output port for a large current (Output signal)
• Operating frequency : 300KHz to 1MHz
¶ (fosc=455KHz)
• Instruction cycle : 13.1868
• CMOS process (Single 3V power supply)
• Stand-by function (Through internal instruction)
• Released stand-by mode by key input (Masked option)
• Built in capacitor for ceramic oscillation circuit (Masked option)
• Built in a watch dog timer (WDT)
• Double action key is not supported
D-1
ê
Appendix D Magic- b
1. Function
1) Stand-by
Outputted of D0~D3 is ÌLÌ
Oscillation is stop
Output of D0~D4 is held to ÌHÌ
2) Condition of stand-by mode
After reset
When scan strobe output is over, there is not any key input.
3) Release of stand-by mode
One of the key scan input (K0~K3, R0~R3) is change to ÌLÌ level
D-2
ê
Appendix D Magic- b
2. Output
waveform for M50560-003P
A single pulse, modulated with 37.91KHz signal at 455KHz
7F
&DUULHU IUHTXHQF\
I
&$5
7F
'XW\ UDWLR
I
26&
77F
7
- Configuration of Flame
Low
Custom Code
Lead Pulse
Separation
Period
C0 C1 C2 C3 C4 C5 C6 C7
8ms
4ms
Data Code
D0 D1 D2 D3 D4 D5 D6 D7
4ms
- Bit Description
Bit Ì0Ì
Bit Ì1Ì
0.5ms
0.5ms
1ms
2ms
- Flame Interval :,Tf
The transmitted waveform as long as a key is depressed.
Tf=60ms
60ms
D-3
ê
Appendix D Magic- b
3. Pin Description
Pin No.
Pin
Funcrion
1
K0
Key Input No. 0 pin
2
K1
Key Input No. 1 pin
3
K2
Key Input No. 2 pin
4
K3
Key Input No. 3 pin
5
D0
Key Scan Signal No. 0 pin
6
D1
Key Scan Signal No. 1 pin
7
D2
Key Scan Signal No. 2 pin
8
D3
Key Scan Signal No. 3 pin
9
D4
Custom code input pin
10
D5
Key Scan Signal No. 4 pin
11
REMOUT
Out of Transmission pin
12
OSC2
Connect Ceramic Resonator between
OSC1 & OSC2
13
OSC1
Connect Ceramic Resonator between
OSC1 & OSC2
14
VDD
Connect 3V power source
15
RESET
Reset by input of ÌLÌ
16
GND
Reference voltage for all inputs & outputs 0V
17
R0
Key Input No. 4 pin
18
R1
Key Input No. 5 pin
19
R2
Key Input No. 6 pin
20
R3
Key Input No. 7 pin
D-4
Remark
ê
Appendix D Magic- b
4. Truth Table
Key Data(hex) of Diode Select
(D5 D6 D7)
Key
No.
Key Data(hex) of Diode Select
(D5 D6 D7)
Key
No.
000 100 010 110 001 101 011 111
000 100 010 110 001 101 011 111
1
00
20
40
60
80
A0
C0
E0
25
18
38
58
78
98
B8
D8
F8
2
01
21
41
61
81
A1
C1
E1
26
19
39
59
79
99
B9
D9
F9
3
02
22
42
62
82
A2
C2
E2
27
1A
3A
5A
7A
9A
BA
DA
FA
4
03
23
43
63
83
A3
C3
E3
28
1B
3B
5B
7B
9B
BB
DB
FB
5
04
24
44
64
84
A4
C4
E4
29
1C
3C
5C
7C
9C
BC
DC
FC
6
05
25
45
65
85
A5
C5
E5
30
1D
3D
5D
7D
9D
BD
DD
FD
7
06
26
46
66
86
A6
C6
E6
31
1E
3E
5E
7E
9E
BE
DE
FE
8
07
27
47
67
87
A7
C7
E7
32
1F
3F
5F
7F
9F
BF
DF
FF
9
08
28
48
68
88
A8
C8
E8
33
20
40
50
80
A0
C0
E0
00
10
09
29
49
69
89
A9
C9
E9
34
21
41
51
81
A1
C1
E1
01
11
0A
2A
4A
6A
8A
AA
CA
EA
35
22
42
52
82
A2
C2
E2
02
12
0B
2B
4B
6B
8B
AB
CB
EB
36
23
43
53
83
A3
C3
E3
03
13
0C
2C
4C
6C
8C
AC
CC
EC
37
34
54
74
94
B4
D4
F4
14
14
0D
2D
4D
6D
8D
AD
CD
ED
38
35
55
75
95
B5
D5
F5
15
15
0E
2E
4E
6E
8E
AE
CE
EE
39
36
56
76
96
B6
D6
F6
16
16
0F
2F
4F
6F
8F
AF
CF
EF
40
37
57
77
97
B7
D7
F7
17
17
10
30
50
70
90
B0
D0
F0
41
58
78
98
B8
D8
F8
18
38
18
11
31
51
71
91
B1
D1
F1
42
59
79
9A
B9
D9
F9
19
39
19
12
32
52
72
92
B2
D2
F2
43
5A
7A
9B
BA
DA
FA
1A
3A
20
13
33
53
73
93
B3
D3
F3
44
5B
7B
9C
BB
DB
FB
1B
3B
21
14
34
54
74
94
B4
D4
F4
45
9C
BC
DC
FC
1C
3C
5C
7C
22
15
35
55
75
95
B5
D5
F5
46
9D
BD
DD
FD
1D
3D
5D
7D
23
16
36
56
76
96
B6
D6
F6
47
9E
BE
DE
FE
1E
3E
5E
7E
24
17
37
57
77
97
B7
D7
F7
48
9F
BF
DF
FF
1F
3F
5F
7F
D-5
ê
Appendix D Magic- b
5. Circuit Diagram
Mitsubish for M50560-003P
C1
C2
C3
C4
D5
D6
D7
&XVWRP VHOHFW GLRGH
'DWD VHOHFW GLRGH
Ì+LJKÌ
D-6
.
26&
.
26&
.
.
5
5
5
5(0
287
E
ê
0$*,&
C0
5
'
'
'
'
'
9GG
5(6(7
*1'
'
Ì/RZÌ
ë
Appendix E Magic- a
ëa
Appendix E Magic-
Software Spec Sheet
• Product
4 bit 1 chip microcomputer
• Type
Magic-
• Purpose
Infrared remote control encoder
• Function
8
• Features
• Program memory (On-chip ROM) : 1024 bytes
ëa
Ø8 key matrix scan
Ø 4 bits
• Data memory (On-chip RAM) : 32
• 43 types of instruction sets
• 3 levels of subroutine nesting
• 1 bit output port for a large current (Output signal)
• Operating frequency : 300KHz to 1MHz
¶ (fosc=455KHz)
• Instruction cycle : 13.1868
• CMOS process (Single 3V power supply)
• Stand-by function (Through internal instruction)
• Released stand-by mode by key input (Masked option)
• Built in capacitor for ceramic oscillation circuit (Masked option)
• Built in a watch dog timer (WDT)
• Double action key is not supported
E-1
ë
Appendix E Magic- a
1. Function
1) Stand-by
Oscillation is stop
Output of D0~D5, D8, D9 is ÌLÌ, Output of D6~D7 is ÌHÌ
2) Condition of stand-by mode
After reset
When scan strobe output is over, there is not any key input.
3) Release of stand-by mode
One of the key scan input (K0~K3, R0~R3) is change to ÌLÌ level
E-2
ë
Appendix E Magic- a
2. Output
1) Output waveform of M3004C LAB1 : Only Carrier
A single pulse, modulated with 37.917KHz signal at 455KHz
7F
&DUULHU IUHTXHQF\
I
&$5
7F
'XW\ UDWLR
I
26&
77F
7
- Configuration of Flame
1st flame
Ref Toggle
Bit
Bit
Ref
T
System code
S2
S1
Data code
S0
D5
D4
D3
D2
D1
D0
- Bit Description
Bit Ì0Ì
Bit Ì1Ì
167us
167us
5.06ms
7.59ms
- Flame Interval : Tf
The transmitted waveform as long as a key is depressed
Tf
Tf
Tf = 121.6ms @455KHz
E-3
ë
Appendix E Magic- a
2) Output waveform of RC-5
A single pulse, modulated with 37.917KHz signal at 455KHz
7F
Carrier frequency
fCAR = 1/Tc = fOSC/12
Duty ratio = T1/Tc = 1/3
7
- Configuration of Flame
1st flame
Start
bit
System bit
Enlarged
Toggle
bit
Data bit
MSB
LSB
14bits = 23.446ms
- Bit Description
Bit Ì0Ì
Bit Ì1Ì
¶
¶
839
1674
847.6
¶
1674
¶
- Flame Interval : Tf
The transmitted waveform as long as a key is depressed
23.446ms
107.6ms @455KHz
E-4
ë
Appendix E Magic- a
3. Pin Description
Pin No.
Pin
Funcrion
1
RESET
Reset by input of ÌLÌ
2
GND
Reference voltage for all inputs & outputs 0V
3
R0
Key Input No. 4 pin
4
R1
Key Input No. 5 pin
5
R2
Key Input No. 6 pin
6
R3
Key Input No. 7 pin
7
K0
Key Input No. 0 pin
8
K1
Key Input No. 1 pin
9
K2
Key Input No. 2 pin
10
K3
Key Input No. 3 pin
11
D0
Key Scan Signal No. 0 pin
12
D8
Key Scan Signal No. 1 pin
13
D9
Key Scan Signal No. 2 pin
14
D1
Key Scan Signal No. 3 pin
15
D2
Key Scan Signal No. 4 pin
16
D3
Key Scan Signal No. 5 pin
17
D4
Key Scan Signal No. 6 pin
18
D5
Key Scan Signal No. 7 pin
19
D6
Key Scan Signal No. 8 pin
20
D7
Key Scan Signal No. 9 pin
21
REMOUT
Out of Transmission pin
22
OSC2
Connect Resonator between OSC1 & OSC2
23
OSC1
Connect Resonator between OSC1 & OSC2
24
VDD
Connect 3V power source
E-5
Remark
ë
Appendix E Magic- a
4. Circuit Diagram & Key Data
1) M3004C LAB1
ÌSystem Code : S2 S1 S0Ì
Ì001Ì
Ì010Ì
$
$
$
$
Ì011Ì
%
%
%
%
Ì100Ì
&
&
&
&
Ì101Ì
'
'
'
'
Ì111Ì
(
(
(
(
)
)
)
)
,1'/('
Ì+LJKÌ
E-6
.
26&
.
26&
.
.
5
5
5
5(0
287
D
ë
0$*,&
Ì000Ì
5
'
'
'
'
'
9GG
5(6(7
*1'
'
'
'
'
'
Ì/RZÌ
ë
Appendix E Magic- a
2) Philips for SAA3010
S0
$
$
$
$
S1
%
%
%
%
S2
&
&
&
&
S3
'
'
'
'
S4
(
(
(
(
)
)
)
)
,1'/('
Ì+LJKÌ
E-7
.
26&
.
26&
.
.
5
5
5
5(0
287
D
ë
0$*,&
5
'
'
'
'
'
9GG
5(6(7
*1'
'
'
'
'
'
Ì/RZÌ
ë
Appendix F Magic- b
ë
Appendix F Magic- b
Software Spec Sheet
• Product
4 bit 1 chip microcomputer
• Type
Magic-
• Purpose
Infrared remote control encoder
• Function
8
• Features
• Program memory (On-chip ROM) : 1024 bytes
ëb
Ø8 key matrix scan
Ø 4 bits
• Data memory (On-chip RAM) : 32
• 43 types of instruction sets
• 3 levels of subroutine nesting
• 1 bit output port for a large current (Output signal)
• Operating frequency : 300KHz to 1MHz
¶ (fosc=455KHz)
• Instruction cycle : 13.1868
• CMOS process (Single 3V power supply)
• Stand-by function (Through internal instruction)
• Released stand-by mode by key input (Masked option)
• Built in capacitor for ceramic oscillation circuit (Masked option)
• Built in a watch dog timer (WDT)
• 3 kind of double action key
F- 1
ë
Appendix F Magic- b
1. Function
1) Stand-by
Oscillation is stop
Output of D0~D5, D8, D9 is ÌLÌ, Output of D6~D7 is ÌHÌ
2) Condition of stand-by mode
After reset
When scan strobe output is over, there is not any key input.
3) Release of stand-by mode
One of the key scan input (K0~K3, R0~R3) is change to ÌLÌ level
2. Key Input
1) Key-data mapping table
Input pin
Output pin
K0
K1
K2
K3
R0
R1
R2
R3
D0
1
2
3
4
5
6
7
8
D8
9
10
11
12
13
14
15
16
D9
17
18
19
20
21
22
23
24
D1
25
26
27
28
29
30
31
32
D2
33
34
35
36
37
38
39
40
D3
41
42
43
44
45
46
47
48
D4
49
50
51
52
53
54
55
56
D5
57
58
59
60
61
62
63
64
2) Double action key
Combi of Key
Key Data
K21 + K22
35h
K21 + K23
36h
K21 + K24
37h
F- 2
ë
Appendix F Magic- b
2. Output
Output waveform for uPD6122-001
- Output waveform
A single pulse, modulated with 37.917KHz signal at 455KHz
7F
&DUULHU IUHTXHQF\
I
&$5
7F
'XW\ UDWLR
I
26&
77F
7
- Configuration of Flame
1st flame
Low
Custom code
Lead code
High
Custom code
Data code
Data code
C0 C1 C2 C3 C4 C5 C6 C7 C0 C1 C2 C3 C4 C5 C6 C7 D0 D1 D2 D3 D4 D5 D6 D7 D0 D1 D2 D3 D4 D5 D5 D7
Repeat flame
Repeat
code
Tf
F- 3
ë
Appendix F Magic- b
- Lead code
9ms
4.5ms
- Repeat code
0.56ms
9ms
2.25ms
- Bit Description
Bit Ì0Ì
Bit Ì1Ì
0.56ms
0.56ms
1.125ms
2.25ms
- Flame Interval : Tf
The transmitted waveform as long as a key is depressed
Tf
Tf
Tf = 108ms @455KHz
F- 4
ë
Appendix F Magic- b
3. Pin Description
Pin No.
Pin
Funcrion
1
RESET
Reset by input of ÌLÌ
2
GND
Reference voltage for all inputs & outputs 0V
3
R0
Key Input No. 4 pin
4
R1
Key Input No. 5 pin
5
R2
Key Input No. 6 pin
6
R3
Key Input No. 7 pin
7
K0
Key Input No. 0 pin
8
K1
Key Input No. 1 pin
9
K2
Key Input No. 2 pin
10
K3
Key Input No. 3 pin
11
D0
Key Scan Signal No. 0 pin
12
D8
Key Scan Signal No. 1 pin
13
D9
Key Scan Signal No. 2 pin
14
D1
Key Scan Signal No. 3 pin
15
D2
Key Scan Signal No. 4 pin
16
D3
Key Scan Signal No. 5 pin
17
D4
Key Scan Signal No. 6 pin
18
D5
Key Scan Signal No. 7 pin
19
D6
Key Scan Signal No. 8 pin
20
D7
Key Scan Signal No. 9 pin
21
REMOUT
Out of Transmission pin
22
OSC2
Connect Resonator between OSC1 & OSC2
23
OSC1
Connect Resonator between OSC1 & OSC2
24
VDD
Connect 3V power source
F- 5
Remark
ë
Appendix F Magic- b
4. Circuit Diagram & Key Data
1) NEC 16bit for uPD6122-001
C0`
C0
C2`
C2
$
$
$
$
C3`
C3
%
%
%
%
C4`
C4
&
&
&
&
C5`
C5
'
'
'
'
C6`
C6
(
(
(
(
C7`
C7
)
)
)
)
&XVWRP /RZ %\WH
&XVWRP +LJK %\WH
Ì+LJKÌ
F- 6
.
26&
.
.
5
5
5
5(0
287
E
26&
ë
C1
.
0$*,&
C1`
5
'
'
'
'
'
9GG
5(6(7
*1'
'
'
'
'
'
Ì/RZÌ
ë
Appendix F Magic- b
2) NEC 8bit for uPD6122-001
C0
C1
$
$
C3
%
%
%
%
C4
&
&
&
&
C5
'
'
'
'
C6
(
(
(
(
C7
)
)
)
)
Ì+LJKÌ
F- 7
.
26&
.
.
5
5
5
5(0
287
E
$
26&
ë
.
0$*,&
$
&XVWRP /RZ %\WH
,1'/('
C2
5
'
'
'
'
'
9GG
5(6(7
*1'
'
'
'
'
'
Ì/RZÌ
ë
Appendix G Magic- c
Appendix G Magic-
ëc
Software Spec Sheet
• Product
4 bit 1 chip microcomputer
• Type
Magic-
• Purpose
Infrared remote control encoder
• Function
8
• Features
• Program memory (On-chip ROM) : 1024 bytes
ëc
Ø8 key matrix scan
Ø 4 bits
• Data memory (On-chip RAM) : 32
• 43 types of instruction sets
• 3 levels of subroutine nesting
• 1 bit output port for a large current (Output signal)
• Operating frequency : 300KHz to 1MHz
¶ (fosc=455KHz)
• Instruction cycle : 13.1868
• CMOS process (Single 3V power supply)
• Stand-by function (Through internal instruction)
• Released stand-by mode by key input (Masked option)
• Built in capacitor for ceramic oscillation circuit (Masked option)
• Built in a watch dog timer (WDT)
• 3 kind of double action key
G-1
ë
Appendix G Magic- c
1. Function
1) Stand-by
Oscillation is stop
Output of D0~D5, D8, D9 is ÌLÌ, Output of D6~D7 is ÌHÌ
2) Condition of stand-by mode
After reset
When scan strobe output is over, there is not any key input.
3) Release of stand-by mode
One of the key scan input (K0~K3, R0~R3) is change to ÌLÌ level
2. Key Input
1) Key-data mapping table
Input pin
Output pin
K0
K1
K2
K3
R0
R1
R2
R3
D0
1
2
3
4
5
6
7
8
D8
9
10
11
12
13
14
15
16
D9
17
18
19
20
21
22
23
24
D1
25
26
27
28
29
30
31
32
D2
33
34
35
36
37
38
39
40
D3
41
42
43
44
45
46
47
48
D4
49
50
51
52
53
54
55
56
D5
57
58
59
60
61
62
63
64
2) Double action key
Combi of Key
Key Data
K21 + K22
B5h
K21 + K23
B6h
K21 + K24
B7h
G-2
ë
Appendix G Magic- c
2. Output
Output waveform for uPD6122-002
A single pulse, modulated with 37.917KHz signal at 455KHz
7F
&DUULHU IUHTXHQF\
I
&$5
7F
'XW\ UDWLR
I
26&
77F
7
- Configuration of Flame
1st flame
Low
Custom code
Lead code
High
Custom code
Data code
Data code
C0 C1 C2 C3 C4 C5 C6 C7 C0' C1' C2' C3' C4' C5' C6' C7' D0 D1 D2 D3 D4 D5 D6 D7 D0 D1 D2 D3 D4 D5 D5 D7
Repeat flame
Repeat
code
Tf
G-3
ë
Appendix G Magic- c
- Lead code
9ms
4.5ms
- Repeat code
0.56ms
9ms
2.25ms
- Bit Description
Bit Ì0Ì
Bit Ì1Ì
0.56ms
0.56ms
1.125ms
2.25ms
- Flame Interval : Tf
The transmitted waveform as long as a key is depressed
Tf
Tf
Tf = 108ms @455KHz
G-4
ë
Appendix G Magic- c
3. Pin Description
Pin No.
Pin
Funcrion
1
RESET
Reset by input of ÌLÌ
2
GND
Reference voltage for all inputs & outputs 0V
3
R0
Key Input No. 4 pin
4
R1
Key Input No. 5 pin
5
R2
Key Input No. 6 pin
6
R3
Key Input No. 7 pin
7
K0
Key Input No. 0 pin
8
K1
Key Input No. 1 pin
9
K2
Key Input No. 2 pin
10
K3
Key Input No. 3 pin
11
D0
Key Scan Signal No. 0 pin
12
D8
Key Scan Signal No. 1 pin
13
D9
Key Scan Signal No. 2 pin
14
D1
Key Scan Signal No. 3 pin
15
D2
Key Scan Signal No. 4 pin
16
D3
Key Scan Signal No. 5 pin
17
D4
Key Scan Signal No. 6 pin
18
D5
Key Scan Signal No. 7 pin
19
D6
Key Scan Signal No. 8 pin
20
D7
Key Scan Signal No. 9 pin
21
REMOUT
Out of Transmission pin
22
OSC2
Connect Resonator between OSC1 & OSC2
23
OSC1
Connect Resonator between OSC1 & OSC2
24
VDD
Connect 3V power source
G-5
Remark
ë
Appendix G Magic- c
4. Circuit Diagram & Key Data
1) NEC 16bit for uPD6122-002
C0`
C0
'
'
&
&
'
&
&
C2`
C2
'$
'
&$
&
$
$
C3`
C3
'%
'
&%
&
%
%
C4`
C4
'&
'
&&
&
&
&
C5`
C5
''
'
&'
&
'
'
C6`
C6
'(
'
&(
&
(
(
C7`
C7
')
'
&)
&
)
)
&XVWRP /RZ %\WH
&XVWRP +LJK %\WH
Ì+LJKÌ
G-6
.
26&
.
.
5
5
5
5(0
287
F
'
26&
ë
C1
.
0$*,&
C1`
5
'
'
'
'
'
9GG
5(6(7
*1'
'
'
'
'
'
Ì/RZÌ
ë
Appendix G Magic- c
2) NEC 8bit for uPD6122-002
&
C1
'
'
&
&
C2
'$
'
&$
&
$
$
C3
'%
'
&%
&
%
%
C4
'&
'
&&
&
&
&
C5
''
'
&'
&
'
'
C6
'(
'
&(
&
(
(
C7
')
'
&)
&
)
)
&XVWRP /RZ %\WH
,1'/('
Ì+LJKÌ
G-7
.
26&
.
26&
.
.
5
5
5
5(0
287
F
&
ë
'
0$*,&
'
C0
5
'
'
'
'
'
9GG
5(6(7
*1'
'
'
'
'
'
Ì/RZÌ
*06 0$6. 237,21 /,67
&RGH 1DPH 'HYLFH 3DFNDJH
623 PLO
*06 623 PLO
*06 623
',3
*06 623
',3
*06 623
',3
*06 623
',3
',3
3O HDVH HQWHU FKHFN PDUNV DV
,QFOXVLRQ RI 3XOO XS 5HVLVWHU
3RUW
5
5
5
5
< <HV
1 1R
<1
5HOHDVH RI 6WRS PRGH
3RUW
5
5
5
5
.
.
.
.
< <HV
1 1R
<1
6WDWXV RI ' SRUW ZKLOH 6WRS PRGH
3RUW
'
'
'
'
'
'
'
'
DE
D 6WDWH RI
Ì/Ì IRUFLEO\
E 5HPDLQ WKH VWDWH MXVW EHIRUH VWRS LQVWUXFWLRQ
0DUNHW SRUW LV QRW DYDLODEOH IRU *06
5HVHW RI :'7 GXH WR 5(0287 RXWSXW
<1
< <HV
1 1R
,QFOXVLRQ RI FRQGHQVRU IRU 2VFLOODWLRQ
<1
< <HV
1 1R
'DWD
&RPSDQ\ 1DPH
6HFWLRQ 1DPH
6LJQDWXUH