MC74VHC1G08 Single 2-Input AND Gate The MC74VHC1G08 is an advanced high speed CMOS 2−input AND gate fabricated with silicon gate CMOS technology. The internal circuit is composed of multiple stages, including a buffer output which provides high noise immunity and stable output. The MC74VHC1G08 input structure provides protection when voltages up to 7.0 V are applied, regardless of the supply voltage. This allows the MC74VHC1G08 to be used to interface 5.0 V circuits to 3.0 V circuits. http://onsemi.com MARKING DIAGRAMS Features High Speed: tPD = 3.5 ns (Typ) at VCC = 5.0 V Low Power Dissipation: ICC = 1.0 mA (Max) at TA = 25°C Power Down Protection Provided on Inputs 5 SC−88A / SOT−353 / SC−70 DF SUFFIX CASE 419A Balanced Propagation Delays Pin and Function Compatible with Other Standard Logic Families Chip Complexity: FETs = 62 These Devices are Pb−Free and are RoHS Compliant NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable M • • • • • • • • V2 M G G 1 5 V2 M G G TSOP−5 / SOT−23 / SC−59 DT SUFFIX CASE 483 1 V2 = Device Code M = Date Code* G = Pb−Free Package (Note: Microdot may be in either location) *Date Code orientation and/or position may vary depending upon manufacturing location. IN B 1 5 VCC PIN ASSIGNMENT IN A GND 2 1 4 3 OUT Y IN B 2 IN A 3 GND 4 OUT Y 5 VCC Figure 1. Pinout (Top View) FUNCTION TABLE Inputs IN A IN B & OUT Y Figure 2. Logic Symbol Output A B Y L L H H L H L H L L L H ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. © Semiconductor Components Industries, LLC, 2013 February, 2013 − Rev. 20 1 Publication Order Number: MC74VHC1G08/D MC74VHC1G08 MAXIMUM RATINGS Symbol Parameter VCC DC Supply Voltage VIN DC Input Voltage VOUT DC Output Voltage Value Unit *0.5 to )7.0 V −0.5 to +7.0 V *0.5 to VCC )0.5 V IIK DC Input Diode Current −20 mA IOK DC Output Diode Current $20 mA IOUT DC Output Sink Current $12.5 mA ICC DC Supply Current per Supply Pin $25 mA *65 to )150 °C 260 °C )150 °C SC70−5/SC−88A (Note 1) TSOP−5 350 230 °C/W SC70−5/SC−88A TSOP−5 150 200 mW TSTG Storage Temperature Range TL Lead Temperature, 1 mm from Case for 10 Seconds TJ Junction Temperature Under Bias qJA Thermal Resistance PD Power Dissipation in Still Air at 85°C MSL Moisture Sensitivity FR Flammability Rating VESD Level 1 Oxygen Index: 28 to 34 ESD Withstand Voltage ILATCHUP Latchup Performance UL 94 V−0 @ 0.125 in Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) u2000 u200 N/A V Above VCC and Below GND at 125°C (Note 5) $500 mA Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow. 2. Tested to EIA/JESD22−A114−A. 3. Tested to EIA/JESD22−A115−A. 4. Tested to JESD22−C101−A. 5. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Symbol Characteristics Min Max Unit VCC DC Supply Voltage 2.0 5.5 V VIN DC Input Voltage 0.0 5.5 V 0.0 VCC V Operating Temperature Range −55 +125 °C 0 0 100 20 ns/V VCC = 3.3 V ± 0.3 V VCC = 5.0 V ± 0.5 V Time, Years 80 1,032,200 117.8 90 419,300 47.9 100 178,700 20.4 110 79,600 9.4 120 37,000 4.2 130 17,800 2.0 140 8,900 1.0 TJ = 80 ° C Time, Hours FAILURE RATE OF PLASTIC = CERAMIC UNTIL INTERMETALLICS OCCUR TJ = 90 ° C Junction Temperature °C NORMALIZED FAILURE RATE Device Junction Temperature versus Time to 0.1% Bond Failures TJ = 100 ° C Input Rise and Fall Time TJ = 110° C tr , tf DC Output Voltage TJ = 120° C TA TJ = 130 ° C VOUT 1 1 10 100 TIME, YEARS Figure 3. Failure Rate vs. Time Junction Temperature http://onsemi.com 2 1000 MC74VHC1G08 DC ELECTRICAL CHARACTERISTICS Symbol Parameter Test Conditions Min 1.5 2.1 3.15 3.85 VIH Minimum High−Level Input Voltage 2.0 3.0 4.5 5.5 VIL Maximum Low−Level Input Voltage 2.0 3.0 4.5 5.5 VOH Minimum High−Level Output Voltage VIN = VIH or VIL VOL Maximum Low−Level Output Voltage VIN = VIH or VIL TA = 255C VCC (V) Typ TA v 855C Max Min 1.5 2.1 3.15 3.85 0.5 0.9 1.35 1.65 VIN = VIH or VIL IOH = −50 mA 2.0 3.0 4.5 1.9 2.9 4.4 VIN = VIH or VIL IOH = −4 mA IOH = −8 mA 3.0 4.5 2.58 3.94 VIN = VIH or VIL IOL = 50 mA 2.0 3.0 4.5 VIN = VIH or VIL IOL = 4 mA IOL = 8 mA Max 2.0 3.0 4.5 0.0 0.0 0.0 *555C to 1255C Min Max 1.5 2.1 3.15 3.85 0.5 0.9 1.35 1.65 V 0.5 0.9 1.35 1.65 1.9 2.9 4.4 1.9 2.9 4.4 2.48 3.80 2.34 3.66 Unit V V 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 3.0 4.5 0.36 0.36 0.44 0.44 0.52 0.52 V IIN Maximum Input Leakage Current VIN = 5.5 V or GND 0 to 5.5 $0.1 $1.0 $1.0 mA ICC Maximum Quiescent Supply Current VIN = VCC or GND 5.5 1.0 10 40 mA ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ AC ELECTRICAL CHARACTERISTICS Input tr = tf = 3.0 ns TA = 25°C Symbol tPLH, tPHL CIN Parameter Maximum Propagation Delay, Input A or B to Y Min Test Conditions TA ≤ 85°C Typ Max Min Max −55 ≤ TA ≤ 125°C Min Max Unit ns VCC = 3.3 ± 0.3 V CL = 15 pF CL = 50 pF 4.1 5.9 8.8 12.3 10.5 14.0 12.5 16.5 VCC = 5.0 ± 0.5 V CL = 15 pF CL = 50 pF 3.5 4.2 5.9 7.9 7.0 9.0 9.0 11.0 5.5 10 10 10 Maximum Input Capacitance pF Typical @ 25°C, VCC = 5.0 V CPD 11 Power Dissipation Capacitance (Note 6) pF 6. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no−load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC. http://onsemi.com 3 MC74VHC1G08 VCC Input A or B 50% VCC 50% CL* GND tPLH tPHL VOH Output Y OUTPUT INPUT 50% VCC *Includes all probe and jig capacitance. A 1−MHz square input wave is recommended for propagation delay tests. VOL Figure 4. Switching Waveforms Figure 5. Test Circuit DEVICE ORDERING INFORMATION Device Package Shipping† MC74VHC1G08DFT1G NLVVHC1G08DFT1G* MC74VHC1G08DFT2G SC70−5/SC−88A/SOT−353 (Pb−Free) 3000 / Tape & Reel NLVVHC1G08DFT2G* MC74VHC1G08DTT1G SOT23−5/TSOP−5/SC59−5 (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable. http://onsemi.com 4 MC74VHC1G08 PACKAGE DIMENSIONS SC−88A (SC−70−5/SOT−353) CASE 419A−02 ISSUE K A NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 419A−01 OBSOLETE. NEW STANDARD 419A−02. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. G 5 4 −B− S 1 2 DIM A B C D G H J K N S 3 D 5 PL 0.2 (0.008) M B M N J C H K http://onsemi.com 5 INCHES MIN MAX 0.071 0.087 0.045 0.053 0.031 0.043 0.004 0.012 0.026 BSC --0.004 0.004 0.010 0.004 0.012 0.008 REF 0.079 0.087 MILLIMETERS MIN MAX 1.80 2.20 1.15 1.35 0.80 1.10 0.10 0.30 0.65 BSC --0.10 0.10 0.25 0.10 0.30 0.20 REF 2.00 2.20 MC74VHC1G08 PACKAGE DIMENSIONS TSOP−5 CASE 483−02 ISSUE H D 5X NOTE 5 2X 0.10 T 2X 0.20 T NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. 5. OPTIONAL CONSTRUCTION: AN ADDITIONAL TRIMMED LEAD IS ALLOWED IN THIS LOCATION. TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2 FROM BODY. 0.20 C A B M 5 1 4 2 L 3 B S K DETAIL Z G A DIM A B C D G H J K L M S DETAIL Z J C 0.05 SEATING PLANE H T MILLIMETERS MIN MAX 3.00 BSC 1.50 BSC 0.90 1.10 0.25 0.50 0.95 BSC 0.01 0.10 0.10 0.26 0.20 0.60 1.25 1.55 0_ 10 _ 2.50 3.00 SOLDERING FOOTPRINT* 0.95 0.037 1.9 0.074 2.4 0.094 1.0 0.039 0.7 0.028 SCALE 10:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. 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