IDT49FCT3805/A 3.3V CMOS BUFFER/CLOCK DRIVER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS BUFFER/CLOCK DRIVER IDT49FCT3805/A FEATURES: DESCRIPTION: FUNCTIONAL BLOCK DIAGRAM PIN CONFIGURATION • • • • • • • • • • • The FCT3805 is a 3.3 volt, non-inverting clock driver built using advanced dual metal CMOS technology. The device consists of two banks of drivers, each with a 1:5 fanout and its own output enable control. The device has a "heartbeat" monitor for diagnostics and PLL driving. The MON output is identical to all other outputs and complies with the output specifications in this document. The FCT3805 offers low capacitance inputs with hysteresis. The FCT3805 is designed for high speed clock distribution where signal quality and skew are critical. The FCT3805 also allows single point-topoint transmission line driving in applications such as address distribution, where one signal must be distributed to multiple recievers with low skew and high signal quality. For more information on using the FCT3805 with two different input frequencies on bank A and B, please see AN-236. 0.5 MICRON CMOS Technology Guaranteed low skew < 500ps (max.) Very low duty cycle distortion < 1.0ns (max.) Very low CMOS power levels TTL compatible inputs and outputs Inputs can be driven from 3.3V or 5V components Two independent output banks with 3-state control 1:5 fanout per bank "Heartbeat" monitor output VCC = 3.3V ± 0.3V Available in SSOP, SOIC, and QSOP packages OE A 5 IN A 1 20 VCCB OA1 2 19 OB1 OA2 3 18 OB2 OA3 4 17 OB3 GNDA 5 16 GNDB OA4 6 15 OB4 OA5 7 14 OB5 GNDQ 8 13 MON OEA 9 12 OEB INA 10 11 INB OA1 - OA5 5 IN B VCCA OB1 - OB5 OE B M ON SOIC/ SSOP/ QSOP TOP VIEW The IDT logo is a registered trademark of Integrated Device Technology, Inc. COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE SEPTEMBER 2004 1 c 2004 Integrated Device Technology, Inc. DSC-3102/5 IDT49FCT3805/A 3.3V CMOS BUFFER/CLOCK DRIVER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE PIN DESCRIPTION ABSOLUTE MAXIMUM RATINGS(1) Symbol Description Max Unit VTERM(2) VTERM(3) Terminal Voltage with Respect to GND –0.5 to +4.6 V Terminal Voltage with Respect to GND –0.5 to +7 V VTERM(4) Terminal Voltage with Respect to GND –0.5 to VCC+0.5 V TSTG Storage Temperature –65 to +150 °C IOUT DC Output Current –60 to +60 mA Pin Names OEA, OEB Description 3-State Output Enable Inputs (Active LOW) INA, INB Clock Inputs OAn, OBn Clock Outputs MON Monitor Output NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. VCC terminals. 3. Input terminals. 4. Outputs and I/O terminals. FUNCTION TABLE (1) CAPACITANCE (TA = +25 C, f = 1.0MHz) NOTE: 1. H = HIGH L = LOW Z = High-Impedance Inputs O Symbol Parameter(1) Conditions Typ. Max. Unit CIN Input Capacitance VIN = 0V 4.5 6 pF COUT Output Capacitance VOUT = 0V 5.5 8 pF NOTE: 1. This parameter is measured at characterization but not tested. 2 Outputs OEA, OEB INA, INB OAn, OBn MON L L L L L H H H H L Z L H H Z H IDT49FCT3805/A 3.3V CMOS BUFFER/CLOCK DRIVER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified Commercial: TA = 0°C to +70°C, Industrial: TA = -40°C to +85°C, VCC = 3.3V ± 0.3V Symbol VIH Parameter Test Conditions(1) Min. Typ. Max. Unit Input HIGH Level (Input pins) Guaranteed Logic HIGH Level 2 — 5.5 V 2 — VCC + 0.5 –0.5 — 0.8 Input HIGH Level (I/O pins) VIL Input LOW Level (Input and I/O pins) Guaranteed Logic LOW Level IIH Input HIGH Current (Input pins) VCC = Max. VI = 5.5V — — ±1 VI = VCC — — ±1 VCC = Max. VI = GND — — ±1 VI = GND — — ±1 VCC = Max. VO = VCC — — ±1 VO = GND — — ±1 Input HIGH Current (I/O pins) IIL Input LOW Current (Input pins) Input LOW Current (I/O pins) IOZH High Impedence Output Current IOZL (3-State Output Pins) V µA µA VIK Clamp Diode Voltage VCC = Min., IIN = –18mA — –0.7 –1.2 V IODH Output HIGH Current VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V(3) –36 –60 –110 mA IODL Output LOW Current VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V(3) mA VOH Output HIGH Voltage VCC = Min. IOH = –0.1mA VIN = VIH or VIL IOH = –8mA VCC = Min. IOL = 0.1mA — — 0.2 VIN = VIH or VIL IOL = 16mA — 0.2 0.4 IOL = 24mA — 0.3 0.5 — — ±1 µA –60 –135 –240 mA — 150 — mV — 0.1 10 µA VOL Output LOW Voltage IOFF Input Power Off Leakage IOS Short Circuit Current(4) VH Input Hysteresis ICCL Quiescent Power Supply Current ICCH VCC = 0V, VIN = 4.5V VCC = Max., VO = GND(3) — VCC = Max. 50 90 200 VCC–0.2 — — 2.4(5) 3 — VIN = GND or VCC ICCZ NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 3.3V, +25°C ambient. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. This parameter is guaranteed but not tested. 5. VOH = Vcc - 0.6V at rated current. 3 V V IDT49FCT3805/A 3.3V CMOS BUFFER/CLOCK DRIVER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE POWER SUPPLY CHARACTERISTICS Symbol ∆ICC ICCD Test Conditions(1) Parameter Quiescent Power Supply Current VCC = Max. TTL Inputs HIGH VIN = VCC –0.6V(3) Dynamic Power Supply Current(4) VCC = Max. VIN = VCC Outputs Open VIN = GND Min. Typ.(2) Max. Unit — 10 30 µA — 0.035 0.06 mA/MHz — 0.9 1.6 — 0.9 1.6 — 20 33 — 20 33 OEA = OEB = GND Per Output Toggling 50% Duty Cycle IC Total Power Supply Current(6) VCC = Max. VIN = VCC Outputs Open VIN = GND fO = 25MHz 50% Duty Cycle VIN = VCC –0.6V OEA = OEB = VCC VIN = GND Mon. Output Toggling VCC = Max. VIN = VCC Outputs Open VIN = GND (5) fO = 50MHz 50% Duty Cycle VIN = VCC –0.6V OEA = OEB = GND VIN = GND Eleven Outputs Toggling NOTES: 1. 2. 3. 4. 5. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. Typical values are at VCC = 3.3V, +25°C ambient. Per TTL driven input (VIN = VCC -0.6V); all other inputs at VCC or GND. This parameter is not directly testable, but is derived for use in Total Power Supply calculations. Values for these conditions are examples of the IC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ∆ICC DHNT + ICCD (fONO) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ∆ICC = Power Supply Current for a TTL High Input (VIN = VCC -0.6V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fO = Output Frequency NO = Number of Outputs at fO All currents are in milliamps and all frequencies are in megahertz. 4 (5) mA IDT49FCT3805/A 3.3V CMOS BUFFER/CLOCK DRIVER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE SWITCHING CHARACTERISTICS OVER OPERATING RANGE - COMMERCIAL(3,4) Symbol Parameter FCT3805A Min.(2) Max. Unit 5.8 1.5 5 ns Output Rise Time Output Fall Time — — 2 2 — — 2 2 ns ns tSK(O) Output skew: skew between outputs of all banks of same package (inputs tied together) — 0.5 — 0.5 ns tSK(P) Pulse skew: skew between opposite transitions of same output (|tPHL -– tPLH|) — 1 — 1 ns tSK(T) Package skew: skew between outputs of different — 1.5 — 1.2 ns tR tF CL = 50pF RL = 500Ω FCT3805 Min.(2) Max. 1.5 tPLH tPHL Propagation Delay INA to OAn, INB to OBn Conditions(1) packages at same power supply voltage, tPZL temperature, package type and speed grade Output Enable Time 1.5 6.5 1.5 6 ns tPZH tPLZ OEA to OAn, OEB to OBn Output Disable Time 1.5 5.5 1.5 5 ns tPHZ OEA to OAn, OEB to OBn SWITCHING CHARACTERISTICS OVER OPERATING RANGE - INDUSTRIAL(3,4) Symbol Parameter FCT3805A Min.(2) Max. Unit 5.8 1.5 5.2 ns Output Rise Time Output Fall Time — — 2 2 — — 2 2 ns ns tSK(O) Output skew: skew between outputs of all banks of same package (inputs tied together) — 0.6 — 0.6 ns tSK(P) Pulse skew: skew between opposite transitions of same output (|tPHL -– tPLH|) — 1 — 1 ns tSK(T) Package skew: skew between outputs of different — 1.5 — 1.2 ns tR tF CL = 50pF RL = 500Ω FCT3805 Min.(2) Max. 1.5 tPLH tPHL Propagation Delay INA to OAn, INB to OBn Conditions(1) packages at same power supply voltage, tPZL temperature, package type and speed grade Output Enable Time 1.5 6.5 1.5 6 ns tPZH tPLZ OEA to OAn, OEB to OBn Output Disable Time 1.5 5.5 1.5 5 ns tPHZ OEA to OAn, OEB to OBn NOTES: 1. See test circuits and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. tPLH, tPHL, tSK(t) are production tested. All other parameters guaranteed but not production tested. 4. Propagation delay range indicated by Min. and Max. limit is due to VCC, operating temperature and process parameters. These propagation delay limits do not imply skew. 5 IDT49FCT3805/A 3.3V CMOS BUFFER/CLOCK DRIVER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS SWITCH POSITION 6V VCC GND 500Ω VOUT VIN Pulse Generator 500Ω RT Switch 6V Disable HIGH Enable HIGH GND DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. D.U.T. 50pF Test Disable LOW Enable LOW Test Circuits for All Outputs 3V 1.5V INPUT tPLH1 0V tPLH 3V 1.5V 0V VOH 1.5V VOL INPUT tPHL1 tPHL OUTPUT 1 VOH 2.0V 0.8V OUTPUT VOL tPLH2 tPHL2 tSK(o) = |tPLH2 - tPLH1| or |tPHL2 - tPHL1| Package Delay Output Skew - tSK(O) INPUT tPHL tPLH VOH 1.5V VOL OUTPUT 2 tF tR tSK(o) tSK(o) 1.5V OUTPUT 3V 1.5V 0V INPUT VOH 1.5V VOL PACKAGE 1 OUTPUT tPHL1 tPLH1 tSK(p) = |tPHL - tPLH| 3V 1.5V 0V tSK(t) tSK(t) PACKAGE 2 OUTPUT Pulse Skew - tSK(P) tPLH2 tPHL2 VOH 1.5V VOL VOH 1.5V VOL tSK(t) = |tPLH2 - tPLH1| or |tPHL2 - tPHL1| ENABLE DISABLE 3V CONTROL INPUT tPZL OUTPUT NORMALLY LOW SWITCH CLOSED t PLZ SWITCH OPEN 3.5V 3.5V 1.5V 0.3V V OL tPHZ t PZH OUTPUT NORMALLY HIGH Package Skew - tSK(T) 1.5V 0V 0.3V VOH 1.5V 0V 0V NOTES: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH 2. Pulse Generator for All Pulses: f ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns Output Skew - tSK(X) 6 IDT49FCT3805/A 3.3V CMOS BUFFER/CLOCK DRIVER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE ORDERING INFORMATION IDT49FCT XXXX Device Type X Package X Package CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 Blank I Commercial (0°C to +70°C) Industrial (-40°C to +85°C) SO SOG PY PYG Q QG Small Outline IC SOIC - Green Shrink Small Outline IC SSOP - Green Quarter-size Small Outline IC QSOP - Green 3805 3805A Non-Inverting 3.3V Buffer/Clock Driver for SALES: 800-345-7015 or 408-727-6116 fax: 408-492-8674 www.idt.com 7 for Tech Support: [email protected] (408) 654-6459