ONSEMI MC100LVE164FA

MC100LVE164
3.3VECL 16:1 Multiplexer
The MC100LVE164 is a 16:1 multiplexer with a differential output.
The select inputs (SEL0, 1, 2, 3 ) control which one of the sixteen data
inputs (A0 − A15) is propragated to the output. The device is
functionally equivalent to the MC100E164 except it operates from a
3.3 V supply. The device is packaged in the 32−lead LQFP. The LQFP
has a 7x7 mm body with a 0.8 mm lead pitch.
Special attention to the design layout results in a typical skew
between the 16 inputs of only 50 ps.
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MARKING
DIAGRAM*
Features
• 850 ps Data Input to Output
• Differential Output
• ESD Protection: Human Body Model; >2 kV,
32 LQFP
FA SUFFIX
CASE 873A
Machine Model >200 V
The 100 Series Contains Temperature Compensation
•
• PECL Mode Operating Range: VCC = 3.0 V to 3.8 V
•
with VEE = 0 V
NECL Mode Operating Range: VCC = 0 V
with VEE = −3.0 V to −3.8 V
Internal Input Pulldown Resistors
•
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
• Moisture Sensitivity Level 2
•
For Additional Information, see Application Note AND8003/D
Flammability Rating: UL 94 code V−0 @ 0.125 in,
Oxygen Index: 28 to 34
Transistor Count = 307 devices
•
• Pb−Free Packages are Available*
A
WL
YY
WW
G
LVE164
AWLYYWWG
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
November, 2006 − Rev. 6
1
Publication Order Number:
MC100LVE164/D
A13
A14
A15
VCC
NC
A10
A12
25
A11
NC
NC
MC100LVE164
24
23
22
21
20
19
18
17
A0
16
NC
26
15
SEL3
A9
27
14
VCC
A8
28
13
Q
A7
29
12
Q
A6
30
11
SEL2
A5
31
10
SEL1
NC
32
9
SEL0
32-Lead LQFP
(Top View)
1
2
3
4
5
6
7
A1
Q
16:1
Q
A14
A15
SEL0
8
SEL1
SEL3
NC
VEE
A0
A1
A2
A3
A4
NC
SEL2
Warning: All VCC and VEE pins must be externally connected to Power
Supply to guarantee proper operation.
Figure 1. Logic Diagram and Pinout Assignment
Figure 2. Logic Diagram
Table 1. PIN DESCRIPTION
PIN
Table 2. FUNCTION TABLE
FUNCTION
SEL3
SEL2
SEL1
SEL0
Data
A0 − A15
ECL Data Inputs
L
L
L
L
A0
SEL[0:3]
ECL Select Inputs
L
L
L
H
A1
Q, Q
ECL Differential Outputs
L
L
H
L
A2
VCC
Positive Supply
L
L
H
H
A3
VEE
Negative Supply
L
H
L
L
A4
NC
No Connect
L
H
L
H
A5
L
H
H
L
A6
L
H
H
H
A7
H
L
L
L
A8
H
L
L
H
A9
H
L
H
L
A10
H
L
H
H
A11
H
H
L
L
A12
H
H
L
H
A13
H
H
H
L
A14
H
H
H
H
A15
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2
MC100LVE164
Table 3. MAXIMUM RATINGS
Symbol
Rating
Unit
VCC
PECL Mode Power Supply
Parameter
Condition 1
VEE = 0 V
8 to 0
V
VEE
NECL Mode Power Supply
VCC = 0 V
−8 to 0
V
VI
PECL Mode Input Voltage
NECL Mode Input Voltage
VEE = 0 V
VCC = 0 V
6 to 0
−6 to 0
V
V
Iout
Output Current
Continuous
Surge
50
100
mA
mA
TA
Operating Temperature Range
−40 to +85
°C
Tstg
Storage Temperature Range
−65 to +150
°C
qJA
Thermal Resistance (Junction−to−Ambient)
qJC
Thermal Resistance (Junction−to−Case)
Tsol
Wave Solder
Pb
Pb−Free
Condition 2
VI VCC
VI VEE
0 lfpm
500 lfpm
32 LQFP
32 LQFP
80
55
°C/W
°C/W
Standard Board
32 LQFP
12 to 17
°C/W
265
265
°C
<2 to 3 sec @ 248°C
<2 to 3 sec @ 260°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 4. LVPECL DC CHARACTERISTICS VCC = 3.3 V; VEE = 0.0 V (Note 1)
−40°C
Symbol
Characteristic
Min
25°C
Typ
Max
34
45
Min
85°C
Typ
Max
34
45
Min
Typ
Max
Unit
37
45
mA
IEE
Power Supply Current
VOH
Output HIGH Voltage (Note 2)
2215
2295
2420
2275
2345
2420
2275
2345
2420
mV
VOL
Output LOW Voltage (Note 2)
1470
1605
1745
1490
1595
1680
1490
1595
1680
mV
VIH
Input HIGH Voltage (Single−Ended)
2135
2420
2135
2420
2135
2420
mV
VIL
Input LOW Voltage (Single−Ended)
1490
1825
1490
1825
1490
1825
mV
IIH
Input HIGH Current
150
μA
IIL
Input LOW Current
150
0.5
150
0.5
0.5
μA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Input and output parameters vary 1:1 with VCC. VEE can vary ±0.3 V.
2. Outputs are terminated through a 50 W resistor to VCC − 2.0 V.
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3
MC100LVE164
Table 5. LVNECL DC CHARACTERISTICS VCC = 0.0 V; VEE = −3.3 V (Note 3)
−40°C
Symbol
Min
Characteristic
25°C
Typ
Max
34
45
Min
85°C
Typ
Max
34
45
Min
Typ
Max
Unit
37
45
mA
IEE
Power Supply Current
VOH
Output HIGH Voltage (Note 4)
−1085
−1005
−880
−1025
−955
−880
−1025
−955
−880
mV
VOL
Output LOW Voltage (Note 4)
−1830
−1695
−1555
−1810
−1705
−1620
−1810
−1705
−1620
mV
VIH
Input HIGH Voltage (Single−Ended)
−1165
−880
−1165
−880
−1165
−880
mV
VIL
Input LOW Voltage (Single−Ended)
−1810
−1475
−1810
−1475
−1810
−1475
mV
IIH
Input HIGH Current
150
μA
IIL
Input LOW Current
150
0.5
150
0.5
0.5
μA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
3. Input and output parameters vary 1:1 with VCC. VEE can vary ±0.3 V.
4. Outputs are terminated through a 50 W resistor to VCC − 2.0 V.
Table 6. AC CHARACTERISTICS VCC = 3.3 V; VEE = 0.0 V or VCC = 0.0 V; VEE = −3.3 V (Note 5)
−40°C
Symbol
Min
Characteristic
25°C
Typ
fmax
Maximum Toggle Frequency
tPLH
tPHL
Propagation Delay
to Output
tSKEW
Within Device Skew (Note 6)
75
tJITTER
RMS Random Clock Jitter
<1
tr
tf
Rise/Fall Times (20% − 80%)
Max
Min
700
A Input
SEL0
SEL1
SEL2
SEL3
350
500
400
400
400
275
Typ
85°C
Max
Min
700
600
700
675
675
550
850
900
900
900
700
350
500
400
400
400
600
700
675
675
550
850
900
900
900
700
350
500
400
400
400
275
400
600
700
675
675
550
850
900
900
900
700
275
400
ps
ps
ps
<1
550
Unit
MHz
50
<1
550
Max
700
50
400
Typ
550
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
5. VEE can vary ±0.3 V.
6. Within Device skew is defined as the difference in the A to Q delay between the 16 different A inputs.
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4
MC100LVE164
Q
Zo = 50 W
D
Receiver
Device
Driver
Device
Q
D
Zo = 50 W
50 W
50 W
VTT
VTT = VCC − 2.0 V
Figure 3. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
Resource Reference of Application Notes
AN1405/D
− ECL Clock Distribution Techniques
AN1406/D
− Designing with PECL (ECL at +5.0 V)
AN1503/D
− ECLinPSt I/O SPiCE Modeling Kit
AN1504/D
− Metastability and the ECLinPS Family
AN1568/D
− Interfacing Between LVDS and ECL
AN1672/D
− The ECL Translator Guide
AND8001/D
− Odd Number Counters Design
AND8002/D
− Marking and Date Codes
AND8020/D
− Termination of ECL Logic Devices
AND8066/D
− Interfacing with ECLinPS
AND8090/D
− AC Characteristics of ECL Devices
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5
MC100LVE164
ORDERING INFORMATION
Package
Shipping †
LQFP
250 Units / Rail
MC100LVE164FAG
LQFP
(Pb−Free)
250 Units / Rail
MC100LVE164FAR2
LQFP
2000 / Tape & Reel
LQFP
(Pb−Free)
2000 / Tape & Reel
Device
MC100LVE164FA
MC100LVE164FAR2G
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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6
MC100LVE164
PACKAGE DIMENSIONS
32
A1
A
−T−, −U−, −Z−
32 LEAD LQFP
CASE 873A−02
ISSUE C
4X
25
0.20 (0.008) AB T−U Z
1
AE
−U−
−T−
B
P
V
17
8
BASE
METAL
DETAIL Y
V1
AC T−U Z
AE
DETAIL Y
ÉÉ
ÉÉ
ÉÉ
ÉÉ
9
−Z−
4X
S1
0.20 (0.008) AC T−U Z
F
S
8X M_
G
D
DETAIL AD
−AB−
SECTION AE−AE
C E
−AC−
H
W
K
X
DETAIL AD
Q_
0.250 (0.010)
0.10 (0.004) AC
GAUGE PLANE
SEATING
PLANE
J
R
M
N
9
0.20 (0.008)
B1
ECLinPS is a trademark of Semiconductor Components INdustries, LLC (SCILLC).
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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For additional information, please contact your local
Sales Representative
MC100LVE64/D