Fairchild FQB5N60 600v n-channel mosfet Datasheet

FQB5N60 / FQI5N60
April 2000
QFET
TM
FQB5N60 / FQI5N60
600V N-Channel MOSFET
General Description
Features
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switch mode power supply.
•
•
•
•
•
•
5.0A, 600V, RDS(on) = 2.0Ω @VGS = 10 V
Low gate charge ( typical 16 nC)
Low Crss ( typical 9.0 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
D
D
!
"
G
S
G!
D2-PAK
G D S
FQB Series
Absolute Maximum Ratings
Symbol
VDSS
!
FQI Series
Parameter
ID
IDM
Drain Current
S
FQB5N60 / FQI5N60
- Continuous (TC = 100°C)
- Pulsed
(Note 1)
A
3.15
A
20
A
V
Single Pulsed Avalanche Energy
300
mJ
Avalanche Current
(Note 1)
5.0
A
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (TA = 25°C) *
(Note 1)
12
4.5
3.13
mJ
V/ns
W
120
0.96
-55 to +150
W
W/°C
°C
300
°C
IAR
EAR
(Note 3)
Power Dissipation (TC = 25°C)
TL
V
5.0
±30
Gate-Source Voltage
TJ, TSTG
Units
600
(Note 2)
VGSS
EAS
dv/dt
"
"
I2-PAK
TC = 25°C unless otherwise noted
Drain-Source Voltage
- Continuous (TC = 25°C)
Drain Current
PD
! "
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8 from case for 5 seconds
Thermal Characteristics
Symbol
RθJC
Typ
Max
Thermal Resistance, Junction-to-Case
Parameter
--
1.04
Units
°CW
RθJA
Thermal Resistance, Junction-to-Ambient *
--
40
°CW
RθJA
Thermal Resistance, Junction-to-Ambient
--
62.5
°CW
* When mounted on the minimum pad size recommended (PCB Mount)
©2000 Fairchild Semiconductor International
Rev. A, April 2000
Symbol
C
= 25°C unless otherwise noted
Parameter
Test Conditions
Min
Typ
Max
Units
600
--
--
V
Off Characteristics
BVDSS
Drain-Source Breakdown Voltage
VGS = 0 V, ID = 250 µA
∆BVDSS
/ ∆TJ
Breakdown Voltage Temperature
Coefficient
ID = 250 µA, Referenced to 25°C
--
0.6
--
V/°C
VDS = 600 V, VGS = 0 V
--
--
10
µA
VDS = 480 V, TC = 125°C
IDSS
Zero Gate Voltage Drain Current
--
--
100
µA
IGSSF
Gate-Body Leakage Current, Forward
VGS = 30 V, VDS = 0 V
--
--
100
nA
IGSSR
Gate-Body Leakage Current, Reverse
VGS = -30 V, VDS = 0 V
--
--
-100
nA
3.0
--
5.0
V
--
1.57
2.0
Ω
--
4.0
--
S
--
560
730
pF
--
80
100
pF
--
9
12
pF
--
13
35
ns
ns
On Characteristics
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250 µA
RDS(on)
Static Drain-Source
On-Resistance
VGS = 10 V, ID = 2.5 A
gFS
Forward Transconductance
VDS = 50 V, ID = 2.5 A
(Note 4)
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf
Turn-Off Fall Time
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
VDD = 300 V, ID = 5.0 A,
RG = 25 Ω
(Note 4, 5)
VDS = 480 V, ID = 5.0 A,
VGS = 10 V
(Note 4, 5)
--
45
100
--
35
80
ns
--
40
90
ns
--
16
20
nC
--
3.5
--
nC
--
7.8
--
nC
Drain-Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain-Source Diode Forward Current
--
--
5.0
A
ISM
--
--
20
A
VSD
Maximum Pulsed Drain-Source Diode Forward Current
VGS = 0 V, IS = 5.0 A
Drain-Source Diode Forward Voltage
--
--
1.4
V
trr
Reverse Recovery Time
--
270
--
ns
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = 5.0 A,
dIF / dt = 100 A/µs
--
1.9
--
µC
(Note 4)
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 22mH, IAS = 5.0A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD 5.0A, di/dt 200A/µs, VDD BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width 300µs, Duty cycle 2%
5. Essentially independent of operating temperature
©2000 Fairchild Semiconductor International
Rev. A, April 2000
FQB5N60 / FQI5N60
Electrical CharacteristicsT
ID , Drain Current [A]
Bottom :
VGS
15 V
10 V
8.0 V
7.0 V
6.5 V
6.0 V
5.5 V
1
10
ID , Drain Current [A]
Top :
1
10
0
10
150
0
25
10
-55
Notes :
1. VDS = 50V
2. 250s Pulse Test
Notes :
1. 250s Pulse Test
2. TC = 25
-1
10
-1
-1
0
10
10
1
10
2
10
4
6
8
10
VGS , Gate-Source Voltage [V]
VDS , Drain-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
5
1
IDR , Reverse Drain Current [A]
RDS(ON) [ ],
Drain-Source On-Resistance
10
VGS = 10V
4
VGS = 20V
3
2
1
0
10
25
150
Notes :
1. VGS = 0V
2. 250s Pulse Test
Note : TJ = 25
0
-1
0
2
4
6
8
10
12
14
10
0.2
0.4
0.6
0.8
1.0
1.2
1.4
ID, Drain Current [A]
VSD , Source-Drain Voltage [V]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
1200
12
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
VDS = 120V
10
800
Ciss
600
Coss
Notes :
1. VGS = 0 V
2. f = 1 MHz
400
Crss
200
VGS , Gate-Source Voltage [V]
1000
Capacitance [pF]
FQB5N60 / FQI5N60
Typical Characteristics
VDS = 300V
VDS = 480V
8
6
4
2
Note : ID = 5.0 A
0
0
-1
10
0
10
1
10
VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
©2000 Fairchild Semiconductor International
0
3
6
9
12
15
18
QG, Total Gate Charge [nC]
Figure 6. Gate Charge Characteristics
Rev. A, April 2000
FQB5N60 / FQI5N60
Typical Characteristics
(Continued)
3.0
1.2
BV DSS , (Normalized)
Drain-Source Breakdown Voltage
2.5
RDS(ON) , (Normalized)
Drain-Source On-Resistance
1.1
1.0
Notes :
1. VGS = 0 V
2. ID = 250 A
0.9
0.8
-100
-50
0
50
100
2.0
1.5
1.0
Notes :
1. VGS = 10 V
2. ID = 2.5 A
0.5
150
0.0
-100
200
-50
0
o
50
100
150
200
o
TJ, Junction Temperature [ C]
TJ, Junction Temperature [ C]
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
5
Operation in This Area
is Limited by R DS(on)
4
ID, Drain Current [A]
10
ID, Drain Current [A]
100 µs
1
1 ms
10 ms
DC
0
10
Notes :
3
2
1
o
1. TC = 25 C
o
2. TJ = 150 C
3. Single Pulse
-1
10
0
1
10
2
10
0
25
3
10
10
50
100
125
150
Figure 10. Maximum Drain Current
vs. Case Temperature
0
D = 0 .5
N o te s :
1 . Z J C ( t) = 1 .0 4 /W M a x .
2 . D u ty F a c to r , D = t 1 /t 2
3 . T J M - T C = P D M * Z J C ( t)
0 .2
10
0 .1
-1
0 .0 5
PDM
0 .0 2
JC
( t) , T h e r m a l R e s p o n s e
Figure 9. Maximum Safe Operating Area
10
75
TC, Case Temperature []
VDS, Drain-Source Voltage [V]
0 .0 1
t1
Z
s i n g l e p u ls e
10
t2
-2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ]
Figure 11. Transient Thermal Response Curve
©2000 Fairchild Semiconductor International
Rev. A, April 2000
FQB5N60 / FQI5N60
Gate Charge Test Circuit & Waveform
VGS
Same Type
as DUT
50K
Qg
200nF
12V
10V
300nF
VDS
VGS
Qgs
Qgd
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
VDS
RL
VDS
90%
VDD
VGS
RG
VGS
DUT
10V
10%
td(on)
tr
td(off)
t on
tf
t off
Unclamped Inductive Switching Test Circuit & Waveforms
BVDSS
1
EAS = ---- L IAS2 -------------------2
BVDSS - VDD
L
VDS
BVDSS
IAS
ID
RG
VDD
DUT
10V
tp
©2000 Fairchild Semiconductor International
ID (t)
VDS (t)
VDD
tp
Time
Rev. A, April 2000
FQB5N60 / FQI5N60
Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
+
VDS
_
I SD
L
Driver
RG
VGS
VGS
( Driver )
Same Type
as DUT
VDD
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
D = -------------------------Gate Pulse Period
10V
IFM , Body Diode Forward Current
I SD
( DUT )
di/dt
IRM
Body Diode Reverse Current
VDS
( DUT )
Body Diode Recovery dv/dt
VSD
VDD
Body Diode
Forward Voltage Drop
©2000 Fairchild Semiconductor International
Rev. A, April 2000
4.50 ±0.20
9.90 ±0.20
+0.10
2.00 ±0.10
(0.75)
3°
~
0°
0.80 ±0.10
1.27 ±0.10
2.54 TYP
2.54 ±0.30
15.30 ±0.30
0.10 ±0.15
2.40 ±0.20
4.90 ±0.20
9.20 ±0.20
1.30 –0.05
1.20 ±0.20
(0.40)
D2PAK
1.40 ±0.20
+0.10
0.50 –0.05
2.54 TYP
4.90 ±0.20
(2XR0.45)
9.20 ±0.20
10.00 ±0.20
(7.20)
(1.75)
10.00 ±0.20
(8.00)
(4.40)
15.30 ±0.30
FQB5N60 / FQI5N60
Package Dimensions
0.80 ±0.10
©2000 Fairchild Semiconductor International
Rev. A, April 2000
(Continued)
I2PAK
4.50 ±0.20
(0.40)
9.90 ±0.20
+0.10
MAX13.40
9.20 ±0.20
(1.46)
1.20 ±0.20
1.30 –0.05
0.80 ±0.10
2.54 TYP
2.54 TYP
10.08 ±0.20
1.47 ±0.10
MAX 3.00
(0.94)
13.08 ±0.20
)
5°
(4
1.27 ±0.10
+0.10
0.50 –0.05
2.40 ±0.20
10.00 ±0.20
©2000 Fairchild Semiconductor International
Rev. A, April 2000
FQB5N60 / FQI5N60
Package Dimensions
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench 
QFET™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST
FASTr™
GTO™
SuperSOT™-8
SyncFET™
TinyLogic™
UHC™
VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. E
Similar pages