Microchip MCP103T-195I/TT Micropower voltage supervisor Datasheet

MCP102/103/121/131
Micropower Voltage Supervisors
Package Types
SOT23-3/SC-70
RST 1
VDD 2
TO-92
3 VSS
RST
VDD VSS
SOT23-3/SC-70
VSS 1
MCP103
• Ultra low supply current: 1.75 µA
(steady-state max.)
• Precision monitoring options of:
- 1.90V, 2.32V, 2.63V, 2.93V, 3.08V, 4.38V
and 4.63V
• Resets microcontroller in a power-loss event
• RST pin (Active-low):
- MCP121: Active-low, open-drain
- MCP131: Active-low, open-drain with internal
pull-up resistor
- MCP102 and MCP103: Active-low, push-pull
• Reset Delay Timer (120 ms delay, typ.)
• Available in SOT23-3, TO-92 and SC-70
packages
• Temperature Range:
- Extended: -40°C to +125°C
(except MCP1XX-195)
- Industrial: -40°C to +85°C (MCP1XX-195 only)
• Pb-free devices
MCP102/121/131
Features
3 VDD
RST 2
Block Diagram
Applications
VDD
• Critical Microcontroller and Microprocessor
Power-monitoring Applications
• Computers
• Intelligent Instruments
• Portable Battery-powered Equipment
R (1)
Comparator
+
Reset
Delay
Circuit
–
Output
Driver
RST
General Description
The MCP102/103/121/131 are voltage supervisor
devices designed to keep a microcontroller in reset
until the system voltage has reached and stabilized at
the proper level for reliable system operation. Table 1
shows the available features for these devices.
TABLE 1:
Band Gap
Reference
VSS
Note 1: MCP131 Only
DEVICE FEATURES
Output
Device
Type
Reset
Package Pinout
Delay
(typ)
(Pin # 1, 2, 3)
Pull-up Resistor
MCP102 Push-pull
No
MCP103 Push-pull
No
MCP121 Open-drain External
120 ms
Comment
RST, VDD, VSS
120 ms
VSS, RST, VDD
120 ms
RST, VDD, VSS
MCP131 Open-drain Internal (~95 kΩ) 120 ms
RST, VDD, VSS
MCP111 Open-drain External
No
VOUT, VSS, VDD
See MCP111/112 Data Sheet
(DS21889)
MCP112 Push-Pull
No
VOUT, VSS, VDD
See MCP111/112 Data Sheet
(DS21889)
No
© 2005 Microchip Technology Inc.
DS21906B-page 1
MCP102/103/121/131
1.0
ELECTRICAL
CHARACTERISTICS
† Notice: Stresses above those listed under “Maximum
Ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operational listings of this specification is not implied.
Exposure to maximum rating conditions for extended periods
may affect device reliability.
Absolute Maximum Ratings†
VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0V
Input current (VDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 mA
Output current (RST) . . . . . . . . . . . . . . . . . . . . . . . . . .10 mA
Rated Rise Time of VDD . . . . . . . . . . . . . . . . . . . . . . 100V/µs
All inputs and outputs (except RST) w.r.t. VSS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.6V to (VDD + 1.0V)
RST output w.r.t. VSS . . . . . . . . . . . . . . . . . . . -0.6V to 13.5V
Storage temperature . . . . . . . . . . . . . . . . . . -65°C to + 150°C
Ambient temp. with power applied . . . . . . . -40°C to + 125°C
Maximum Junction temp. with power applied . . . . . . . . 150°C
ESD protection on all pins . . . . . . . . . . . . . . . . . . . . . . . . . ≥ 2 kV
DC CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121 only),
TA = -40°C to +125°C.
Parameters
Sym
Min
Typ
Max
Units
Operating Voltage Range
VDD
1.0
—
5.5
V
Specified VDD Value to RST low
VDD
1.0
—
V
IRST = 10 uA, VRST < 0.2V
Operating Current
IDD
—
<1
1.75
µA
Reset Power-up Timer (tRPU) Inactive
—
—
20.0
µA
Reset Power-up Timer (tRPU) Active
—
<1
1.75
µA
VDD > VTRIP and Reset Power-up
Timer (tRPU) Inactive
—
—
75
µA
VDD < VTRIP and Reset Power-up
Timer (tRPU) Inactive (Note 3)
—
—
90
µA
Reset Power-up Timer (tRPU) Active
(Note 4)
MCP102,
MCP103,
MCP121
MCP131
Note 1:
2:
3:
4:
5:
6:
IDD
Conditions
Trip point is ±1.5% from typical value.
Trip point is ±2.5% from typical value.
RST output is forced low. There is a current through the internal pull-up resistor.
This includes the current through the internal pull-up resistor and the reset power-up timer.
This specification allows this device to be used in PICmicro® microcontroller applications that require In-Circuit Serial
Programming™ (ICSP™) (see device-specific programming specifications for voltage requirements). This specification
DOES NOT allow a continuos high voltage to be present on the open-drain output pin (VOUT). The total time that the
VOUT pin can be above the maximum device operational voltage (5.5V) is 100s. Current into the VOUT pin should be
limited to 2 mA and it is recommended that the device operational temperature be maintained between 0°C to 70°C
(+25°C preferred). For additional information, please refer to Figure 2-33.
This parameter is established by characterization and not 100% tested.
DS21906B-page 2
© 2005 Microchip Technology Inc.
MCP102/103/121/131
DC CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121 only),
TA = -40°C to +125°C.
Parameters
VDD Trip Point
MCP1XX-195
Sym
Min
Typ
Max
Units
VTRIP
1.872
1.900
1.929
V
TA = +25°C (Note 1)
1.853
1.900
1.948
V
TA = -40°C to +85°C (Note 2)
2.285
2.320
2.355
V
TA = +25°C (Note 1)
2.262
2.320
2.378
V
Note 2
2.591
2.630
2.670
V
TA = +25°C (Note 1)
2.564
2.630
2.696
V
Note 2
2.886
2.930
2.974
V
TA = +25°C (Note 1)
2.857
2.930
3.003
V
Note 2
3.034
3.080
3.126
V
TA = +25°C (Note 1)
3.003
3.080
3.157
V
Note 2
4.314
4.380
4.446
V
TA = +25°C (Note 1)
4.271
4.380
4.490
V
Note 2
4.561
4.630
4.700
V
TA = +25°C (Note 1)
4.514
4.630
4.746
V
Note 2
MCP1XX-240
MCP1XX-270
MCP1XX-300
MCP1XX-315
MCP1XX-450
MCP1XX-475
VDD Trip Point Tempco
TTPCO
—
±100
—
ppm/°C
Threshold
Hysteresis
(min. = 1%,
max = 6%)
VHYS
0.019
—
0.114
V
MCP1XX-240
0.023
—
0.139
V
MCP1XX-270
0.026
—
0.158
V
MCP1XX-300
0.029
—
0.176
V
MCP1XX-315
0.031
—
0.185
V
MCP1XX-450
0.044
—
0.263
V
MCP1XX-475
0.046
—
0.278
V
MCP1XX-195
Conditions
TA = +25°C
RST Low-level Output Voltage
VOL
—
—
0.4
V
IOL = 500 µA, VDD = VTRIP(MIN)
RST High-level Output Voltage
(MCP102 and MCP103 only)
VOH
VDD – 0.6
—
—
V
IOH = 1 mA, For MCP102/MCP103
only (push-pull output)
Internal Pull-up Resistor
(MCP131 only)
RPU
—
95
—
kΩ
Open-drain High Voltage on Output
(MCP121 only)
VODH
—
—
13.5 (5)
V
Open-drain Output Leakage Current
(MCP121 only)
IOD
—
0.1
—
µA
Note 1:
2:
3:
4:
5:
6:
VDD = 5.5V
VDD = 3.0V, Time voltage > 5.5V
applied ≤ 100s,
current into pin limited to 2 mA, 25°C
operation recommended
(Note 5, Note 6)
Trip point is ±1.5% from typical value.
Trip point is ±2.5% from typical value.
RST output is forced low. There is a current through the internal pull-up resistor.
This includes the current through the internal pull-up resistor and the reset power-up timer.
This specification allows this device to be used in PICmicro® microcontroller applications that require In-Circuit Serial
Programming™ (ICSP™) (see device-specific programming specifications for voltage requirements). This specification
DOES NOT allow a continuos high voltage to be present on the open-drain output pin (VOUT). The total time that the
VOUT pin can be above the maximum device operational voltage (5.5V) is 100s. Current into the VOUT pin should be
limited to 2 mA and it is recommended that the device operational temperature be maintained between 0°C to 70°C
(+25°C preferred). For additional information, please refer to Figure 2-33.
This parameter is established by characterization and not 100% tested.
© 2005 Microchip Technology Inc.
DS21906B-page 3
MCP102/103/121/131
VTRIP
1V
VDD
tRPU
tRPD
VOH
1V
VOL
RST
tRT
FIGURE 1-1:
Timing Diagram.
AC CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121 only),
TA = -40°C to +125°C.
Parameters
Sym
Min
Typ
Max
Units
VDD Detect to RST Inactive
tRPU
80
120
180
ms
Figure 1-1 and CL = 50 pF
VDD Detect to RST Active
tRPD
—
130
—
µs
VDD ramped from VTRIP(MAX) +
250 mV down to VTRIP(MIN) –
250 mV, per Figure 1-1,
CL = 50 pF (Note 1)
tRT
—
5
—
µs
For RST 10% to 90% of final value
per Figure 1-1, CL = 50 pF
(Note 1)
RST Rise Time After RST Active
(MCP102 and MCP103 only)
Note 1:
Conditions
These parameters are for design guidance only and are not 100% tested.
TEMPERATURE CHARACTERISTICS
Electrical Specifications: Unless otherwise noted, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121 only),
TA = -40°C to +125°C.
Parameters
Sym
Min
Typ
Max
Units
Specified Temperature Range
TA
-40
Specified Temperature Range
TA
-40
Maximum Junction Temperature
TJ
Storage Temperature Range
Conditions
—
+85
ºC
MCP1XX-195
—
+125
ºC
Except MCP1XX-195
—
—
+150
ºC
TA
-65
—
+150
ºC
Temperature Ranges
Package Thermal Resistances
Thermal Resistance, 3L-SOT23
θJA
—
336
—
ºC/W
Thermal Resistance, 3L-SC-70
θJA
—
340
—
ºC/W
Thermal Resistance, 3L-TO-92
θJA
—
131.9
—
ºC/W
DS21906B-page 4
© 2005 Microchip Technology Inc.
MCP102/103/121/131
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121 only;
see Figure 4-1), TA = -40°C to +125°C.
16
MCP102-195
5.5V
5.0V
1.4
1.2
1
IDD (uA)
4.0V
0.8
0.6
0.4
2.8V
2.1V
1.7V
12
5.5V
10
5.0V
8
4.0V
6
4
1.0V
0.2
0
MCP102-195
14
2.8V
2.1V
2
Temperature (°C)
2.9V
70
25
60
20
15
10
140
120
100
80
MCP131-315
5.5V
5.0V
4.5V
4.0V
3.3V
50
40
30
20
1.0V
5
10
3.3V, 4.0V, 5.0V, 5.5V
Temperature (°C)
140
120
100
80
60
40
Temperature (°C)
FIGURE 2-2:
IDD vs. Temperature
(Reset Power-up Timer Inactive) (MCP131-315).
FIGURE 2-5:
IDD vs. Temperature
(Reset Power-up Timer Active) (MCP131-315).
16
MCP121-450
5.5V
IDD (uA)
4.8V
4.6V
3.0V
MCP121-450
14
5.0V
4.1V
20
0
-20
-40
140
120
100
80
60
40
20
0
-20
0
-40
0
12
5.5V
10
5.0V
4.8V
4.6V
8
6
4
1.0V
2
Temperature (°C)
FIGURE 2-3:
IDD vs. Temperature
(Reset Power-up Timer Inactive) (MCP121-450).
© 2005 Microchip Technology Inc.
140
120
100
80
60
40
20
0
-20
-40
140
120
100
80
60
40
20
0
-20
0
-40
IDD (uA)
60
80
MCP131-315
IDD (uA)
IDD (uA)
FIGURE 2-4:
IDD vs. Temperature
(Reset Power-up Timer Active) (MCP102-195).
30
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
40
Temperature (°C)
FIGURE 2-1:
IDD vs. Temperature
(Reset Power-up Timer Inactive) (MCP102-195).
35
20
0
-20
-40
120
100
80
60
40
20
0
-20
-40
0
140
IDD (uA)
1.8
1.6
Temperature (°C)
FIGURE 2-6:
IDD vs. Temperature
(Reset Power-up Timer Active) (MCP121-450).
DS21906B-page 5
MCP102/103/121/131
16
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
MCP102-195
MCP102-195
14
+25°C
+85°C
0°C
5.0
6.0
10
8
Device in Reset
tRPU inactive
6
2
0
2.0
3.0
4.0
5.0
6.0
1.0
2.0
3.0
VDD (V)
4.0
VDD (V)
FIGURE 2-7:
IDD vs. VDD
(Reset Power-up Timer Inactive) (MCP102-195).
FIGURE 2-10:
IDD vs.VDD
(Reset Power-up Timer Active) (MCP102-195).
80
35
0°C, +25°C
-40°C
MCP131-315
30
MCP131-315
70
60
20
IDD (uA)
25
IDD (uA)
0°C
+25°C
+70°C
+85°C
+125°C
4
-40°C
1.0
+70°
C
15
+85°C
10
+125°C
5
-40°C, 0°C
+25°C
+70°C
+85°C
+125°C
5.0
6.0
Device in Reset
tRPU inactive
50
40
30
20
0
10
-5
0
1.0
2.0
3.0
4.0
5.0
6.0
1.0
2.0
3.0
VDD (V)
FIGURE 2-11:
IDD vs.VDD
(Reset Power-up Timer Active) (MCP131-315).
MCP121-450
+125°C
+70°C
+85°C
0°C
-40°C
+25°C
1.0
2.0
3.0
4.0
5.0
6.0
VDD (V)
FIGURE 2-9:
IDD vs. VDD
(Reset Power-up Timer Inactive) (MCP121-450).
DS21906B-page 6
IDD (uA)
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
4.0
VDD (V)
FIGURE 2-8:
IDD vs. VDD
(Reset Power-up Timer Inactive) (MCP131-315).
IDD (uA)
-40°C
12
+125°C
IDD (uA)
IDD (uA)
Note: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121 only;
see Figure 4-1), TA = -40°C to +125°C.
16
14
12
10
8
6
4
2
0
-2
-40°C
0°C
+25°C
+70°C
+85°C
+125°C
MCP121-450
Device in Reset
tRPU inactive
1.0
2.0
3.0
4.0
5.0
6.0
VDD (V)
FIGURE 2-12:
IDD vs.VDD
(Reset Power-up Timer Active) (MCP121-450).
© 2005 Microchip Technology Inc.
MCP102/103/121/131
Note: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121;
see Figure 4-1), TA = -40°C to +125°C.
0.050
0.045
0.040
0.035
0.030
0.025
0.020
0.015
0.010
0.005
MCP102-195
0.000
90
140
VTRIP, increasing VDD
VTRIP, decreasing VDD
-60
-10
40
MCP102-195
VDD = 1.7V
0.080
VOL (V)
VHYS, Hysteresis
0.100
Hyst (V)
VTRIP (V)
0.120
1.945
1.940
1.935
1.930
1.925
1.920
1.915
1.910
1.905
1.900
1.895
+70°C
+125°C
0.060
+85°C
+25°C
0.040
0.020
0°C
-40°C
0.000
-0.020
0.00
0.25
0.50
0.75
1.00
IOL (mA)
Temperature (°C)
FIGURE 2-13:
VTRIP vs. Temperature vs.
Hysteresis (MCP102-195).
FIGURE 2-16:
VOL vs. IOL
(MCP102-195 @ VDD = 1.7V).
0.070
0.060
3.160
3.140
3.120
3.100
3.080
3.060
-60
MCP131-315
VDD = 2.9V
0.040
+85°C
0.030
0.020
0°C
0.010
0.000
0.00
0.25
4.400
4.350
4.300
0.050
Temperature (°C)
FIGURE 2-15:
VTRIP vs. Temperature vs.
Hysteresis (MCP121-450).
© 2005 Microchip Technology Inc.
MCP121-450
VDD = 4.1V
1.00
+85°C
+125°C
0.040
VOL (V)
4.450
0.75
FIGURE 2-17:
VOL vs. IOL
(MCP131-315 @ VDD = 2.9V).
0.060
Hyst (V)
VTRIP (V)
4.500
0.50
IOL (mA)
FIGURE 2-14:
VTRIP vs. Temperature vs.
Hysteresis (MCP131-315).
0.190
0.180
0.170
VTRIP, increasing VDD
0.160
VHYS, Hysteresis
0.150
0.140
VTRIP, decreasing VDD
0.130
0.120
0.110
MCP121-450
0.100
-60
-20
20
60
100
140
-40°C
+25°C
Temperature (°C)
4.550
+70°C
+125°C
0.050
VOL (V)
3.180
VTRIP (V)
0.108
0.106
0.104
VHYS, Hysteresis
0.102
0.100
0.098
0.096
VTRIP, decreasing VDD
0.094
0.092
MCP131-315
0.090
-10
40
90
140
VTRIP, increasing VDD
Hyst (V)
3.200
+70°C
0.030
0.020
+25°C
0.010
0°C
-40°C
0.000
0.00
0.25
0.50
0.75
1.00
IOL (mA)
FIGURE 2-18:
VOL vs. IOL
(MCP121-450 @ VDD = 4.1V).
DS21906B-page 7
MCP102/103/121/131
Note: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121 only;
see Figure 4-1), TA = -40°C to +125°C.
0.120
2.110
MCP102-195
VDD = 1.7 V
VOL (V)
0.100
IOL = 0.50 mA
0.040
IOL = 0.25 mA
0.000
0
40
80
120
+125°C
2.010
+85°C
+70°C
1.950
0.00
+25°C
0.25
0.50
0.75
1.00
IOL (mA)
Temperature (°C)
FIGURE 2-22:
VOH vs. IOL
(MCP102-195 @ VDD = 2.1V).
FIGURE 2-19:
VOL vs. Temperature
(MCP102-195 @ VDD = 1.7V).
0.070
IOL = 1.00 mA
MCP131-315
VDD = 2.9V
IOL = 0.75 mA
0.050
VOL (V)
-40°C
2.030
1.970
IOL = 0.00 mA
-40
0°C
2.050
1.990
0.020
0.060
2.070
IOL = 0.75 mA
0.080
0.060
MCP102-195
VDD = 2.1V
2.090
IOL = 1.00 mA
VOH (V)
0.140
0.040
IOL = 0.50 mA
0.030
IOL = 0.25 mA
0.020
0.010
IOL = 0.00 mA
0.000
-40
0
40
80
120
Temperature (°C)
FIGURE 2-20:
VOL vs. Temperature
(MCP131-315 @ VDD = 2.9V).
0.060
0.050
MCP121-450
VDD = 4.1V
IOL = 1.00 mA
IOL = 0.75 mA
VOL (V)
0.040
0.030
IOL = 0.50 mA
0.020
IOL = 0.25 mA
0.010
IOL = 0.00 mA
0.000
-40
0
40
80
120
Temperature (°C)
FIGURE 2-21:
VOL vs. Temperature
(MCP121-450 @ VDD = 4.1V).
DS21906B-page 8
© 2005 Microchip Technology Inc.
MCP102/103/121/131
Note: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121 only;
see Figure 4-1), TA = -40°C to +125°C.
300
VDD decreasing
from: 5V - 1.7V
VDD decreasing from:
VTRIP(max) + 0.25V to VTRIP(min) - 0.25V
200
150
50
110
-40
-15
FIGURE 2-23:
(MCP102-195).
10
35
60
Temperature (°C)
85
VDD increasing
from: 0V - 5.5V
-40
110
FIGURE 2-26:
(MCP102-195).
160
150
100
tRPU (µs)
VDD decreasing from:
5V - 2.7V
35
10
35
60
85
110
tRPD vs. Temperature
38
VDD increasing from:
0V - 5.5V
-40
-15
37
FIGURE 2-27:
(MCP131-315).
10
35
60
Temperature (°C)
MCP121-450
VDD increasing from:
0V - 4.8V
135
36.5
36
130
125
VDD increasing from:
0V - 5.0V
120
35.5
VDD increasing from:
0V - 5.0V
VDD increasing from:
0V - 5.5V
35
110
tRPU vs. Temperature
140
VDD increasing from:
0V - 4.6V
VDD increasing from:
0V - 4.8V
85
145
MCP121-450
tRPU (µs)
37.5
MCP131-315
VDD increasing from:
0V - 4.5V
Temperature (°C)
FIGURE 2-24:
(MCP131-315).
110
130
100
-15
85
VDD increasing from:
0V - 4.0V
140
110
-40
60
tRPU vs. Temperature
120
VDD decreasing from:
5V - 0V
0
tRT (µs)
10
VDD increasing from:
0V - 3.3V
MCP131-315
200
150
-15
Temperature (°C)
tRPD vs. Temperature
VDD decreasing from:
VTRIP(max) + 0.25V to VTRIP(min) - 0.25V
tRPD (µs)
VDD increasing
from: 0V - 4.0V
100
250
50
VDD increasing from:
0V - 2.8V
130
120
VDD decreasing
from: 5V - 0V
VDD increasing from:
0V - 2.1V
140
100
0
MCP102-195
150
tRPU (µs)
tRPD (µs)
250
160
MCP102-195
115
VDD increasing from:
0V - 5.5V
110
-40
-15
10
35
60
85
110
-40
-15
Temperature (°C)
FIGURE 2-25:
(MCP121-450).
tRPD vs. Temperature
© 2005 Microchip Technology Inc.
10
35
60
85
110
Temperature (°C)
FIGURE 2-28:
(MCP121-450).
tRPU vs. Temperature
DS21906B-page 9
MCP102/103/121/131
Note: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 kΩ (MCP121 only;
see Figure 4-1), TA = -40°C to +125°C.
VDD increasing from:
0V - 2.1V
0.4
MCP102-195
VDD increasing from:
0V - 2.8V
0.35
tRT (µs)
0.3
0.25
0.2
0.15
0.1
VDD increasing from:
0V - 4.0V
VDD increasing from:
0V - 5.0V
VDD increasing from:
0V - 5.5V
0.05
1400
Transient Duration (µS)
0.45
MCP121-450
1200
1000
800
MCP102-195
600
400
200
0
-40
-15
10
35
60
85
MCP131-315
0
0.001
110
0.01
Temperature (°C)
FIGURE 2-29:
(MCP102-195).
0.1
VTRIP(Min) - VDD
1
10
FIGURE 2-32:
Transient Duration vs.
VTRIP (min) - VDD.
tRT vs. Temperature
10m
1m
100µ
10µ
1µ
100n
10n
1n
100p
10p
1p
100f
VDD increasing from:
0V - 5.0V
VDD increasing from:
0V - 5.5V
1.00E-03
Open-Drain Leakage (A)
tRT (µs)
1.00E-02
45
43
41
39
37
35
33
31
29
27
25
VDD increasing from:
0V - 4.5V
VDD increasing from:
0V - 3.3V
VDD increasing from:
0V - 4.0V
-40
-15
10
tRT (µs)
37
1.00E-06
+125°C
1.00E-07
1.00E-08
1.00E-09
1.00E-10
+25°C
- 40°C
1.00E-11
1.00E-13
35
60
85
110
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14
Pull-Up Voltage (V)
tRT vs. Temperature
38
37.5
1.00E-05
1.00E-12
MCP131-315
Temperature (°C)
FIGURE 2-30:
(MCP131-315).
1.00E-04
FIGURE 2-33:
Open-Drain Leakage
Current vs. Voltage Applied to VOUT Pin
(MCP121-195).
MCP121-450
VDD increasing from:
0V - 4.6V
VDD increasing from:
0V - 4.8V
36.5
36
35.5
VDD increasing from:
0V - 5.0V
VDD increasing from:
0V - 5.5V
35
-40
-15
10
35
60
85
110
Temperature (°C)
FIGURE 2-31:
(MCP121-450).
DS21906B-page 10
tRT vs. Temperature
© 2005 Microchip Technology Inc.
MCP102/103/121/131
3.0
PIN DESCRIPTION
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
PIN FUNCTION TABLE
Pin No.
MCP102
MCP121
MCP131
MCP103
1
1
Symbol
RST
Function
Output State
VDD Falling:
H = VDD > VTRIP
L = VDD < VTRIP
VDD Rising:
H = VDD > VTRIP + VHYS
L = VDD < VTRIP + VHYS
2
3
VDD
Positive power supply
3
2
VSS
Ground reference
© 2005 Microchip Technology Inc.
DS21906B-page 11
MCP102/103/121/131
4.0
APPLICATION INFORMATION
4.1
For many of today’s microcontroller applications, care
must be taken to prevent low-power conditions that can
cause many different system problems. The most
common causes are brown-out conditions, where the
system supply drops below the operating level momentarily. The second most common cause is when a
slowly decaying power supply causes the
microcontroller to begin executing instructions without
sufficient voltage to sustain volitile memory (RAM), thus
producing indeterminate results. Figure 4-1 shows a
typical application circuit.
The MCP102/103/121/131 are voltage supervisor
devices designed to keep a microcontroller in reset
until the system voltage has reached and stabilized at
the proper level for reliable system operation. These
devices also operate as protection from brown-out
conditions.
VDD
0.1
µF
VDD
VDD
RPU
MCP1XX
PICmicro®
Microcontroller
MCLR
(Reset input)
(Active-low)
RST
VSS
VSS
Note 1: Resistor RPU may be required with the
MCP121 due to the open-drain output.
Resistor RPU may not be required with
the MCP131 due to the internal pull-up
resistor. The MCP102 and MCP103 do
not require the external pull-up resistor.
FIGURE 4-1:
Typical Application Circuit.
RST Operation
The RST output pin operation determines how the
device can be used and indicates when the system
should be forced into reset. To accomplish this, an
internal voltage reference is used to set the voltage trip
point (VTRIP). Additionally, there is a hysteresis on this
trip point.
When the falling edge of VDD crosses this voltage
threshold, the reset power-down timer (TRPD) starts.
When this delay timer times out, the RST pin is forced
low.
When the rising-edge of VDD crosses this voltage
threshold, the reset power-up timer (TRPU) starts.
When this delay timer times out, the RST pin is forced
high, TRPU is active and there is additional system
current.
The actual voltage trip point (VTRIPAC) will be between
the minimum trip point (VTRIPMIN) and the maximum
trip point (VTRIPMAX). The hysteresis on this trip point
and the delay timer (TRPU) are to remove any “jitter”
that would occur on the RST pin when the device VDD
is at the trip point.
Figure 4-2 shows the waveform of the RST pin as determined by the VDD voltage, while Table 4-1 shows the
state of the RST pin. The VTRIP specification is for falling
VDD voltages. When the VDD voltage is rising, the RST
will not be driven high until VDD is at VTRIP + VHYS. Once
VDD has crossed the voltage trip point, there is also a
minimal delay time (TRPD) before the RST pin is driven
low.
TABLE 4-1:
RST PIN STATES
State of RST Pin when:
Device
VDD < VTRIP VDD >
Ouput Driver
VTRIP + VHYS
MCP102
L
H
Push-pull
MCP103
L
H
Push-pull
(1)
Open-drain (1)
Open-drain (2)
MCP121
L
H
MCP131
L
H (2)
Note 1: Requires External Pull-up resistor
2: Has Internal Pull-up resistor
VDD
VTRIPAC + VHYSAC
VTRIPMAX
VTRIPAC
VTRIPMIN
VTRIPAC
1V
RST
tRPU
tRPD
FIGURE 4-2:
DS21906B-page 12
< 1V is outside the
device specifications
tRPD
tRPU
RST Operation as Determined by the VTRIP and VHYS.
© 2005 Microchip Technology Inc.
MCP102/103/121/131
Negative Going VDD Transients
The minimum pulse width (time) required to cause a
reset may be an important criteria in the implementation of a Power-on Reset (POR) circuit. This time is
referred to as transient duration, defined as the amount
of time needed for these supervisory devices to
respond to a drop in VDD. The transient duration time is
dependant on the magnitude of VTRIP – VDD. Generally
speaking, the transient duration decreases with
increases in VTRIP – VDD.
Figure 4-3 shows a typical transient duration vs. reset
comparator
overdrive,
for
which
the
MCP102/103/121/131 will not generate a reset pulse. It
shows that the farther below the trip point the transient
pulse goes, the duration of the pulse required to cause
a reset gets shorter. Figure 2-32 shows the transient
response characteristics for the MCP102/103/121/131.
A 0.1 µF bypass capacitor, mounted as close as
possible to the VDD pin, provides additional transient
immunity (refer to Figure 4-1).
Supply Voltage
5V
0V
4.3
Reset Power-up Timer (tRPU)
Figure 4-4 illustrates the device current states. While
the system is powering down, the device has a low
current. This current is dependent on the device VDD
and trip point. When the device VDD rises through the
voltage trip point (VTRIP), an internal timer starts. This
timer consumes additional current until the RST pin is
driven (or released) high. This time is known as the
Reset Power-up Time (tRPU). Figure 4-4 shows when
tRPU is active (device consuming additional current).
VDD
VTRIP
RST
tRPU
VTRIP(MAX)
VTRIP(MIN)
VTRIP(MIN) - VDD
Reset Power-up
Timer Inactive
tTRANS
Reset Power-up
Timer Active
4.2
Reset
Power-up
Timer
Inactive
Time (µs)
See Figures 2-1,
2-2 and 2-3
FIGURE 4-3:
Example of Typical
Transient Duration Waveform.
See Figures 2-1,
2-2 and 2-3
See Figures 2-4,
2-5 and 2-6
FIGURE 4-4:
Waveform.
4.3.1
Reset Power-up Timer
EFFECT OF TEMPERATURE ON
RESET POWER-UP TIMER (TRPU)
The Reset Power-up timer time-out period (tRPU)
determines how long the device remains in the reset
condition. This is affected by both VDD and temperature.
Typical responses for different VDD values and
temperatures are shown in Figures 2-26, 2-27 and 2-28.
© 2005 Microchip Technology Inc.
DS21906B-page 13
MCP102/103/121/131
Using in PICmicro®
Microcontroller, ICSP™
Applications (MCP121 only)
4.4
Figure 4-5 shows the typical application circuit for using
the MCP121 for voltage superviory function when the
PICmicro microcontroller will be programmed via the
ICSP feature. Additional information is available in
TB087, “Using Voltage Supervisors with PICmicro®
Microcontroller Systems which Implement In-Circuit
Serial Programming™”, DS91087.
Note:
It is recommended that the current into the
RST pin be current limited by a 1 kΩ
resistor.
VDD/VPP
0.1µF
RPU
VDD
MCP121
RST
VSS
1 kΩ
VDD
PICmicro®
MCU
MCLR
(Reset Input)
(Active-low)
VSS
FIGURE 4-5:
Typical Application Circuit
for PICmicro® Microcontroller with the ICSP™
feature.
DS21906B-page 14
© 2005 Microchip Technology Inc.
MCP102/103/121/131
5.0
PACKAGING INFORMATION
5.1
Package Marking Information
3-Lead TO-92
Example:
MCP102
195I
e3
TO^^
547256
XXXXXX
XXXXXX
XXXXXX
YWWNNN
Example:
MCP1xx =
3-Pin SOT-23
Part Number
MCP102 MCP103 MCP121 MCP131
XXNN
Legend: XX...X
Y
WW
NNN
e3
*
Note:
MCP1xxT-195I/TT
JGNN
TGNN
LGNN
KGNN
MCP1xxT-240ETT
JHNN
THNN
LHNN
KHNN
MCP1xxT-270E/TT
JJNN
TJNN
LJNN
KJNN
MCP1xxT-300E/TT
JKNN
TKNN
LKNN
KKNN
MCP1xxT-315E/TT
JLNN
TLNN
LLNN
KLNN
MCP1xxT-450E/TT
JMNN
TMNN
LMNN
KMNN
MCP1xxT-475E/TT
JPNN
TPNN
LPNN
KPNN
Customer-specific information
Year code (last digit of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
© 2005 Microchip Technology Inc.
DS21906B-page 15
MCP102/103/121/131
Package Marking Information (Continued)
Example:
MCP1xx =
3-Pin SC-70
Part Number
MCP102 MCP103 MCP121 MCP131
XXN
YWW
Top Side
Bottom Side
MCP1xxT-195I/LB
BGN
FGN
DGN
CGN
MCP1xxT-240E/LB
BHN
FHN
DHN
CHN
MCP1xxT-270E/LB
BJN
FJN
DJN
CJN
MCP1xxT-300E/LB
BKN
FKN
DKN
CKN
MCP1xxT-315E/LB
BLN
FLN
DLN
CLN
MCP1xxT-450E/LB
BMN
FMN
DMN
CMN
MCP1xxT-475E/LB
BPN
FPN
DPN
CPN
OR
Example:
MCP1xx =
Part Number
MCP102 MCP103 MCP121 MCP131
XXNN
Top Side
DS21906B-page 16
MCP1xxT-195I/LB
BGNN
FGNN
DGNN
CGNN
MCP1xxT-240E/LB
BHNN
FHNN
DHNN
CHNN
MCP1xxT-270E/LB
BJNN
FJNN
DJNN
CJNN
MCP1xxT-300E/LB
BKNN
FKNN
DKNN
CKNN
MCP1xxT-315E/LB
BLNN
FLNN
DLNN
CLNN
MCP1xxT-450E/LB
BMNN
FMNN
DMNN
CMNN
MCP1xxT-475E/LB
BPNN
FPNN
DPNN
CPNN
© 2005 Microchip Technology Inc.
MCP102/103/121/131
3-Lead Plastic Small Outline Transistor (TT) (SOT-23)
E
E1
2
B
p1
n
D
p
1
α
c
A
φ
β
A1
L
Units
Dimension Limits
n
Number of Pins
p
Pitch
p1
Outside lead pitch (basic)
Overall Height
A
Molded Package Thickness
A2
Standoff §
A1
Overall Width
E
Molded Package Width
E1
Overall Length
D
Foot Length
L
φ
Foot Angle
c
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
A2
B
α
β
MIN
.035
.035
.000
.083
.047
.110
.014
0
.004
.015
0
0
INCHES*
NOM
3
.038
.076
.040
.037
.002
.093
.051
.115
.018
5
.006
.017
5
5
MAX
.044
.040
.004
.104
.055
.120
.022
10
.007
.020
10
10
MILLIMETERS
NOM
3
0.96
1.92
0.89
1.01
0.88
0.95
0.01
0.06
2.10
2.37
1.20
1.30
2.80
2.92
0.35
0.45
0
5
0.09
0.14
0.37
0.44
0
5
0
5
MIN
MAX
1.12
1.02
0.10
2.64
1.40
3.04
0.55
10
0.18
0.51
10
10
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: TO-236
Drawing No. C04-104
© 2005 Microchip Technology Inc.
DS21906B-page 17
MCP102/103/121/131
3-Lead Plastic Small Outline Transistor (LB) (SC-70)
E
E1
2
B
p1
3
D
p
1
a
A2
A
c
b
A1
L
Units
Dimension Limits
Number of Pins
Pitch
Outside lead pitch (basic)
Overall Height
Molded Package Thickness
Standoff
Overall Width
Molded Package Width
Overall Length
Foot Length
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
p
p1
A
A2
A1
E
E1
D
L
c
B
a
b
INCHES
MIN
3
.026 BSC.
.051 BSC.
.031
.031
.000
.071
.045
.071
.004
.003
.006
8°
8°
MAX
.043
.039
.0004
.094
.053
.089
.016
.010
.016
12°
12°
MILLIMETERS*
MIN
MAX
3
0.65 BSC.
1.30 BSC.
0.80
1.10
0.80
1.00
0.00
.010
1.80
2.40
1.15
1.35
1.80
2.25
0.10
0.41
0.08
0.25
0.15
0.40
8°
12°
8°
12°
*Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions
shall not exceed .005" (0.127mm) per side.
JEITA (EIAJ) Equivalent: SC70
Drawing No. C04-104
DS21906B-page 18
© 2005 Microchip Technology Inc.
MCP102/103/121/131
3-Lead Plastic Transistor Outline (TO) (TO-92)
E1
D
n
1
L
1
2
3
α
B
p
c
A
R
Units
Dimension Limits
n
p
β
MIN
INCHES*
NOM
MAX
MILLIMETERS
NOM
3
1.27
3.30
3.62
4.45
4.71
4.32
4.64
2.16
2.29
12.70
14.10
0.36
0.43
0.41
0.48
4
5
2
3
MIN
Number of Pins
3
Pitch
.050
Bottom to Package Flat
A
.130
.143
.155
Overall Width
E1
.175
.186
.195
Overall Length
D
.170
.183
.195
Molded Package Radius
R
.085
.090
.095
Tip to Seating Plane
L
.500
.555
.610
c
Lead Thickness
.014
.017
.020
Lead Width
B
.016
.019
.022
α
4
5
6
Mold Draft Angle Top
β
Mold Draft Angle Bottom
2
3
4
*Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: TO-92
Drawing No. C04-101
© 2005 Microchip Technology Inc.
MAX
3.94
4.95
4.95
2.41
15.49
0.51
0.56
6
4
DS21906B-page 19
MCP102/103/121/131
5.2
Product Tape and Reel Specifications
FIGURE 5-1:
EMBOSSED CARRIER DIMENSIONS (8, 12, 16 AND 24 MM TAPE ONLY)
Top
Cover
Tape
A0
W
B0
K0
P
TABLE 1:
Case
Outline
CARRIER TAPE/CAVITY DIMENSIONS
Carrier
Dimensions
Package
Type
W
mm
Cavity
Dimensions
P
mm
A0
mm
B0
mm
K0
mm
Output
Quantity
Units
Reel
Diameter in
mm
TT
SOT-23
3L
8
4
3.15
2.77
1.22
3000
180
LB
SC-70
3L
8
4
2.4
2.4
1.19
3000
180
FIGURE 5-2:
3-LEAD SOT-23/SC70 DEVICE TAPE AND REEL SPECIFICATIONS
User Direction of Feed
Device
Marking
W
PIN 1
P
Standard Reel Component Orientation
DS21906B-page 20
© 2005 Microchip Technology Inc.
MCP102/103/121/131
FIGURE 5-3:
TO-92 DEVICE TAPE AND REEL SPECIFICATIONS
User Direction of Feed
P
Device
Marking
MARK
MARK
MARK
FACE
FACE
FACE
Seal
Tape
Back
Tape
Note:
W
Bent leads are for Tape and Reel only.
© 2005 Microchip Technology Inc.
DS21906B-page 21
MCP102/103/121/131
NOTES:
DS21906B-page 22
© 2005 Microchip Technology Inc.
MCP102/103/121/131
APPENDIX A:
REVISION HISTORY
Revision B (March 2005)
The following is the list of modifications:
1.
2.
3.
4.
5.
Added Section 4.4 “Using in PICmicro®
Microcontroller,
ICSP™
Applications
(MCP121 only)” on using the MCP121 in
PICmicro microcontroller ICSP applications.
Added VODH specifications in Section 1.0
“Electrical
Characteristics” (for
ICSP
applications).
Added Figure 2-33.
Updated SC-70 package markings and added
Pb-free marking information to Section 5.0
“Packaging information”.
Added Appendix A: “Revision History”.
Revision A (August 2004)
• Original Release of this Document.
© 2005 Microchip Technology Inc.
DS21906B-page 23
MCP102/103/121/131
NOTES:
DS21906B-page 24
© 2005 Microchip Technology Inc.
MCP102/103/121/131
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
–
X
/
XX
Examples:
a)
Tape/Reel Monitoring Temperature Package
Range
Option
Options
Device:
Monitoring Options:
Temperature Range:
Package:
XXX
X
MCP102: MicroPower Voltage Supervisor, push-pull
MCP102T: MicroPower Voltage Supervisor, push-pull
(Tape and Reel)
MCP103: MicroPower Voltage Supervisor, push-pull
MCP103T: MicroPower Voltage Supervisor, push-pull
(Tape and Reel)
MCP121 MicroPower Voltage Supervisor, open-drain
MCP121T: MicroPower Voltage Supervisor, open-drain
(Tape and Reel)
MCP131 MicroPower Voltage Supervisor, open-drain
MCP131T: MicroPower Voltage Supervisor, open-drain
(Tape and Reel)
195
240
270
300
315
450
475
=
=
=
=
=
=
=
1.90V
2.32V
2.63V
2.93V
3.08V
4.38V
4.63V
I
E
= -40°C to +85°C (MCP11X-195 only)
= -40°C to +125°C (Except MCP11X-195 only)
b)
a)
b)
a)
b)
TT = SOT-23B, 3-lead
LB = SC-70, 3-lead
TO = TO-92, 3-lead
a)
b)
© 2005 Microchip Technology Inc.
MCP102T-195I/TT: Tape and Reel,
1.95V MicroPower
Voltage Supervisor,
push-pull, -40°C to +85°C,
SOT-23B-3 package.
MCP102-300E/TO: 3.00V MicroPower
Voltage Supervisor,
push-pull,
-40°C to +125°C,
TO-92-3 package.
MCP103T-270E/TT: Tape and Reel,
2.70V MicroPower
Voltage Supervisor,
push-pull,
-40°C to +125°C,
SOT-23B-3 package.
MCP103T-475E/LB: Tape and Reel,
4.75V MicroPower
Voltage Supervisor,
push-pull,
-40°C to +125°C,
SC-70-3 package.
MCP121T-315I/LB: Tape and Reel,
3.15V MicroPower
Voltage Supervisor,
open-drain,
-40°C to +125°C,
SC-70-3 package.
MCP121-300E/TO: 3.00V MicroPower
Voltage Supervisor,
open-drain,
-40°C to +125°C,
TO-92-3 package.
MCP131T-195I/TT: Tape and Reel,
1.95V MicroPower
Voltage Supervisor,
open-drain,
-40°C to +85°C,
SOT-23B-3 package.
MCP131-300E/TO: 3.00V MicroPower
Voltage Supervisor,
open-drain,
-40°C to +125°C,
TO-92-3 package.
DS21906B-page 25
MCP102/103/121/131
NOTES:
DS21906B-page 26
© 2005 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED,
WRITTEN OR ORAL, STATUTORY OR OTHERWISE,
RELATED TO THE INFORMATION, INCLUDING BUT NOT
LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE,
MERCHANTABILITY OR FITNESS FOR PURPOSE.
Microchip disclaims all liability arising from this information and
its use. Use of Microchip’s products as critical components in
life support systems is not authorized except with express
written approval by Microchip. No licenses are conveyed,
implicitly or otherwise, under any Microchip intellectual property
rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART,
PRO MATE, PowerSmart, rfPIC, and SmartShunt are
registered trademarks of Microchip Technology Incorporated
in the U.S.A. and other countries.
AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB,
PICMASTER, SEEVAL, SmartSensor and The Embedded
Control Solutions Company are registered trademarks of
Microchip Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, dsPICDEM,
dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,
FanSense, FlexROM, fuzzyLAB, In-Circuit Serial
Programming, ICSP, ICEPIC, MPASM, MPLIB, MPLINK,
MPSIM, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail,
PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB,
rfPICDEM, Select Mode, Smart Serial, SmartTel, Total
Endurance and WiperLock are trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2005, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 quality system certification for
its worldwide headquarters, design and wafer fabrication facilities in
Chandler and Tempe, Arizona and Mountain View, California in
October 2003. The Company’s quality system processes and
procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
© 2005 Microchip Technology Inc.
DS21906B-page 27
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03/01/05
DS21906B-page 28
© 2005 Microchip Technology Inc.