HI-8570, HI-8571
ARINC 429
+/- 5V Supply Line Driver
August 2013
DESCRIPTION
PIN CONFIGURATION
The HI-8570 and HI-8571 are CMOS integrated circuits
designed to directly drive the ARINC 429 bus in an 8-pin
package. Two logic inputs control a differential voltage
between the output pins producing a +10 volt One, a
-10 volt Zero, and a 0 volt Null.
TX0IN 2
7 TXBOUT
TX1IN 3
6 TXAOUT
GND 4
A logic input is provided to control the slope of the
differential output signal. Timing is set by an on-chip
resistor and capacitor and tested to be within ARINC
requirements.
The HI-8570 has 37.5 ohms in series with each line driver
output. The HI-8571 provides the option to bypass part of
the output resistance so external resistance may be
added for lightning protection circuits.
The HI-8570 or the HI-8571 along with the HI-8588 line
receiver offer the smallest options available to get on and
off theARINC 429 bus.
• Direct ARINC 429 line driver interface
in a small package
• On-chip line driver slope control and
selection by logic input
• Low current 5 volt supplies
V+ = +5V
V- = -5V
FUNCTION TABLE
TXAOUT
TXBOUT
SLOPE
0
0
X
0V
0V
N/A
0
1
0
-5V
5V
10ms
0
1
1
-5V
5V
1.5ms
1
0
0
5V
-5V
10ms
1
0
1
5V
-5V
1.5ms
1
1
X
0V
0V
N/A
PIN DESCRIPTION TABLE
• CMOS / TTL logic pins
• Plastic and ceramic package options surface mount and DIP
• Thermally enhanced SOIC packages
• Extended Temperature and Burn-in
available
(DS8570 Rev. E)
5 V-
SUPPLY VOLTAGES
TX1IN TX0IN SLP1.5
FEATURES
8 V+
SLP1.5 1
PIN
SYMBOL
FUNCTION
DESCRIPTION
1
SLP 1.5
LOGIC INPUT
CMOS OR TTL, V+ IS OK
2
TX0IN
LOGIC INPUT
CMOS OR TTL
3
TX1IN
LOGIC INPUT
CMOS OR TTL
4
GND
POWER
GROUND
5
V-
POWER
-5 VOLTS
6
TXAOUT
OUTPUT
LINE DRIVER TERMINAL A
7
TXBOUT
OUTPUT
LINE DRIVER TERMINAL B
8
V+
POWER
+5 VOLTS
HOLT INTEGRATED CIRCUITS
www.holtic.com
08/13
HI-8570, HI-8571
FUNCTIONAL DESCRIPTION
Figure 1 is a block diagram of the line driver. The +5V and
-5V levels are generated from the supply voltages. Currents for slope control are set by zener voltages across onchip resistors.
A unity gain buffer receives the internally generated slopes
and differentially drives the ARINC line. Current is limited
by the series output resistors at each pin. There are no
fuses at the outputs of the HI-8570 as exists on the HI8382.
The TX0IN and TX1IN inputs receive logic signals from a
control transmitter chip such as the HI-6010, HI-3282, HI8282A, HI-8584 or HI-8783. TXAOUT and TXBOUT hold
each side of the ARINC bus at Ground until one of the
inputs becomes a One. If for example TX1IN goes high, a
charging path is enabled to 5V on an “A” side internal
capacitor while the “B” side is enabled to -5V. The charging current is selected by the SLP1.5 pin. If the SLP1.5
pin is high, the capacitor is nominally charged from 10% to
90% in 1.5µs. If SLP1.5 is low, the rise and fall times are
10µs.
5V
The HI-8570 has 37.5 ohms in series with each output and
the HI-8571 has 27.5 ohms in series with each output.
The HI-8571 is for applications where external series resistance is required, typically for lightning protection devices.
Both the HI-8570 and HI-8571 are built using high-speed
CMOS technology. Care should be taken to ensure the
V+ and V- supplies are locally decoupled and that the
input waveforms are free from negative voltage spikes
which may upset the chip’s internal slope control circuitry.
“A” SIDE
ONE
TXAOUT
CURRENT
CONTROL
NULL
HI-8570 = 37.5 OHMS
HI-8571 = 27.5 OHMS
ZERO
-5V
TX0IN
TX1IN
ESD
PROTECTION
AND
VOLTAGE
TRANSLATION
CONTROL
LOGIC
SLP1.5
5V
“B” SIDE
ONE
TXBOUT
CURRENT
CONTROL
NULL
HI-8570 = 37.5 OHMS
HI-8571 = 27.5 OHMS
ZERO
CONTROL
LOGIC
-5V
FIGURE 1 - LINE DRIVER BLOCK DIAGRAM
5V
1
HARDWIRED
OR
DRIVEN FROM LOGIC
{
2
8
4
APPLICATION INFORMATION
ARINC
Channel
3
Figure 2 shows a possible application
of the HI-8570/8571 interfacing an
ARINC transmit channel from the HI6010.
VCC
TESTA
ROUTA
TESTB
ROUTB
6
RXD1
7
RXD0
HI-8588
RINA
HI-6010
RINB
5
5V
1
6
ARINC
Channel
7
8 BIT BUS
8
V+
SLP1.5
TXAOUT
TX1IN
HI-8570
TXBOUT
GND
4
TX0IN
3
2
TXD1
TXD0
V-
5
-5V
FIGURE 2 - APPLICATION DIAGRAM
HOLT INTEGRATED CIRCUITS
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HI-8570, HI-8571
RECOMMENDED OPERATING CONDITIONS
ABSOLUTE MAXIMUM RATINGS
Supply Voltages
V+....................................+4.8V to +5.3V
V-..................................... -5.3V to -4.8V
Voltages referenced to Ground
Supply voltages
V+....................................................+7V
V-......................................................-7V
Temperature Range
Industrial ........................-40°C to +85°C
Extended......................-55°C to +125°C
DC current per input pin................. ±10mA
Power dissipation at 25°C
plastic DIL............1.0W, derate 10mW/°C
ceramic DIL..........0.5W, derate 7mW/°C
NOTE: Stresses above absolute maximum
ratings or outside recommended operating
conditions may cause permanent damage to
the device. These are stress ratings only.
Operation at the limits is not recommended.
Reflow Solder Temperature ...............260°C
Storage Temperature........-65°C to +150°C
DC ELECTRICAL CHARACTERISTICS
V+ = +5V, V- = -5V, TA = Operating Temperature Range (unless otherwise stated)
PARAMETERS
SYMBOL
Input voltage (TX1IN, TX0IN, SLP1.5)
high
low
VIH
VIL
Input current (TX1IN, TX0IN, SLP1.5)
source
sink
IIH
IIL
TEST CONDITIONS
VIN = 0V
VIN = 5V
MIN
TYP
MAX
UNITS
2.1
-
-
V+
0.5
volts
volts
-
-
0.1
0.1
mA
mA
10.00
-10.00
0
11.00
-9.00
0.50
volts
volts
volts
ARINC output voltage (Differential)
one
zero
null
VDIFF1
VDIFF0
VDIFFN
no load; TXAOUT - TXBOUT
9.00
no load; TXAOUT - TXBOUT -11.00
no load; TXAOUT - TXBOUT -0.50
ARINC output voltage (Ref. to GND)
one or zero
null
VDOUT
VNOUT
no load & magnitude at pin
no load
4.50
-0.25
5.00
0
5.50
0.25
volts
volts
SLP1.5 = V+
TX1IN & TX0IN = 0V: no load
TX0IN & TX1IN = 0V: no load
-10.0
6.0
-6.0
10.0
-
mA
mA
-
37.5
27.5
-
ohms
ohms
Operating supply current
V+
VARINC output impedence
HI-8570
HI-8571
IDD
IEE
ZOUT
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HI-8570, HI-8571
AC ELECTRICAL CHARACTERISTICS
V+ = 5.0V, V- = -5V, TA = Operating Temperature Range (unless otherwise stated)
SYMBOL
PARAMETERS
Line Driver propagation delay
TEST CONDITIONS
MIN
TYP
MAX
UNITS
-
500
500
-
ns
ns
SLP 1.5 = V+
pin 1 = logic 1
1.0
pin 1 = logic 1
1.0
1.5
1.5
2.0
2.0
µs
µs
SLP 1.5 = GND
pin 1 = logic 0
pin 1 = logic 0
5.0
5.0
10.0
10.0
15.0
15.0
µs
µs
-
-
10
pF
defined in Figure 3, no load
Output high to low
Output low to high
t phlx
t plhx
Line Driver transition times
High Speed
Output high to low
Output low to high
t fx
t rx
Low Speed
Output high to low
Output low to high
t fx
t rx
Input capacitance (1)
logic
CIN
Notes:
1. Guaranteed but not tested
5V
0V
pin 3
t phlx
t plhx
t plhx
5V
0V
pin 2
t phlx
t rx
t rx
VDIFF
pin 6 - pin 7
10V
0V
-10V
90%
10%
10%
90%
10%
t fx
t fx
FIGURE 3 - LINE DRIVER TIMING
HOLT INTEGRATED CIRCUITS
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HI-8570, HI-8571
PACKAGE THERMAL CHARACTERISTICS
Maximum ARINC Load
1
PACKAGE STYLE
8 Lead Plastic ESOIC5
ARINC 429
DATA RATE
SUPPLY CURRENT (mA)
2
JUNCTION TEMP, Tj °C
Ta = 25°C
Ta = 85°C
Ta = 125°C
Ta = 25°C
Ta = 85°C
Ta = 125°C
Low Speed3
20.98
20.96
20.96
38.24
98.34
138.92
High Speed4
26.40
26.16
25.96
44.78
104.66
144.59
TXAOUT and TXBOUT Shorted to Ground
1
PACKAGE STYLE
8 Lead Plastic ESOIC
5
ARINC 429
DATA RATE
Low Speed
3
High Speed4
SUPPLY CURRENT (mA)
Ta = 25°C
Ta = 85°C
2
6,7,8
JUNCTION TEMP, Tj °C
Ta = 125°C
Ta = 25°C
Ta = 85°C
Ta = 125°C
30.26
29.22
28.46
53.75
112.76
152.04
30.44
29.42
28.68
53.92
112.95
152.25
Notes:
1. All data taken in still air.
2. At 100% duty cycle, 5V power supplies.
3. Low Speed: Data Rate = 12.5 Kbps, Load: R = 400 Ohms, C = 30 nF.
4. High Speed: Data Rate = 100 Kbps, Load: R = 400 Ohms, C = 10 nF. Data not presented for C = 30 nF
as this is considered unrealistic for high speed operation.
5. 8 Lead Plastic ESOIC (Thermally enhanced SOIC with built in heat sink). Heat sink not soldered.
6. Similar results would be obtained with TXAOUT shorted to TXBOUT.
7. For applications requiring survival with continuous short circuit, operation above Tj = 175°C is not recommended.
8. Data will vary depending on air flow and the method of heat sinking employed.
HOLT INTEGRATED CIRCUITS
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HI-8570, HI-8571
ORDERING INFORMATION
HI - 857x xx x x
PART
NUMBER
Blank
F
PART
NUMBER
LEAD
FINISH
Tin / Lead (Sn / Pb) Solder
100% Matte Tin (Pb-free, RoHS compliant)
TEMPERATURE
RANGE
FLOW
BURN
IN
I
-40°C TO +85°C
I
No
T
-55°C TO +125°C
T
No
M
-55°C TO +125°C
M
Yes
PART
NUMBER
PD
PS
CR
PART
NUMBER
PACKAGE
DESCRIPTION
8 PIN PLASTIC DIP (8P)
8 PIN PLASTIC NARROW BODY ESOIC (8HNE)
8 PIN CERDIP (8D) not available Pb-free
OUTPUT SERIES RESISTANCE
BUILT-IN
REQUIRED EXTERNALLY
8570
37.5 Ohms
0
8571
27.5 Ohms
10 Ohms
Legend: ESOIC - Thermally Enhanced Small Outline Package (SOIC) with built-in heat sink
HOLT INTEGRATED CIRCUITS
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HI-8570, HI-8571
REVISION HISTORY
P/N
DS8570
Rev
E
Date
Description of Change
08/19/13 Remove references to Military temp range. Update Reflow Solder Temperature and change
DC current per input pin to +/-10mA in Absolute Maximum Ratings. Remove Heat Sink note
on p. 5. Update ESOIC-8 package drawing (8HNE).
HOLT INTEGRATED CIRCUITS
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HI-8570 / HI-8571 PACKAGE DIMENSIONS
8-PIN PLASTIC SMALL OUTLINE (ESOIC) - NB
(Narrow Body, Thermally Enhanced)
Top View
.236
BSC
(6.00)
PIN 1
Package Type: 8HNE
Bottom View
.007 ± .003
(.175 ± .075)
.193
BSC
(4.90)
inches (millimeters)
.154 ± .04
(3.90 ± 1.10)
.154
BSC
(3.90)
.119 ± .04
(3.02 ± .97)
Electrically isolated heat
sink pad on bottom of
package
SEE DETAIL A
.016 ± .004
(.410 ± .100)
.056 ± .006
(1.413 ± .163)
Connect to any ground or
power plane for optimum
thermal dissipation
0° to 8°
.100 ± .10
(.04 ± .04)
.050 BSC
(1.27)
BSC = “Basic Spacing between Centers”
is theoretical true position dimension and
has no tolerance. (JEDEC Standard 95)
.033 ± .017
(.835 ± .435)
DETAIL A
8-PIN PLASTIC DIP
inches (millimeters)
Package Type: 8P
.385 ±.015
(9.799 ±.381)
.250 ± .010
(6.350 ±.254)
.100
BSC
(2.54)
.300 ±.010
(7.620 ±.254)
.025 ±.010
(.635 ± .254)
.135 ±.015
(3.429 ±.381)
.1375 ±.0125
(3.493 ±.318)
.0115 ±.0035
(.292 ±.089)
.019 ±.002
(.483 ±.102)
.055 ±.010
(1.397 ±.254)
BSC = “Basic Spacing between Centers”
is theoretical true position dimension and
has no tolerance. (JEDEC Standard 95)
HOLT INTEGRATED CIRCUITS
8
.335 ±.035
(8.509 ±.889)
HI-8570 / HI-8571 PACKAGE DIMENSIONS
8-PIN CERDIP
inches (millimeters)
Package Type: 8D
.380 ±.004
(9.652 ±.102)
.005 min
(.127 min)
.248 ±.003
(6.299 ±.076)
.039 ±.006
(.991 ±.154)
.100
BSC
(2.54)
.015 min
(.381min)
.200 max
(5.080 max)
.314 ±.003
(7.976 ±.076)
Base Plane
.010 ±.006
(.254 ±.152)
Seating Plane
.163 ±.037
(4.140 ±.940)
.056 ±.006
(1.422 ±.152)
.018 ±.006
(.457 ±.152)
BSC = “Basic Spacing between Centers”
is theoretical true position dimension and
has no tolerance. (JEDEC Standard 95)
HOLT INTEGRATED CIRCUITS
9
.350 ±.030
(8.890 ±.762)