Spec. No. : C040H8 Issued Date : 2017.09.18 Revised Date : Page No. : 1/ 11 CYStech Electronics Corp. N-Channel Enhancement Mode Power MOSFET MTE010N10RH8 BVDSS ID@VGS=10V, TC=25°C ID@VGS=10V, TA=25°C RDS(ON)@VGS=10V, ID=15A Features • Low On Resistance • Simple Drive Requirement • Low Gate Charge • Fast Switching Characteristic • Pb-free lead plating and Halogen-free package Symbol 100V 48A 10.8A 8.5mΩ(typ) Outline DFN5×6 MTE010N10RH8 Pin 1 D D D D D D S D G S S S S G：Gate D：Drain S：Source D G S Pin 1 Ordering Information Device MTE010N10RH8-0-T6-G Package DFN 5 ×6 (Pb-free lead plating and halogen-free package) Shipping 3000 pcs / tape & reel Environment friendly grade : S for RoHS compliant products, G for RoHS compliant and green compound products Packing spec, T6 : 3000 pcs / tape & reel,13” reel Product rank, zero for no rank products Product name MTE010N10RH8 CYStek Product Specification Spec. No. : C040H8 Issued Date : 2017.09.18 Revised Date : Page No. : 2/ 11 CYStech Electronics Corp. Absolute Maximum Ratings (TC=25°C, unless otherwise noted) Parameter Symbol Limits Drain-Source Voltage (Note 1) Gate-Source Voltage Continuous Drain Current @TC=25°C, VGS=10V (Note 5) Continuous Drain Current @TC=100°C, VGS=10V (Note 5) Continuous Drain Current @TA=25°C, VGS=10V (Note 2) Continuous Drain Current @TA=70°C, VGS=10V (Note 2) Pulsed Drain Current @ VGS=10V (Note 3) Avalanche Current (Note 3) Single Pulse Avalanche Energy @ L=1mH, ID=26Amps, VDD=25V VDS VGS IDM IAS 100 ±20 48 33.9 10.8 8.6 184 48 EAS 338 5 60 30 2.5 1.6 -55~+175 (Note 4) ID IDSM Repetitive Avalanche Energy (Note 3) EAR TC=25°C TC=100°C Power Dissipation TA=25°C TA=70°C Operating Junction and Storage Temperature (Note 1) PD (Note 1) (Note 2) (Note 2) PDSM Tj, Tstg Unit V A mJ *Drain current limited by maximum junction temperature W °C Thermal Data Parameter Thermal Resistance, Junction-to-case, max Thermal Resistance, Junction-to-ambient, max (Note 2) Symbol RθJC RθJA Value 2.5 50 Unit °C/W Note : 1.The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. 2. The value of RθJA is measured with the device mounted on 1 in² FR-4 board with 2 oz. copper, in a still air environment with TA=25°C. The value in any given application depends on the user’s specific board design. The power dissipation PDSM is based on RθJA and the maximum allowed junction temperature of 150°C, and the maximum temperature of 175°C may be used if the PCB allows it. 3. Pulse width limited by junction temperature TJ(MAX)=175°C. 4. Ratings are based on low frequency and low duty cycles to keep initial TJ=25°C. 100% tested by conditions of VDD=25V, ID=10A, L=2mH, VGS=10V. 5. Calculated continuous drain current based on maximum allowable junction temperature. 6. The static characteristics are obtained using <300μs pulses, duty cycle 0.5% maximum. 7. The RθJA is the sum of thermal resistance from junction to case RθJC and case to ambient. . MTE010N10RH8 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C040H8 Issued Date : 2017.09.18 Revised Date : Page No. : 3/ 11 Characteristics (Tj=25°C, unless otherwise specified) Symbol Static BVDSS ∆BVDSS/∆Tj VGS(th) *GFS IGSS IDSS *RDS(ON) Dynamic *Qg *Qgs *Qgd *td(ON) *tr *td(OFF) *tf Ciss Coss Crss Rg Source-Drain Diode *IS *ISM *VSD *trr *Qrr Min. Typ. Max. Unit Test Conditions 100 2 - 0.07 19.2 8.5 4 ±100 1 5 12 V V/°C V S nA mΩ VGS=0V, ID=250μA Reference to 25°C, ID=250μA VDS = VGS, ID=250μA VDS =10V, ID=20A VGS=±20V, VDS=0V VDS =80V, VGS =0V VDS =80V, VGS =0V, Tj=55°C VGS =10V, ID=15A - 40.3 10.5 12.7 22.6 20.6 43.2 12.2 2392 297 41 0.7 - nC VDS=80V, ID=15A, VGS=10V ns VDS=50V, ID=15A, VGS=10V, RG=1Ω pF VGS=0V, VDS=50V, f=1MHz Ω f=1MHz - 0.82 34 42.4 48 184 1.2 - μA A V ns nC IS=15A, VGS=0V VGS=0V, IF=15A, dIF/dt=100A/μs *Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2% MTE010N10RH8 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C040H8 Issued Date : 2017.09.18 Revised Date : Page No. : 4/ 11 Recommended Soldering Footprint unit : mm MTE010N10RH8 CYStek Product Specification Spec. No. : C040H8 Issued Date : 2017.09.18 Revised Date : Page No. : 5/ 11 CYStech Electronics Corp. Typical Characteristics Brekdown Voltage vs Ambient Temperature Typical Output Characteristics 1.4 90 10V 9V 8V ID, Drain Current(A) 80 70 BVDSS, Normalized Drain-Source Breakdown Voltage 100 7V 60 6V 50 40 30 20 5V 10 1.2 1 0.8 ID=250μA, VGS=0V 0.6 VGS=4.5V 0 0.4 0 1 2 3 4 VDS, Drain-Source Voltage(V) 5 -75 -50 -25 Static Drain-Source On-State resistance vs Drain Current Reverse Drain Current vs Source-Drain Voltage 1.2 VGS=10V VSD, Source-Drain Voltage(V) R DS(ON) , Static Drain-Source On-State Resistance(mΩ) 100 10 1 Tj=25°C 0.8 0.6 Tj=150°C 0.4 0.2 1 0.01 0.1 1 10 ID, Drain Current(A) 0 100 4 8 12 16 IDR , Reverse Drain Current(A) 20 Drain-Source On-State Resistance vs Junction Tempearture Static Drain-Source On-State Resistance vs Gate-Source Voltage 50 2.4 R DS(ON) , Normalized Static DrainSource On-State Resistance R DS(ON) , Static Drain-Source OnState Resistance(mΩ) 0 25 50 75 100 125 150 175 200 Tj, Junction Temperature(°C) ID=15A 40 30 20 10 2 VGS=10V, ID=15A 1.6 1.2 0.8 0.4 RDS(ON) @Tj=25°C :8.5mΩ typ. 0 0 0 MTE010N10RH8 2 4 6 8 VGS, Gate-Source Voltage(V) 10 -75 -50 -25 0 25 50 75 100 125 150 175 200 Tj, Junction Temperature(°C) CYStek Product Specification Spec. No. : C040H8 Issued Date : 2017.09.18 Revised Date : Page No. : 6/ 11 CYStech Electronics Corp. Typical Characteristics(Cont.) Threshold Voltage vs Junction Tempearture Capacitance vs Drain-to-Source Voltage 1.4 VGS(th), NormalizedThreshold Voltage 10000 Capacitance---(pF) Ciss 1000 C oss 100 Crss 1.2 ID=1mA 1 0.8 0.6 ID=250μA 0.4 0.2 10 0 5 10 15 20 25 30 35 40 VDS, Drain-Source Voltage(V) 45 -75 -50 -25 50 0 25 50 75 100 125 150 175 200 Tj, Junction Temperature(°C) Forward Transfer Admittance vs Drain Current Gate Charge Characteristics 10 VDS=50V VDS=5V VGS, Gate-Source Voltage(V) GFS , Forward Transfer Admittance(S) 100 10 VDS=10V 1 0.1 Pulsed Ta=25°C 0.01 0.001 8 VDS=20V 6 VDS=80V 4 2 ID=15A 0 0.01 0.1 1 ID, Drain Current(A) 10 0 100 10 15 20 25 30 35 40 Total Gate Charge---Qg(nC) 45 50 Maximum Drain Current vs Case Temperature Maximum Safe Operating Area 60 1000 ID, Maximum Drain Current(A) RDS(ON) Limited ID, Drain Current(A) 5 100 100μs 10 1ms TC=25°C, Tj=175°C, VGS=10V, RθJC=2.5°C/W Single Pulse 1 10ms 100ms DC 50 40 30 20 10 VGS=10V, RθJC=2.5°C/W 0 0.1 0.1 MTE010N10RH8 1 10 100 VDS, Drain-Source Voltage(V) 1000 25 50 75 100 125 150 TC , Case Temperature(°C) 175 200 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C040H8 Issued Date : 2017.09.18 Revised Date : Page No. : 7/ 11 Typical Characteristics(Cont.) Typical Transfer Characteristics Single Pulse Maximum Power Dissipation 1000 100 900 VDS=10V 80 800 70 700 Power (W) ID, Drain Current (A) 90 60 50 40 600 500 400 30 300 20 200 10 100 0 0 1 2 3 4 5 6 7 8 VGS, Gate-Source Voltage(V) 9 10 TJ(MAX) =175°C TC=25°C RθJC=2.5°C/W 0 0.0001 0.001 0.01 0.1 Pulse Width(s) 1 1.E+00 1.E+01 10 Transient Thermal Response Curves r(t), Normalized Effective Transient Thermal Resistance 1 D=0.5 0.2 1.RθJC(t)=r(t)*RθJC 2.Duty Factor, D=t1/t2 3.TJM-TC=PDM*RθJC(t) 4.RθJC=2.5 °C/W 0.1 0.05 0.1 0.02 0.01 1.E-04 MTE010N10RH8 0.01 Single Pulse 1.E-03 1.E-02 1.E-01 t1, Square Wave Pulse Duration(s) CYStek Product Specification CYStech Electronics Corp. Spec. No. : C040H8 Issued Date : 2017.09.18 Revised Date : Page No. : 8/ 11 Recommended Soldering Footprint & Stencil Design unit : mm MTE010N10RH8 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C040H8 Issued Date : 2017.09.18 Revised Date : Page No. : 9/ 11 Reel Dimension Carrier Tape Dimension Pin #1 MTE010N10RH8 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C040H8 Issued Date : 2017.09.18 Revised Date : Page No. : 10/ 11 Recommended wave soldering condition Product Pb-free devices Peak Temperature 260 +0/-5 °C Soldering Time 5 +1/-1 seconds Recommended temperature profile for IR reflow Profile feature Average ramp-up rate (Tsmax to Tp) Preheat −Temperature Min(TS min) −Temperature Max(TS max) −Time(ts min to ts max) Time maintained above: −Temperature (TL) − Time (tL) Peak Temperature(TP) Time within 5°C of actual peak temperature(tp) Ramp down rate Time 25 °C to peak temperature Sn-Pb eutectic Assembly Pb-free Assembly 3°C/second max. 3°C/second max. 100°C 150°C 60-120 seconds 150°C 200°C 60-180 seconds 183°C 60-150 seconds 240 +0/-5 °C 217°C 60-150 seconds 260 +0/-5 °C 10-30 seconds 20-40 seconds 6°C/second max. 6 minutes max. 6°C/second max. 8 minutes max. Note :1. All temperatures refer to topside of the package, measured on the package body surface. 2.For devices mounted on FR-4 PCB of 1.6mm or equivalent grade PCB. If other grade PCB is used, care should be taken to match the coefficients of thermal expansion between components and PCB. If they are not matched well, the solder joints may crack or the bodies of the parts may crack or shatter as the assembly cools. MTE010N10RH8 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C040H8 Issued Date : 2017.09.18 Revised Date : Page No. : 11/ 11 DFN5×6 Dimension Marking : E010 N10R Device Name Date Code 8-Lead DFN5×6 Plastic Package CYS Package Code : H8 Date Code(counting from left to right) : 1st code: year code, the last digit of Christian year 2nd code : month code, Jan→A, Feb→B, Mar→C, Apr→D, May→E, Jun→F, Jul→G, Aug→H, Sep→J, Oct→K, Nov→L, Dec→M 3rd and 4th codes : prodcution serial number, 01~99 Millimeters Min. Max. 0.900 1.000 0.254 REF 4.944 5.096 5.974 6.126 3.910 4.110 3.375 3.575 4.824 4.976 5.674 5.826 DIM A A3 D E D1 E1 D2 E2 Inches Min. Max. 0.035 0.039 0.010 REF 0.195 0.201 0.235 0.241 0.154 0.162 0.133 0.141 0.190 0.196 0.223 0.229 DIM k b e L L1 H θ Millimeters Min. Max. 1.190 1.390 0.350 0.450 1.270 TYP. 0.559 0.711 0.424 0.576 0.574 0.726 10° 12° Inches Min. Max. 0.047 0.055 0.014 0.018 0.050 TYP. 0.022 0.028 0.017 0.023 0.023 0.029 10° 12° Notes: 1.Controlling dimension: millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office. Material: • Lead: Pure tin plated. • Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0. Important Notice: • All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek. • CYStek reserves the right to make changes to its products without notice. • CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems. • CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance. MTE010N10RH8 CYStek Product Specification