ISL28270, ISL28273, ISL28470 ® Data Sheet October 21, 2009 Dual and Quad Channel Micropower, Single Supply, Rail-to-Rail Input and Output (RRIO) Instrumentation Amplifiers The ISL28270 and ISL28273 are dual channel micropower instrumentation amplifiers (in-amps) and the ISL28470 is a quad channel in-amp optimized for single supply operation over the +2.4V to +5.5V range. All three devices feature an Input Range Enhancement Circuit (IREC) which maintains CMRR performance for input voltages equal to the positive supply and down to 50mV above the negative supply rail. The input signal is capable of swinging above the positive supply rail and to 10mV above the negative supply with only a slight degradation of the CMRR performance. The output operation is rail-to-rail. The ISL28273 is compensated for a minimum gain of 10 or more. For higher gain applications, the ISL28270 and ISL28470 are compensated for a minimum gain of 100. The in-amps have bipolar input devices for best offset and excellent 1/f noise performance. The amplifiers can be operated from one lithium cell or two Ni-Cd batteries. FN6260.6 Features • 150µV Max Offset Voltage (ISL28270, ISL28470) • 600µV Max Offset Voltage (ISL28273) • 2.5nA Max Input Bias Current (ISL28270, ISL28470) • 110dB CMRR • 0.7µV/°C Offset Voltage Temperature Co-efficient • 240kHz -3dB Bandwidth (G = 100) ISL28270, ISL28470 • 230kHz -3dB Bandwidth (G = 10) ISL28273 • Single Supply Operation • Rail-to-Rail Input and Output (RRIO) • Pb-Free (RoHS Compliant) Applications • Battery or Solar-Powered Systems • Strain Gauge • Sensor Signal Conditioning • Medical Devices Ordering Information • Industrial Instrumentations PART NUMBER (Note) PART MARKING PACKAGE (Pb-Free) PKG. DWG. # ISL28270IAZ 28270 IAZ 16 Ld QSOP MDP0040 ISL28270IAZ-T13* 28270 IAZ 16 Ld QSOP MDP0040 ISL28273FAZ 28273 FAZ 16 Ld QSOP MDP0040 ISL28273FAZ-T7* 28273 FAZ 16 Ld QSOP MDP0040 ISL28470FAZ ISL28470 FAZ 28 Ld QSOP MDP0040 ISL28470FAZ-T7 * ISL28470 FAZ 28 Ld QSOP MDP0040 Related Literature • AN1289, ISL28470EVAL1Z Evaluation Board User’s Guide • AN1290, ISL2827xINEVAL1Z Evaluation Board User’s Guide • AN1298, Instrumentation Amplifier Application Note ISL28270INEVAL1Z Evaluation Platform ISL28273INEVAL1Z Evaluation Platform ISL28470EVAL1Z Evaluation Platform *Please refer to TB347 for details on reel specifications. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2006-2009. All Rights Reserved. All other trademarks mentioned are the property of their respective owners. ISL28270, ISL28273, ISL28470 Pinouts ISL28470 (28 LD QSOP) TOP VIEW ISL28270 (16 LD QSOP) TOP VIEW 16 V+ OUT_A 1 OUT_A 2 15 OUT_B FB+_A 2 FB+_A 3 14 FB+_B FB-_A 3 26 FB-_D NC 1 -+ + - 28 OUT_D + - -+ 27 FB+_D FB-_A 4 13 FB-_B IN-_A 4 25 IN-_D IN-_A 5 12 IN-_B IN+_A 5 24 IN+_D IN+_A 6 11 IN+_B EN_A 6 23 EN_D EN_A 7 10 EN_B V+ 7 9 V- 8 NC 22 V- EN_B 8 21 EN_C IN+_B 9 20 IN+_C IN-_B 10 19 IN-_C 18 FB-_C FB-_B 11 FB+_B 12 OUT_B 13 NC 14 + - - + 17 FB+_C 16 OUT_C 15 NC ISL28273 (16 LD QSOP) TOP VIEW 16 V+ NC 1 15 OUT_B OUT_A 2 FB+_A 3 -+ 14 FB+_B 13 FB-_B IN-_A 5 12 IN-_B IN+_A 6 11 IN+_B DNC 7 10 DNC V- 8 2 + - FB-_A 4 9 NC FN6260.6 October 21, 2009 ISL28270, ISL28273, ISL28470 Absolute Maximum Ratings (TA = +25°C) Thermal Information Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V Supply Turn On Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . 1V/µs Input Current (IN, FB) ISL28270, ISL28470 . . . . . . . . . . . . . . . 5mA Differential Input Voltage (IN, FB) ISL28270, ISL28470 . . . . . . 0.5V Input Current (IN, FB) ISL28273 . . . . . . . . . . . . . . . . . . . . . . . . 5mA Differential Input (IN, FB) Voltage ISL28273 . . . . . . . . . . . . . . . 1.0V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V ESD Rating Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kV Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .300V Thermal Resistance (Typical Note 1) θJA (°C/W) 16 Ld QSOP Package . . . . . . . . . . . . . . . . . . . . . . . 110 28 Ld QSOP Package . . . . . . . . . . . . . . . . . . . . . . . 89 Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . .Indefinite Ambient Operating Temperature Range . . . . . . . . .-40°C to +125°C Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . +125°C Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. 1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Electrical Specifications PARAMETER V+ = +5V, V- = 0V VCM = 1/2V+, RL = Open, TA = +25°C, unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +125°C. DESCRIPTION CONDITIONS MIN (Note 2) TYP MAX (Note 2) UNIT DC SPECIFICATIONS VOS TCVOS IOS IB RIN VIN CMRR PSRR Input Offset Voltage Input Offset Voltage Temperature Coefficient ISL28270, ISL28470 -150 -225 ±35 150 225 µV ISL28273 -600 -1000 ±12 600 1000 µV Temperature = -40°C to +125°C 0.7 µV/°C Input Offset Current between IN+ ISL28270 and IN-, and between FB+ and FB- -1 -1.5 ±0.25 1 1.5 nA ISL28470 -1.5 -2.0 ±0.25 1.5 2 nA ISL28273 -1 -1.5 ±0.2 1 1.5 nA ISL28270 -2.0 -2.5 ±0.5 2.0 2.5 nA ISL28470 -2.5 -3.0 ±0.5 2.5 3.0 nA ISL28273 -2.5 -3.0 ±1 2.5 3.0 nA Input Bias Current (IN+, IN-, FB+, and FB- terminals) Input Resistance ISL28270, ISL28470 3 MΩ ISL28273 15 MΩ Input Voltage Range Common Mode Rejection Ratio Power Supply Rejection Ratio 3 0 V 90 110 dB ISL28273 85 110 dB ISL28470 90 85 110 dB 90 110 dB ISL28273 80 75 95 dB ISL28470 90 65 110 dB ISL28270 ISL28270 VCM = 0.05V to 5V 5 V+ = 2.4V to 5V FN6260.6 October 21, 2009 ISL28270, ISL28273, ISL28470 Electrical Specifications PARAMETER EG V+ = +5V, V- = 0V VCM = 1/2V+, RL = Open, TA = +25°C, unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +125°C. (Continued) DESCRIPTION Gain Error CONDITIONS ISL28270, ISL28470 MIN (Note 2) RL = 100kΩ to VCM ISL28273 VOUT Maximum Voltage Swing Output low, 100kΩ to 2.5V Output low, 1kΩ to 2.5V IS,EN IS,DIS Supply Current, Enabled Supply Current, Disabled (ISL28270, ISL28470 Only) TYP MAX (Note 2) % +0.12 % 4 10 mV 130 250 300 mV Output high, 100kΩ to 2.5V 4.990 4.996 V Output high, 1kΩ to GND 4.75 4.70 4.88 V ISL28270, ISL28273 - Both A and B Channels enabled; EN = V- 120 156 195 µA ISL28470 - A, B, C and D Channels enabled; EN = V- 260 335 µA ISL28270 - Both A & B channels disabled; EN = V+ 4 7 9 µA ISL28470 - A, B, C & D channels disabled; EN = V+ 10 12 15 µA VENH EN Pin for Shut-down (ISL28270, ISL28470 Only) VENL EN Pin for Power-On (ISL28270, ISL28470 Only) IENH EN Input Current High (ISL28270, ISL28470 Only) EN = V+ IENL EN Input Current Low (ISL28270, ISL28470 Only) EN = V- Supply Operating Range V+ to V- 2.4 Short Circuit Output Current V+ = 5V, RLOAD = 10Ω ±20 ±18 ±29 RL = 1kΩ to GND, ISL28270, ISL28470 0.3 0.25 0.5 0.7 0.75 RL = 1kΩ to GND, ISL28273 0.35 0.3 0.6 0.75 0.8 VSUPPLY ISC UNIT +0.5 2 V 0.8 V 0.8 1 1.3 µA 26 50 100 nA 5.5 V mA AC SPECIFICATIONS SR -3dB BW Slew Rate -3dB Bandwidth ISL28270, ISL28470 ISL28273 eN Input Noise Voltage ISL28270, ISL28470 Gain = 100 240 kHz Gain = 200 84 kHz Gain = 500 30 kHz Gain = 1000 13 kHz Gain = 10 265 kHz Gain = 20 100 kHz Gain = 50 25 kHz Gain = 100 13 kHz f = 0.1Hz to 10Hz 3.5 µVP-P 3.5 µVP-P 60 nV/√Hz 210 nV/√Hz ISL28273 Input Noise Voltage Density ISL28270, ISL28470 fo = 1kHz ISL28273 iN Input Noise Current Density ISL28270, ISL28sa470 ISL28273 4 V/µs fo = 1kHz 0.37 pA/√Hz 0.75 pA/√Hz FN6260.6 October 21, 2009 ISL28270, ISL28273, ISL28470 Electrical Specifications PARAMETER V+ = +5V, V- = 0V VCM = 1/2V+, RL = Open, TA = +25°C, unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +125°C. (Continued) DESCRIPTION MIN (Note 2) CONDITIONS CMRR @ 60Hz Input Common Mode Rejection Ratio ISL28270, ISL28470 PSRR+ @ 120Hz Power Supply Rejection Ratio (V+) ISL28270, ISL28470 PSRR- @ 120Hz Power Supply Rejection Ratio (V-) ISL28270, ISL28470 ISL28273 ISL28273 ISL28273 TYP MAX (Note 2) UNIT VCM = 1VP-P, RL = 10kΩ to VCM 100 dB 83 dB V+, V- = ±1.2V, ±2.5V, VSOURCE = 1VP-P, RL = 10kΩ to VCM 96 dB 77 dB V+, V- = ±1.2V, ±2.5V, VSOURCE = 1VP-P, RL = 10kΩ to VCM 105 dB 84 dB NOTE: 2. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. Typical Performance Curves 90 V+ = +5V, V- = 0V VCM = 1/2V+, VEN = V-, RL = Open, TA = +25°C, unless otherwise specified. 70 COMMON-MODE INPUT = V+ GAIN = 10,000V/V 80 GAIN = 1000 50 GAIN = 2,000V/V GAIN (dB) GAIN (dB) GAIN = 5,000V/V 70 GAIN = 1,000V/V 60 GAIN = 500V/V 50 20 10 1E+00 30 10 100 1k 10k FREQUENCY (Hz) 100k 1M 60 GAIN (dB) GAIN (dB) 50 GAIN = 2,000V/V GAIN = 1,000V/V GAIN = 500V/V 50 30 GAIN = 100V/V 1 10 40 20 100 1k 10k 100k 1M FREQUENCY (Hz) FIGURE 3. ISL28270, ISL28470 FREQUENCY RESPONSE vs CLOSED LOOP GAIN. V+ = 5V, VCM = 1/2V+ 5 1E+03 1E+04 1E+05 1E+06 COMMON-MODE INPUT = 1/2V+ GAIN = 1000 GAIN = 200 GAIN = 100 GAIN = 50 30 GAIN = 200V/V 40 1E+02 GAIN = 500 GAIN = 5,000V/V 60 1E+01 70 GAIN = 10,000V/V 80 GAIN = 10 FIGURE 2. ISL28273 FREQUENCY RESPONSE vs CLOSED LOOP GAIN, VCM = V+ = 5V COMMON-MODE INPUT = 1/2V+ 70 GAIN = 50 FREQUENCY (Hz) FIGURE 1. ISL28270, ISL28470 FREQUENCY RESPONSE vs CLOSED LOOP GAIN, VCM = V+ = 5V 90 GAIN = 100 GAIN = 20 GAIN = 100V/V 1 GAIN = 500 GAIN = 200 40 30 GAIN = 200V/V 40 COMMON-MODE INPUT = V+ 60 10 1E+00 GAIN = 20 GAIN = 10 1E+01 1E+02 1E+03 1E+04 FREQUENCY (Hz) 1E+05 1E+06 FIGURE 4. ISL28273 FREQUENCY RESPONSE vs CLOSED LOOP GAIN. V+ = 5V, VCM = 1/2V+ FN6260.6 October 21, 2009 ISL28270, ISL28273, ISL28470 Typical Performance Curves 90 V+ = +5V, V- = 0V VCM = 1/2V+, VEN = V-, RL = Open, TA = +25°C, unless otherwise specified. (Continued) 70 COMMON-MODE INPUT = V- + 10mV GAIN = 10,000V/V 80 COMMON-MODE INPUT = V- + 10mV GAIN = 1000 60 GAIN = 500 GAIN = 5,000V/V GAIN = 2,000V/V 50 GAIN (dB) GAIN (dB) 70 GAIN = 1,000V/V 60 GAIN = 500V/V 50 30 GAIN = 100V/V 1 10 GAIN = 50 GAIN = 20 GAIN = 10 20 100 1k 10k FREQUENCY (Hz) 100k 10 1E+00 1M FIGURE 5. ISL28270, ISL28470 FREQUENCY RESPONSE vs CLOSED LOOP GAIN, V+ = 5V, VCM = 10mV 1E+01 1E+02 1E+03 1E+04 FREQUENCY (Hz) V+ = 5V 20 35 V+ = 3.3V 25 GAIN (dB) V+ = 3.3V 30 V+ = 2.4V 20 AV = 100 RL = 10kΩ CL = 10pF RF/RG = 99.02 RF = 221kΩ RG = 2.23kΩ 15 10 5 0 100 1k 15 10 5 10k 100k V+ = 2.4V AV = 10 R = 10kΩ CL = 10pF RF/RG = 9.08Ω RF = 178kΩ RG = 19.6kΩ 0 100 1M 1k FIGURE 7. ISL28270, ISL28470 FREQUENCY RESPONSE vs SUPPLY VOLTAGE 30 45 25 1k CL = 56pF CL = 27pF 15 CL = 2.7pF 10 5 10k 100k 1M FREQUENCY (Hz) FIGURE 9. ISL28270, ISL28470 FREQUENCY RESPONSE vs CLOAD 6 CL = 100pF 20 GAIN (dB) GAIN (dB) CL = 820pF CL = 220pF 25 100 1M CL = 47pF 40 AV = 100 V+, V- = ±2.5V RL = 10kΩ RF/RG = 99.02 RF = 221kΩ RG = 2.23kΩ 100k FIGURE 8. ISL28273 FREQUENCY RESPONSE vs SUPPLY VOLTAGE 50 CL = 470pF 10k FREQUENCY (Hz) FREQUENCY (Hz) 30 1E+06 25 V+ = 5V 40 35 1E+05 FIGURE 6. ISL28273 FREQUENCY RESPONSE vs CLOSED LOOP GAIN, V+ = 5V, VCM = 10mV 45 GAIN (dB) GAIN = 100 40 30 GAIN = 200V/V 40 GAIN = 200 AV = 10 V+ = 5V RL = 10kΩ RF/RG = 9.08Ω RF = 178kΩ RG = 19.6kΩ 0 100 1k 10k 100k 1M FREQUENCY (Hz) FIGURE 10. ISL28273 FREQUENCY RESPONSE vs CLOAD FN6260.6 October 21, 2009 ISL28270, ISL28273, ISL28470 V+ = +5V, V- = 0V VCM = 1/2V+, VEN = V-, RL = Open, TA = +25°C, unless otherwise specified. (Continued) 160 160 140 140 120 120 100 CMRR (dB) CMRR (dB) Typical Performance Curves VCM = 1V VCM = 100mV 80 60 40 0 10 VCM = 1V 80 VCM = 100mV 60 40 V+ = 5V RL = 10k AV = +1 20 100 V+ = 5V RL = 10k AV = +1 20 100 1k 10k 100k 1M 0 10M 10 100 FIGURE 11. ISL28270, ISL28470 CMRR vs FREQUENCY 10k 100k 1M 10M FIGURE 12. ISL28273 CMRR vs FREQUENCY 90 140 80 120 PSRR+ 70 PSRR+ 100 60 PSRR (dB) PSRR (dB) 1k FREQUENCY (Hz) FREQUENCY (Hz) 80 PSRR- 60 50 PSRR- 40 30 40 20 20 0 10 10 100 1k 10k FREQUENCY (Hz) 100k 0 10 1M FIGURE 13. ISL28270, ISL28470 PSRR vs FREQUENCY 100k 1M FIGURE 14. ISL28273 PSRR vs FREQUENCY INPUT VOLTAGE NOISE (µV/√Hz) INPUT VOLTAGE NOISE (nV/√Hz) 1k 10k FREQUENCY (Hz) 2.5 250 200 150 100 50 100 2.0 1.5 1.0 0.5 0.0 1 10 100 1k 10k FREQUENCY (Hz) FIGURE 15. ISL28270, ISL28470 INPUT VOLTAGE NOISE SPECTRAL DENSITY (GAIN = 100) 7 100k 1 10 100 1k 10k 100k FREQUENCY (Hz) FIGURE 16. ISL28273 INPUT VOLTAGE NOISE SPECTRAL DENSITY (GAIN = 10) FN6260.6 October 21, 2009 ISL28270, ISL28273, ISL28470 Typical Performance Curves V+ = +5V, V- = 0V VCM = 1/2V+, VEN = V-, RL = Open, TA = +25°C, unless otherwise specified. (Continued) 5.0 4.5 0.9 0.8 0.7 0.6 0.5 0.4 0.3 4.0 CURRENT NOISE (pA/√Hz) CURRENT NOISE (pA/√Hz) 1.0 1 10 100 1k 10k 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 100k 1 10 100 FREQUENCY (Hz) 10k 100k FREQUENCY (Hz) FIGURE 17. ISL28270, ISL28470 INPUT CURRENT NOISE SPECTRAL DENSITY (GAIN = 100) VOLTAGE NOISE (0.5µV/DIV) VOLTAGE NOISE (0.5µV/DIV) FIGURE 18. ISL28273 INPUT CURRENT NOISE SPECTRAL DENSITY (GAIN = 10) TIME (1s/DIV) TIME (1s/DIV) FIGURE 20. ISL28273 0.1Hz TO 10Hz INPUT VOLTAGE NOISE (GAIN = 10) FIGURE 19. ISL28270, ISL28470 0.1Hz TO 10Hz INPUT VOLTAGE NOISE (GAIN = 100) 100 0.5 80 0.4 60 0.3 40 0.2 20 I-BIAS (nA) VOS (µV) 1k 0 -20 -40 0.1 0 -0.1 -0.2 -60 -0.3 -80 -0.4 -100 -1 0 1 2 3 VCM (V) 4 5 6 FIGURE 21. INPUT OFFSET VOLTAGE vs COMMON MODE VOLTAGE, V+ = 5V 8 -0.5 -1 0 1 2 3 VCM (V) 4 5 6 7 FIGURE 22. INPUT BIAS CURRENT vs COMMON MODE VOLTAGE, V+ = 5V FN6260.6 October 21, 2009 ISL28270, ISL28273, ISL28470 Typical Performance Curves V+ = +5V, V- = 0V VCM = 1/2V+, VEN = V-, RL = Open, TA = +25°C, unless otherwise specified. (Continued) 170 n = 1000 n = 1000 SUPPLY CURRENT (µA) SUPPLY CURRENT (µA) 4.7 160 MAX 150 140 MEDIAN MIN 130 120 MAX 4.2 MEDIAN 3.7 MIN 3.2 110 100 -40 -20 0 20 40 60 80 100 2.7 -40 120 -20 0 20 40 FIGURE 23. SUPPLY CURRENT (CHANNEL A AND CHANNEL B) vs TEMPERATURE, V+, V- = ±2.5V, VIN = 0V, RL = INF 2.0 1.5 3 MAX MAX 2 IBIAS FB+ (nA) IBIAS IN+ (nA) 120 n = 1000 n = 1000 MEDIAN 0 -1 1.0 0.5 MEDIAN 0 -0.5 MIN MIN -1.0 -2 -40 -20 0 20 40 60 80 100 -1.5 -40 120 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 25. IBIAS IN+ vs TEMPERATURE, V+, V- = ±2.5V FIGURE 26. IBIAS FB+ vs TEMPERATURE, V+, V- = ±2.5V 3 2.5 n = 1000 n = 1000 2.0 2 MAX MAX 1.5 IBIAS FB - (nA) IBIAS IN- (nA) 100 FIGURE 24. ISL28270, ISL28470 DISABLED SUPPLY CURRENT (CHANNEL A AND B) vs TEMPERATURE V+ = ±2.5V, VIN = 0V, RL = INF 4 -3 80 TEMPERATURE (°C) TEMPERATURE (°C) 1 60 1 MEDIAN 0 -1 1.0 MEDIAN 0.5 0 MIN -0.5 -2 MIN -1.0 -3 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) FIGURE 27. IBIAS IN- vs TEMPERATURE, V+, V- = ±2.5V 9 -1.5 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) FIGURE 28. IBIAS FB- vs TEMPERATURE, V+, V- = ±2.5V FN6260.6 October 21, 2009 ISL28270, ISL28273, ISL28470 Typical Performance Curves V+ = +5V, V- = 0V VCM = 1/2V+, VEN = V-, RL = Open, TA = +25°C, unless otherwise specified. (Continued) 3.5 4 n = 1000 MAX 3.0 3 2.5 IBIAS FB+ (nA) 2 IBIAS IN+ (nA) n = 1000 MEDIAN 1 0 MIN -1 2.0 MAX 1.5 1.0 MEDIAN 0.5 0 -0.5 -2 -3 MIN -1.0 -40 -20 0 20 40 60 80 100 120 -1.5 -40 -20 0 20 TEMPERATURE (°C) FIGURE 29. IBIAS IN+ vs TEMPERATURE, V+, V- = ±1.2V 60 80 100 120 FIGURE 30. IBIAS FB+ vs TEMPERATURE, V+, V- = ±1.2V 4 3.5 n = 1000 MAX 3 3.0 n = 1000 2.5 2 MEDIAN IBIAS FB- (nA) IBIAS IN- (nA) 40 TEMPERATURE (°C) 1 0 MIN -1 MAX 2.0 1.5 MEDIAN 1.0 0.5 0 -0.5 -2 MIN -1.0 -3 -40 -20 0 20 40 60 80 100 -1.5 120 -40 -20 0 TEMPERATURE (°C) 20 FIGURE 31. IBIAS IN- vs TEMPERATURE, V+, V- = ±1.2V 1.5 0.3 1.0 IOS FB+ (nA) IOS IN+ (nA) 0.1 MEDIAN MEDIAN 0 -0.5 MIN MIN -1.0 -0.2 -1.5 20 40 60 80 100 120 TEMPERATURE (°C) FIGURE 33. IOS IN+ vs TEMPERATURE, V+, V- = ±2.5V 10 120 0.5 -0.1 0 100 MAX MAX 0.2 -20 80 n = 1000 n = 1000 -0.3 -40 60 FIGURE 32. IBIAS FB- vs TEMPERATURE, V+, V- = ±1.2V 0.4 0.0 40 TEMPERATURE (°C) -40 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) FIGURE 34. IOS FB+ vs TEMPERATURE, V+, V- = ±2.5V FN6260.6 October 21, 2009 ISL28270, ISL28273, ISL28470 Typical Performance Curves V+ = +5V, V- = 0V VCM = 1/2V+, VEN = V-, RL = Open, TA = +25°C, unless otherwise specified. (Continued) 1.5 1.5 n = 1000 n = 1000 1.0 1.0 MAX IOS FB + (nA) IOS IN + (nA) MAX 0.5 MEDIAN 0.0 -0.5 0.5 -0.5 MIN -1.0 -1.5 -40 -20 0 20 40 60 MEDIAN 0.0 -1.0 80 100 MIN -1.5 -40 120 -20 0 20 TEMPERATURE (°C) FIGURE 35. IOS IN+ vs TEMPERATURE, V+, V- = ±1.2V 250 40 60 80 100 120 TEMPERATURE (°C) FIGURE 36. IOS FB+ vs TEMPERATURE, V+, V- = ±1.2V 700 n = 1000 n = 1000 200 500 MAX 150 300 50 VOS (µV) VOS (µV) 100 MEDIAN 0 MAX MEDIAN 100 -100 -50 MIN -100 -300 MIN -150 -200 -40 -20 0 20 40 60 80 100 120 -500 -40 -20 0 FIGURE 37. ISL28270, ISL28470 VOS vs TEMPERATURE, V+, V- = ±2.5V 800 1.5 MAX 100 120 MAX 0.5 VOS (µV) VOS (µV) 80 n = 1000 1.0 400 200 MEDIAN 0 -200 MEDIAN 0 -0.5 -400 -600 -1.0 MIN MIN -800 -1000 -40 60 FIGURE 38. ISL28270, ISL28470 VOS vs TEMPERATURE, V+, V- = ±1.2V n = 1000 600 40 TEMPERATURE (°C) TEMPERATURE (°C) 1000 20 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) FIGURE 39. ISL28273 VOS vs TEMPERATURE, V+, V- = ±2.5V 11 -1.5 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) FIGURE 40. ISL28273 VOS vs TEMPERATURE, V+, V- = ±1.2V FN6260.6 October 21, 2009 ISL28270, ISL28273, ISL28470 Typical Performance Curves V+ = +5V, V- = 0V VCM = 1/2V+, VEN = V-, RL = Open, TA = +25°C, unless otherwise specified. (Continued) 140 135 n = 1000 n = 1000 MAX MAX 125 120 PSRR (dB) CMRR (dB) 130 MEDIAN 110 100 115 105 MEDIAN 95 MIN 90 85 80 -40 75 -40 MIN -20 0 20 40 60 80 100 120 -20 0 TEMPERATURE (°C) FIGURE 41. CMRR vs TEMPERATURE, VCM = +2.5V TO -2.5V, V+, V- = ±2.5V 60 80 100 120 0.6 n = 1000 n = 1000 MAX 0.5 GAIN ERROR (%) 0.5 GAIN ERROR (%) 40 FIGURE 42. PSRR vs TEMPERATURE, V+, V- = ±1.2V TO ±2.5V 1.0 0 MEDIAN -0.5 -1.0 MIN MAX 0.4 0.3 0.2 MEDIAN -1.5 0.1 -2.0 -40 0.0 -40 -20 0 20 40 60 80 TEMPERATURE (°C) 100 120 MIN -20 0 20 40 60 80 100 120 TEMPERATURE (°C) FIGURE 44. ISL28273 % GAIN ERROR vs TEMPERATURE, RL = 100k FIGURE 43. ISL28270, ISL28470 % GAIN ERROR vs TEMPERATURE, RL = 100k 4.91 20 TEMPERATURE (°C) 170 n = 1000 n = 1000 4.90 160 MAX 150 MEDIAN VOUT (mV) VOUT (V) 4.89 4.88 4.87 MIN 4.86 140 MIN 130 MAX 120 4.85 110 4.84 -40 100 -40 MEDIAN -20 0 20 40 60 80 100 120 TEMPERATURE (°C) FIGURE 45. VOUT HIGH vs TEMPERATURE, RL = 1k, V+, V- = ±2.5V 12 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) FIGURE 46. VOUT LOW vs TEMPERATURE, RL = 1k, V+, V- = ±2.5V FN6260.6 October 21, 2009 ISL28270, ISL28273, ISL28470 Typical Performance Curves V+ = +5V, V- = 0V VCM = 1/2V+, VEN = V-, RL = Open, TA = +25°C, unless otherwise specified. (Continued) 0.75 0.80 n = 1000 0.70 0.65 0.60 MEDIAN 0.55 0.50 0.45 0.70 0.65 0.60 MEDIAN 0.55 0.50 MIN 0.40 0.35 -40 MAX 0.75 - SLEW RATE (V/µs) + SLEW RATE (V/µs) n = 1000 MAX 0.45 MIN -20 0 20 40 60 80 100 120 TEMPERATURE (°C) 0.40 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) FIGURE 48. - SLEW RATE vs TEMPERATURE, INPUT = ±0.15V AT GAIN = +10 FIGURE 47. + SLEW RATE vs TEMPERATURE, INPUT = ±0.015V AT GAIN = +10 Pin Descriptions ISL28270 ISL28273 ISL28470 16 Ld QSOP 16 Ld QSOP 28 Ld QSOP PIN NAME EQUIVALENT CIRCUIT 2, 15 2, 15 1, 13 16, 28 OUT_A,B C_D Circuit 3 3, 14 3, 14 2, 12 17, 27 FB+_A,B C_D Circuit 1A, Circuit 1B PIN FUNCTION Output Voltage. A complementary Class AB common-source output stage drives the output of each channel. When disabled, the outputs are in a high impedance state Positive Feedback high impedance terminals. ISL28270 and ISL28470 input circuit is shown in Circuit 1A, and the ISL28273 input circuit is shown in Circuit 1B. It can be used as a REF terminal to adjust or level shift the output. ISL28273: to avoid offset drift, it is recommended that the terminals of the ISL28273 are not overdriven beyond 1V and the input current must never exceed 5mA. 4, 13 4, 13 3, 11 18, 26 FB-_A,B C_D Circuit 1A, Circuit 1B Negative Feedback high impedance terminals. The FB- pins connect to an external resistor divider to individually set the desired gain of the inamp. ISL28270 and ISL28470 input circuit is shown in Circuit 1A, and the ISL28273 input circuit is shown in Circuit 1B. ISL28273: to avoid offset drift, it is recommended that the terminals of the ISL28273 are not overdriven beyond 1V and the input current must never exceed 5mA. 5, 12 5, 12 4, 10 19, 25 IN-_A,B C_D Circuit 1A, Circuit 1B High impedance Inverting input terminals. Connect to the low side of the input source signal. ISL28270 and ISL28470 input circuit is shown in Circuit 1A, and the ISL28273 input circuit is shown in Circuit 1B. ISL28273: to avoid offset drift, it is recommended that the terminals of the ISL28273 are not overdriven beyond 1V and the input current must never exceed 5mA. 6, 11 6, 11 5, 9 20, 24 IN+_A,B C_D Circuit 1A, Circuit 1B High impedance Non-inverting input terminals. Connect to the high side of the input source signal. ISL28270 and ISL28470 input circuit is shown in Circuit 1A, and the ISL28273 input circuit is shown in Circuit 1B. ISL28273: to avoid offset drift, it is recommended that the terminals of the ISL28273 are not overdriven beyond 1V and the input current must never exceed 5mA. 7, 10 6, 8 21, 23 13 EN_A,B C_D Circuit 2 Active LOW logic pins. When pulled above 2V, the corresponding channel turns off and OUT is high impedance. A channel is enabled when pulled below 0.8V. Built-in pull downs define each EN pin LOW when left floating. FN6260.6 October 21, 2009 ISL28270, ISL28273, ISL28470 Pin Descriptions (Continued) ISL28270 ISL28273 ISL28470 16 Ld QSOP 16 Ld QSOP 28 Ld QSOP PIN NAME EQUIVALENT CIRCUIT PIN FUNCTION 16 16 7 V+ Circuit 4 Positive Supply terminal shared by all channels. 8 8 22 V- Circuit 4 Negative Supply terminal shared by all channels. Grounded for single supply operation. 1, 9 1, 9 14,15 NC 7, 10 No Connect, pins can be left floating or grounded. DNC Do Not Connect: Internal connection- Must be left floating. V+ V+ V+ IN+ FB+ INFB- LOGIC PIN CAPACITIVELY COUPLED ESD CLAMP OUT V- V- V- CIRCUIT 1A V+ CIRCUIT 2 VCIRCUIT 3 CIRCUIT 4 V+ INFB- IN+ FB+ V- CIRCUIT 1B Application Information Product Description The ISL28270 and ISL28273 are dual channel micro-power instrumentation amplifiers (in-amps) and the ISL28470 is a quad channel which deliver rail-to-rail input amplification and rail-to-rail output swing. The in-amps also deliver excellent DC and AC specifications while consuming only about 60µA per channel. Because the independent pair of feedback terminals set the gain and adjust the output zero level, the ISL28270, ISL28273 and ISL28470 achieve high CMRR regardless of the tolerance of the gain setting resistors. The ISL28270 and ISL28470 are internally compensated for a minimum gain of 100. The ISL28273 is internally compensated for a minimum gain of 10. Input Protection All input terminals and feedback terminals have internal ESD protection diodes to both positive and negative supply rails, limiting the input voltage to within one diode beyond the supply rails. Input signals originating from low impedance sources should have current limiting resistors in series with the IN+ and IN- pins to prevent damaging currents during power supply sequencing and other transient conditions. The ISL28270 and ISL28470 have additional back-to-back diodes across the input terminals and also across the feedback terminals. If overdriving the inputs is necessary, the external input current must never exceed 5mA. External series resistors may be used as an external protection to limit excessive external voltage and current from damaging 14 the inputs. On the other hand, the ISL28273 has no clamps to limit the differential voltage on the input terminals allowing higher differential input voltages at lower gain applications. It is recommended, however, that the terminals of the ISL28273 are not overdriven beyond 1V to avoid offset drift. Input Stage and Input Voltage Range The input terminals (IN+ and IN-) of the in-amps are a single differential pair of bipolar PNP devices aided by an Input Range Enhancement Circuit (IREC), to increase the headroom of operation of the common-mode input voltage. The feedback terminals (FB+ and FB-) also have a similar topology. As a result, the input common-mode voltage range is rail-to-rail regardless of the feedback terminal settings and regardless of the gain settings. They are able to handle input voltages that are at or slightly beyond the supply and close to ground making these in-amps well suited for single 5V down to 2.4V supply systems. There is no need to bias the common-mode input to achieve symmetrical input voltage. It is recommended however that the common-mode input be biased at least 10mV above the negative supply rail to achieve top performance. See “Input Bias Cancellation/Compensation” on page 15. The IREC enables rail-to-rail input amplification without the problems usually associated with the dual differential stage topology. The IREC ensures that there are no drastic changes in offset voltage over the entire range of the input. See Input Offset Voltage vs Common-Mode Input Voltage on page 8. IREC also cures the abrupt change and even reverse polarity of the input bias current over the whole FN6260.6 October 21, 2009 ISL28270, ISL28273, ISL28470 range of input. See Input Bias Current vs Common-Mode Input Voltage on page 8. 2.4V TO 5.5V (ISL28270, ISL28470) Input Bias Cancellation/Compensation IN+ All three parts have an Input Bias Cancellation/Compensation Circuit for both the input and feedback terminals (IN+, IN-, FB+ and FB-), achieving a low input bias current throughout the input common-mode range and the operating temperature range. While the PNP bipolar input stages are biased with an adequate amount of biasing current for speed and increased noise performance, the Input Bias Cancellation/Compensation Circuit sinks most of the base current of the input transistors leaving a small portion as input bias current, typically 500pA. In addition, the Input Bias Cancellation/Compensation Circuit maintains a smooth and flat behavior of input bias current over the common mode range and over the operating temperature range. The Input Bias Cancellation/Compensation Circuit operates from input voltages of 10mV above the negative supply to input voltages slightly above the positive supply. See Input Bias Current vs Common-Mode Input Voltage in the “Typical Performance Curves” on page 8. Output Stage and Output Voltage Range A Class AB common-source output stage drives the output. The pair of complementary MOSFET devices drive the output VOUT to within a few millivolts of the supply rails. At a 100kΩ load, the PMOS sources current and pulls the output up to 4mV below the positive supply. The NMOS sinks current and pulls the output down to 4mV above the negative supply, or ground in the case of a single supply operation. The current sinking and sourcing capability are internally limited to 29mA. When disabled, the outputs are in a high impedance state. IN+ IN- IN- V+ + - FB+ FB- VCM VOUT + - RG V- RF FIGURE 49. GAIN IS SET BY TWO EXTERNAL RESISTORS, RF AND RG Reference Connection Unlike a 3 op amp in-amp realization, a finite series resistance seen at the REF terminal does not degrade the high CMRR performance, eliminating the need for an additional external buffer amplifier. Figure 50 uses the FB+ pin to provide a high impedance REF terminal. 2.4V TO 5.5V (ISL28270, ISL28470) IN+ IN+ ININ- FB+ 2.9V to 5.5V VCM FB- V+ + - VOUT + - V- R1 REF Gain Setting VIN, the potential difference across IN+ and IN-, is replicated (less the input offset voltage) across FB+ and FB-. The function of the in-amp is to maintain the differential voltage across FB- and FB+ equal to IN+ and IN-; (FB- - FB+) = (IN+ - IN-). Consequently, the transfer function can be derived. The in-amp gain is set by two external resistors, the feedback resistor RF, and the gain resistor RG. R2 RG RF FIGURE 50. GAIN SETTING AND REFERENCE CONNECTION VIN = IN+ – INRF ⎞ RF ⎞ ⎛ ⎛ VOUT = ⎜ 1 + --------⎟ ( VIN ) + ⎜ 1 + --------⎟ ( VREF ) R G⎠ R G⎠ ⎝ ⎝ VIN = IN+ – INRF ⎞ ⎛ VOUT = ⎜ 1 + --------⎟ VIN R ⎝ G⎠ (EQ. 1) In Figure 49, the FB+ pin and one end of resistor RG are connected to GND. With this configuration, Equation 1 is only true for a positive swing in VIN; negative input swings will be ignored because the output will be at ground. (EQ. 2) The FB+ pin is used as a REF terminal to center or to adjust the output. Because the FB+ pin is a high impedance input, an economical resistor divider can be used to set the voltage at the REF terminal without degrading or affecting the CMRR performance. Any voltage applied to the REF terminal will shift VOUT by VREF times the closed loop gain, which is set by resistors RF and RG. Note that any noise or unwanted signals on the reference supply will be amplified at the output according to Equation 2. See Figure 50. The FB+ pin can also be connected to the other end of resistor, RG. See Figure 51. Keeping the basic concept that 15 FN6260.6 October 21, 2009 ISL28270, ISL28273, ISL28470 the in-amp maintains constant differential voltage across the input terminals and feedback terminals (FB- - FB+) = (IN+ - IN-), the transfer function of Figure 51 can be derived from Equation 3. Note that the VREF gain term is eliminated, and susceptibility to external noise is reduced. 2.4V TO 5.5V (ISL28270, ISL28470) IN+ IN+ IN- IN- FB+ FB- VCM V+ + VOUT + RG ERF = Tolerance of RF EG = Gain Error of the ISL28270 The term [1 - (ERG +ERF +EG)] is the deviation from the theoretical gain. Thus, (ERG +ERF +EG) is the total gain error. For example, if 1% resistors are used, the total gain error would be shown in Equation 6. (EQ. 6) TotalGainError = ± ( 0.01 + 0.01 + 0.005 ) = ± 2.5% Disable/Power-Down V- RS VREF ERG = Tolerance of RG TotalGainError = ± ( E RG + E RF + E G ( typical ) ) - - Where: RF FIGURE 51. REFERENCE CONNECTION WITH AN AVAILABLE VREF VIN = IN+ – INRS + RF VOUT = 1 + ---------------------- + VREF RG (EQ. 3) RF ⎞ ⎛ VOUT = ⎜ 1 + --------⎟ ( VIN ) + ( VREF ) R ⎝ G⎠ (EQ. 4) A finite resistance RS in series with the VREF source, adds an output offset of VIN*(RS/RG). As the series resistance RS approaches zero, Equation 3 is simplified to Equation 4 for Figure 51. VOUT is simply shifted by an amount VREF. External Resistor Mismatches Because of the independent pair of feedback terminals provided by the in-amps, the CMRR is not degraded by any resistor mismatches. Hence, unlike a three op amp and especially a two op amp in-amp realization, the ISL28270, ISL28273 and ISL28470 reduce the cost of external components by allowing the use of 1% or more tolerance resistors without sacrificing CMRR performance. The CMRR will be typically 110dB regardless of the tolerance of the resistors used. Instead, a resistor mismatch results in a higher deviation from the theoretical gain - gain error. The ISL28270 and ISL28470 have an enable/disable pin for each channel. They can be powered down to reduce the supply current to typically 4µA when all channels are off. When disabled, the corresponding output is in a high impedance state. The active low EN pin has an internal pull down and hence can be left floating and the in-amp enabled by default. When the EN is connected to an external logic, the in-amp will shutdown when EN pin is pulled above 2V, and will power up when EN bar is pulled below 0.8V. Unused Channels The ISL28270, ISL28273 and ISL28470 are dual and quad channel op amps. If the application only requires one channel when using the ISL28270, ISL28273 or less than 4 channels when using the ISL28470, the user must configure the unused channel(s) to prevent them from oscillating. The unused channel(s) will oscillate if the input and output pins are floating. This will result in higher than expected supply currents and possible noise injection into the channel being used. The proper way to prevent this oscillation is to short the IN+ and IN- terminals to ground and short the FB+, FBand the output terminals to ground as shown in Figure 52. IN+ + 1/2 ISL28270, ISL28273 1/4 ISL28470 INFB+ FB- + - Gain Error and Accuracy The gain error indicated in the “Electrical Specifications” table on page 4 is the inherent gain error alone. The gain error specification listed does not include the gain error contributed by the resistors. There is an additional gain error due to the tolerance of the resistors used. The resulting non-ideal transfer function effectively becomes: (see Equation 5) RF ⎞ ⎛ VOUT = ⎜ 1 + --------⎟ × [ 1 ± ( E RG + E RF + E G ) ] × VIN R G⎠ ⎝ 16 FIGURE 52. PREVENTING OSCILLATIONS IN UNUSED CHANNELS (EQ. 5) FN6260.6 October 21, 2009 ISL28270, ISL28273, ISL28470 Power Dissipation It is possible to exceed the +150°C maximum junction temperatures under certain load and power-supply conditions. It is therefore important to calculate the maximum junction temperature (TJMAX) for all applications to determine if power supply voltages, load conditions, or package type need to be modified to remain in the safe operating area. These parameters are related in Equation 7: T JMAX = T MAX + ( θ JA xPD MAXTOTAL ) (EQ. 7) where: • PDMAXTOTAL is the sum of the maximum power dissipation of each amplifier in the package (PDMAX) • PDMAX for each amplifier can be calculated as shown in Equation 8: V OUTMAX PD MAX = 2*V S × I SMAX + ( V S - V OUTMAX ) × ---------------------------RL (EQ. 8) where: • TMAX = Maximum ambient temperature • θJA = Thermal resistance of the package • PDMAX = Maximum power dissipation of 1 amplifier • VS = Supply voltage (Magnitude of V+ and V-) • IMAX = Maximum supply current of 1 amplifier • VOUTMAX = Maximum output voltage swing of the application • RL = Load resistance 17 FN6260.6 October 21, 2009 ISL28270, ISL28273, ISL28470 Quarter Size Outline Plastic Packages Family (QSOP) MDP0040 A QUARTER SIZE OUTLINE PLASTIC PACKAGES FAMILY D (N/2)+1 N INCHES SYMBOL QSOP16 QSOP24 QSOP28 TOLERANCE NOTES E PIN #1 I.D. MARK E1 1 (N/2) A 0.068 0.068 0.068 Max. - A1 0.006 0.006 0.006 ±0.002 - A2 0.056 0.056 0.056 ±0.004 - b 0.010 0.010 0.010 ±0.002 - c 0.008 0.008 0.008 ±0.001 - D 0.193 0.341 0.390 ±0.004 1, 3 E 0.236 0.236 0.236 ±0.008 - E1 0.154 0.154 0.154 ±0.004 2, 3 e 0.025 0.025 0.025 Basic - L 0.025 0.025 0.025 ±0.009 - L1 0.041 0.041 0.041 Basic - N 16 24 28 Reference - B 0.010 C A B e H C SEATING PLANE 0.007 0.004 C b C A B Rev. F 2/07 NOTES: L1 A 1. Plastic or metal protrusions of 0.006” maximum per side are not included. 2. Plastic interlead protrusions of 0.010” maximum per side are not included. c SEE DETAIL "X" 3. Dimensions “D” and “E1” are measured at Datum Plane “H”. 4. Dimensioning and tolerancing per ASME Y14.5M-1994. 0.010 A2 GAUGE PLANE L A1 4°±4° DETAIL X All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 18 FN6260.6 October 21, 2009