Intersil CD4008 Cmos 4-bit full adder with parallel carry out Datasheet

CD4008BMS
CMOS 4-Bit Full Adder With
Parallel Carry Out
November 1994
Features
Pinout
• High-Voltage Type (20V Rating)
CD4008BMS
TOP VIEW
• 4 Sum Outputs Plus Parallel Look-ahead Carry-Output
• High-Speed Operation - Sum In-To-Sum Out, 160ns
Typ; Carry In-To-Carry Out, 5ns Typ. At VDD = 10V,
CL=50pF
• Standardized Symmetrical Output Characteristics
• 100% Tested For Quiescent Current At 20V
• Maximum Input Current of 1µa at 18V Over Full Package-Temperature Range;
- 100nA at 18V and 25oC
• Noise Margin (Over Full Package Temperature Range):
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
• 5V, 10V and 15V Parametric Ratings
A4 1
16 VDD
B3 2
15 B4
A3 3
14 CO
B2 4
13 S4
A2 5
12 S3
B1 6
11 S2
A1 7
10 S1
VSS 8
9 C1
Logic Diagram
• Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”
Applications
• Binary Addition/Arithmetic Units
Description
CD4008BMS types consist of four full adder stages with fast
look ahead carry provision from stage to stage. Circuitry is
included to provide a fast “parallel-carry-out” but to permit
high-speed operation in arithmetic sections using several
CD4008BMS’s.
CD4008BMS inputs include the four sets of bits to be added,
A1 to A4 and B1 to B4, in addition to the “Carry In” bit from a
previous section. CD4008BMS outputs include the four sum
bits, S1 to S4. In addition to the high speed “parallel-carryout” which may be utilized at a succeeding CD4008BMS
section.
The CD4008BMS is supplied in these 16-lead outline packages:
Braze Seal DIP
H4T
Frit Seal DIP
H1F
Ceramic Flatpack H6W
HIGH SPEED
PAR CARRY
*
15
A4
*
1
B3
*
2
A3
*
3
B2
*
4
A2
*
5
B1
*
6
A1
*
7
C1
*
9
B4
CO
(CARRY-OUT)
13
SUM
S4
C4
12
SUM
S3
C3
11
SUM
S2
VDD
C2
10
SUM
S1
(CARRY-IN)
VSS
*ALL INPUTS ARE PROTECTED
BY CMOS PROTECTION
NETWORK
VDD = 16
VSS = 8
TRUTH TABLE
Ai
Bi
Ci
CO
SUM
0
1
0
1
0
1
0
1
0
0
1
1
0
0
1
1
0
0
0
0
1
1
1
1
0
0
0
1
0
1
1
1
0
1
1
0
1
0
0
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
7-675
14
File Number
3292
Specifications CD4008BMS
Absolute Maximum Ratings
Reliability Information
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V
(Voltage Referenced to VSS Terminals)
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC
Package Types D, F, K, H
Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC
At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for
10s Maximum
Thermal Resistance . . . . . . . . . . . . . . . .
θja
θjc
Ceramic DIP and FRIT Package . . . . . 80oC/W
20oC/W
Flatpack Package . . . . . . . . . . . . . . . . 70oC/W
20oC/W
o
Maximum Package Power Dissipation (PD) at +125 C
For TA = -55oC to +100oC (Package Type D, F, K) . . . . . . 500mW
For TA = +100oC to +125oC (Package Type D, F, K) . . . . . Derate
Linearity at 12mW/oC to 200mW
Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW
For TA = Full Package Temperature Range (All Package Types)
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Supply Current
SYMBOL
IDD
CONDITIONS (NOTE 1)
VDD = 20V, VIN = VDD or GND
VDD = 18V, VIN = VDD or GND
Input Leakage Current
IIL
VIN = VDD or GND
VDD = 20
VDD = 18V
Input Leakage Current
IIH
VIN = VDD or GND
VDD = 20
GROUP A
SUBGROUPS
LIMITS
TEMPERATURE
MIN
+25
-
10
µA
+125oC
-
1000
µA
3
-55oC
-
10
µA
1
+25o
C
-100
-
nA
2
+125oC
-1000
-
nA
3
-55oC
-100
-
nA
1
+25oC
-
100
nA
2
+125oC
-
1000
nA
-
100
nA
-
50
mV
-
V
3
Output Voltage
VOL15
VDD = 15V, No Load
1, 3
+25oC, +125oC, -55oC
Output Voltage
VOH15
VDD = 15V, No Load (Note 3)
1, 3
+25oC, +125oC, -55oC 14.95
Output Current (Sink)
IOL5
VDD = 5V, VOUT = 0.4V
UNITS
1
-55oC
VDD = 18V
MAX
2
oC
1
+25oC
0.53
-
mA
Output Current (Sink)
IOL10
VDD = 10V, VOUT = 0.5V
1
+25oC
1.4
-
mA
Output Current (Sink)
IOL15
VDD = 15V, VOUT = 1.5V
1
+25oC
3.5
-
mA
1
+25oC
-
-0.53
mA
1
+25oC
-
-1.8
mA
Output Current (Source)
Output Current (Source)
IOH5A
IOH5B
VDD = 5V, VOUT = 4.6V
VDD = 5V, VOUT = 2.5V
Output Current (Source)
IOH10
VDD = 10V, VOUT = 9.5V
1
+25oC
-
-1.4
mA
Output Current (Source)
IOH15
VDD = 15V, VOUT = 13.5V
1
+25oC
-
-3.5
mA
1
+25oC
-2.8
-0.7
V
1
+25oC
0.7
2.8
V
N Threshold Voltage
P Threshold Voltage
Functional
VNTH
VPTH
F
VDD = 10V, ISS = -10µA
VSS = 0V, IDD = 10µA
VDD = 2.8V, VIN = VDD or GND
7
+25oC
VDD = 20V, VIN = VDD or GND
7
+25oC
VDD = 18V, VIN = VDD or GND
8A
+125oC
VDD = 3V, VIN = VDD or GND
8B
-55oC
VOH > VOL <
VDD/2 VDD/2
V
Input Voltage Low
(Note 2)
VIL
VDD = 5V, VOH > 4.5V, VOL < 0.5V
1, 2, 3
+25oC, +125oC, -55oC
-
1.5
V
Input Voltage High
(Note 2)
VIH
VDD = 5V, VOH > 4.5V, VOL < 0.5V
1, 2, 3
+25oC, +125oC, -55oC
3.5
-
V
Input Voltage Low
(Note 2)
VIL
VDD = 15V, VOH > 13.5V,
VOL < 1.5V
1, 2, 3
+25oC, +125oC, -55oC
-
4
V
Input Voltage High
(Note 2)
VIH
VDD = 15V, VOH > 13.5V,
VOL < 1.5V
1, 2, 3
+25oC, +125oC, -55oC
11
-
V
NOTES: 1. All voltages referenced to device GND, 100% testing being
implemented.
2. Go/No Go test with limits applied to inputs
7-676
3. For accuracy, voltage is measured differentially to VDD. Limit
is 0.050V max.
Specifications CD4008BMS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Propagation Delay
Sum In to Sum Out
SYMBOL
TPHL1
TPLH1
CONDITIONS (NOTE 1, 2)
VDD = 5V, VIN = VDD or GND
TPHL2
TPLH2
VDD = 5V, VIN = VDD or GND
Propagation Delay
Sum In To Carry Out
TPHL3
TPLH3
VDD = 5V, VIN = VDD or GND
Transition Time
9
10, 11
Propagation Delay
Carry In To Cum Out
Propagation Delay
Carry In To
Carry Out
GROUP A
SUBGROUPS TEMPERATURE
9
10, 11
9
10, 11
TPHL4
TPLH4
VDD = 5V, VIN = VDD or GND
TTHL
TTLH
VDD = 5V, VIN = VDD or GND
9
10, 11
+25oC
+125oC,
-55oC
+25oC
+125oC,
-55oC
+25oC
+125oC,
-55oC
+25oC
+125oC,
-55oC
LIMITS
MIN
MAX
UNITS
-
800
ns
-
1080
ns
-
740
ns
-
999
ns
-
400
ns
-
540
ns
-
200
ns
-
270
ns
9
+25oC
-
200
ns
10, 11
+125oC, -55oC
-
270
ns
NOTES:
1. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
2. -55oC and +125oC limits guaranteed, 100% testing being implemented.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
Supply Current
SYMBOL
CONDITIONS
NOTES
TEMPERATURE
MIN
MAX
UNITS
IDD
VDD = 5V, VIN = VDD or GND
1, 2
-55oC, +25oC
-
5
µA
+125oC
-
150
µA
VDD = 10V, VIN = VDD or GND
VDD = 15V, VIN = VDD or GND
Output Voltage
VOL
VDD = 5V, No Load
1, 2
1, 2
1, 2
-55 C, +25 C
-
10
µA
+125oC
-
300
µA
o
o
-
10
µA
+125oC
-
600
µA
+25oC, +125oC,
-
50
mV
-55oC,
+25oC
-55oC
Output Voltage
VOL
VDD = 10V, No Load
1, 2
+25oC, +125oC,
-55oC
-
50
mV
Output Voltage
VOH
VDD = 5V, No Load
1, 2
+25oC, +125oC,
-55oC
4.95
-
V
Output Voltage
VOH
VDD = 10V, No Load
1, 2
+25oC, +125oC,
-55oC
9.95
-
V
Output Current (Sink)
IOL5
VDD = 5V, VOUT = 0.4V
1, 2
+125oC
0.36
-
mA
-55oC
0.64
-
mA
+125oC
0.9
-
mA
-55oC
1.6
-
mA
+125oC
2.4
-
mA
-55oC
4.2
-
mA
Output Current (Sink)
Output Current (Sink)
Output Current (Source)
Output Current (Source)
IOL10
IOL15
IOH5A
IOH5B
VDD = 10V, VOUT = 0.5V
1, 2
VDD = 15V, VOUT = 1.5V
1, 2
VDD = 5V, VOUT = 4.6V
1, 2
VDD = 5V, VOUT = 2.5V
1, 2
7-677
+125oC
-
-0.36
mA
-55oC
-
-0.64
mA
+125oC
-
-1.15
mA
-55oC
-
-2.0
mA
Specifications CD4008BMS
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
LIMITS
PARAMETER
SYMBOL
Output Current (Source)
IOH10
CONDITIONS
VDD = 10V, VOUT = 9.5V
NOTES
TEMPERATURE
MIN
MAX
UNITS
1, 2
+125oC
-
-0.9
mA
-55 C
-
-1.6
mA
+125oC
-
-2.4
mA
-
-4.2
mA
-
3
V
o
Output Current (Source)
IOH15
VDD =15V, VOUT = 13.5V
1, 2
-55
Input Voltage Low
VIL
VDD = 10V, VOH > 9V, VOL < 1V
1, 2
oC
+25oC, +125oC,
-55oC
Input Voltage High
VIH
VDD = 10V, VOH > 9V, VOL < 1V
+25oC, +125oC,
-55oC
+7
-
V
1, 2, 3
+25oC
-
320
ns
Propagation Delay Sum
In To Sum Out
TPHL1
TPLH1
VDD = 15V
1, 2, 3
+25 C
-
230
ns
Propagation Delay Carry
In To Sum Out
TPHL2
TPLH2
VDD = 10V
1, 2, 3
+25oC
-
310
ns
VDD = 15V
1, 2, 3
+25oC
-
230
ns
Propagation Delay Sum
In To Carry Out
TPLH3
TPHL3
VDD = 10V
1, 2, 3
+25oC
-
180
ns
1, 2, 3
+25oC
-
130
ns
Propagation Delay Carry
In To Carry Out
Transition Time
Input Capacitance
TPHL4
TPLH4
TTHL
TTLH
CIN
VDD = 10V
1, 2
VDD = 15V
o
o
VDD = 10V
1, 2, 3
+25 C
-
100
ns
VDD = 15V
1, 2, 3
+25oC
-
80
ns
1, 2, 3
+25oC
-
100
ns
1, 2, 3
oC
-
80
ns
+25oC
-
7.5
pF
VDD = 10V
VDD = 15V
Any Input
1, 2
+25
NOTES:
1. All voltages referenced to device GND.
2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized
on initial design release and upon design changes which would affect these characteristics.
3. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
Supply Current
SYMBOL
IDD
CONDITIONS
NOTES
VDD = 20V, VIN = VDD or GND
TEMPERATURE
MIN
MAX
UNITS
1, 4
+25o
-
25
µA
C
N Threshold Voltage
VNTH
VDD = 10V, ISS = -10µA
1, 4
+25oC
-2.8
-0.2
V
N Threshold Voltage
Delta
∆VNTH
VDD = 10V, ISS = -10µA
1, 4
+25oC
-
±1
V
P Threshold Voltage
VPTH
VSS = 0V, IDD = 10µA
1, 4
+25oC
0.2
2.8
V
P Threshold Voltage
Delta
∆VPTH
VSS = 0V, IDD = 10µA
1, 4
+25oC
-
±1
V
1
+25oC
VOH >
VDD/2
VOL <
VDD/2
V
Functional
F
VDD = 18V, VIN = VDD or GND
VDD = 3V, VIN = VDD or GND
7-678
Specifications CD4008BMS
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
SYMBOL
Propagation Delay Time
TPHL
TPLH
CONDITIONS
VDD = 5V
NOTES
TEMPERATURE
MIN
MAX
UNITS
1, 2, 3, 4
+25oC
-
1.35 x
+25oC
Limit
ns
3. See Table 2 for +25oC limit.
NOTES: 1. All voltages referenced to device GND.
2. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
4. Read and Record
TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25OC
PARAMETER
SYMBOL
DELTA LIMIT
Supply Current - MSI-2
IDD
± 1.0µA
Output Current (Sink)
IOL5
± 20% x Pre-Test Reading
IOH5A
± 20% x Pre-Test Reading
Output Current (Source)
TABLE 6. APPLICABLE SUBGROUPS
MIL-STD-883
METHOD
GROUP A SUBGROUPS
Initial Test (Pre Burn-In)
100% 5004
1, 7, 9
IDD, IOL5, IOH5A
Interim Test 1 (Post Burn-In)
100% 5004
1, 7, 9
IDD, IOL5, IOH5A
Interim Test 2 (Post Burn-In)
100% 5004
1, 7, 9
IDD, IOL5, IOH5A
100% 5004
1, 7, 9, Deltas
100% 5004
1, 7, 9
100% 5004
1, 7, 9, Deltas
100% 5004
2, 3, 8A, 8B, 10, 11
CONFORMANCE GROUP
PDA (Note 1)
Interim Test 3 (Post Burn-In)
PDA (Note 1)
Final Test
Group A
Group B
IDD, IOL5, IOH5A
Sample 5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11
Subgroup B-5
Sample 5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
Subgroup B-6
Sample 5005
1, 7, 9
Sample 5005
1, 2, 3, 8A, 8B, 9
Group D
READ AND RECORD
Subgroups 1, 2, 3, 9, 10, 11
Subgroups 1, 2 3
NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
TABLE 7. TOTAL DOSE IRRADIATION
CONFORMANCE GROUPS
Group E Subgroup 2
TEST
READ AND RECORD
MIL-STD-883
METHOD
PRE-IRRAD
POST-IRRAD
PRE-IRRAD
POST-IRRAD
5005
1, 7, 9
Table 4
1, 9
Table 4
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS
OSCILLATOR
FUNCTION
OPEN
GROUND
VDD
Static Burn-In 1
Note 1
10 - 14
1 - 9, 15
16
Static Burn-In 2
Note 1
10 - 14
8
1 - 7, 9, 15, 16
Dynamic BurnIn Note 1
-
8
16
10 - 14
8
1 - 7, 9, 15, 16
Irradiation
Note 2
7-679
9V ± -0.5V
50kHz
25kHz
10 - 14
2, 4, 6, 15
1, 3, 5, 7, 9
Specifications CD4008BMS
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS
OSCILLATOR
FUNCTION
OPEN
GROUND
VDD
9V ± -0.5V
50kHz
25kHz
NOTE:
1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V
2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD
= 10V ± 0.5V
Typical Propagation Delay
CO
A13 - 16
B13 - 16
CD4008
S13 - 16
50 + 50 + 90 + 155
2(50)
+ 90
+ 155
2(Ci - CO) + (Si - CO) + (Ci - SO) = 345
S9 - 12
50 + 90 + 155
50
90
155
(Ci - CO) + (Si - CO) + (Ci - SO)
S5 - 8
90 + 155
(Si - CO) + (Ci - SO) =90 + 155
S1 - 4
160
(Si - SO)
Ci
CO
A9 - 12
B9 - 12
CD4008
Ci
CO
A5 - 8
A5 - 8
CD4008
Ci
CO
A1 - 4
B1 - 4
CD4008
Ci
VSS
ALL SUMS SETTLED AFTER 345ns
FIGURE 1. PROPAGATION DELAY FOR A 16 BIT ADDER (10V OPERATION)
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CD4008BMS
AMBIENT TEMPERATURE (TA) = +25oC
SUPPLY VOLTAGE (VDD) = 5V
400
300
10V
200
15V
100
0
20
40
60
80
100
120
LOAD CAPACITANCE (CL) (pF)
SUM-IN TO CARRY-OUT PROPAGATION
DELAY TIME (tPHL, tPLH) (ns)
CARRY-IN TO CARRY-OUT PROPAGATION
DELAY TIME (tPHL, tPLH) (ns)
400
300
10V
200
15V
100
20
40
60
80
100
120
LOAD CAPACITANCE (CL) (pF)
GATE-TO-SOURCE VOLTAGE (VGS) = -5V
0
-5
-10
-15
-10V
-20
-25
-15V
-30
15V
50
25
20
40
60
80
100
120
LOAD CAPACITANCE (CL) (pF)
140
AMBIENT TEMPERATURE (TA) = +25oC
300
SUPPLY VOLTAGE (VDD) = 5V
250
200
150
10V
15V
100
50
20
40
60
80
100
120
LOAD CAPACITANCE (CL) (pF)
140
FIGURE 5. TYPICAL SUM-IN TO CARRY-OUT PROPAGATION
DELAY TIME vs LOAD CAPACITANCE
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
-15
-10
-5
AMBIENT TEMPERATURE (TA) = +25oC
OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)
AMBIENT TEMPERATURE (TA) = +25oC
0
10V
0
140
FIGURE 4. TYPICAL CARRY-IN TO SUM-OUT PROPAGATION
DELAY TIME vs LOAD CAPACITANCE
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
-15
-10
-5
75
FIGURE 3. TYPICAL CARRY-IN TO CARRY-OUT PROPAGATION DELAY TIME vs LOAD CAPACITANCE
SUPPLY VOLTAGE (VDD) = 5V
0
100
0
AMBIENT TEMPERATURE (TA) = +25oC
500
SUPPLY VOLTAGE (VDD) = 5V
125
140
FIGURE 2. TYPICAL SUM-IN TO SUM-OUT PROPAGATION
DELAY TIME vs LOAD CAPACITANCE
600
AMBIENT TEMPERATURE (TA) = +25oC
150
0
0
GATE-TO-SOURCE VOLTAGE (VGS) = -5V
-5
-10V
-15V
FIGURE 6. TYPICAL OUTPUT HIGH (SOURCE) CURRENT
CHARACTERISTICS
-10
-15
OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)
500
CARRY-IN TO CARRY-OUT PROPAGATION
DELAY TIME (tPHL, tPLH) (ns)
SUM-IN TO SUM-OUT PROPAGATION DELAY TIME
(tPHL, tPLH) (ns)
Typical Performance Characteristics
FIGURE 7. MINIMUM OUTPUT HIGH (SOURCE) CURRENT
CHARACTERISTICS
7-681
CD4008BMS
(Continued)
AMBIENT TEMPERATURE (TA) = +25oC
30
OUTPUT LOW (SINK) CURRENT (IOL) (mA)
OUTPUT LOW (SINK) CURRENT (IOL) (mA)
Typical Performance Characteristics
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
25
20
15
10V
10
5
5V
0
AMBIENT TEMPERATURE (TA) = +25oC
15.0
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
12.5
10.0
5.0
2.5
5
10
15
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
POWER DISSIPATION/PACKAGE (PD) (µW)
5V
0
5
10
15
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
FIGURE 8. TYPICAL OUTPUT LOW (SINK) CURRENT
CHARACTERISTICS
106
10V
7.5
FIGURE 9. MINIMUM OUTPUT LOW (SINK) CURRENT
CHARACTERISTICS
AMBIENT TEMPERATURE (TA) = +25oC
105
SUPPLY VOLTAGE (VDD) = 15V
104
10V
103
5V
102
5V
3.5V
10
LOAD CAPACITANCE (CL) = 15pF
(CL) = 50pF
1
10
102
103
104
INPUT FREQUENCY (fφ) (kHz)
FIGURE 10. TYPICAL DISSIPATION CHARACTERISTICS
Chip Dimensions and Pad Layouts
METALLIZATION: Thickness: 11kÅ − 14kÅ,
PASSIVATION:
BOND PADS:
10.4kÅ - 15.6kÅ, Silane
0.004 inches X 0.004 inches MIN
DIE THICKNESS:
Dimensions in parentheses are in millimeters
and are derived from the basic inch dimensions
as indicated. Grid graduations are in mils (10-3 inch)
7-682
AL.
0.0198 inches - 0.0218 inches
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