Datasheet Low Duty LCD Segment Driver for Automotive application BU91520KV-M MAX 276 Segments (69SEG × 4COM) General Description Key Specifications The BU91520AKV-M is 1/4 or 1/3-Duty general-purpose LCD driver that can be used for automotive applications. It can support operating temperature of up to +105°C and qualified for AEC-Q100 Grade2, as required for automotive applications.. It can drive up to 276 LCD Segments directly. It can control up to 6 general-purpose output ports. It can also support a key scan function that detects a maximum of 30 key inputs. Features ■ ■ ■ ■ ■ ■ Special Characteristics ■ ■ (Note1) AEC-Q100 Qualified Key input function for up to 30 keys (A key scan is performed only when a key is pressed.) Either 1/4 or 1/3-Duty can be selected with the serial control data. 1/4 duty drive: Up to 276 segments 1/3 duty drive: Up to 207 segments Serial Data Control of frame frequency for common and segment output waveforms. Serial data control of switching between the segment output port , PWM output port and general-purpose output port functions.(Max 6 ports) Built-in OSC circuit The INHb pin can force the display to the off state Integrated Power-on Reset Circuit No external component Low power consumption design Supports Line and Frame Inversion (Note1) Supply Voltage Range: +2.7V to +6.0V Operating Temperature Range: -40°C to +105°C Max Segments: 276 Segments Display Duty 1/3, 1/4 Selectable Bias: 1/2, 1/3 Selectable Interface: 3wire Serial Interface Electrostatic Discharge Voltage(HBM): Latch-up Current: ±2000V ±100mA Package VQFP80 W (Typ.) x D (Typ.) x H (Max.) VQFP80 14.00mm x 14.00mm x 1.60mm Grade 2 Applications Car Audio, Home Electrical Appliance, Meter Equipment etc. Typical Application Circuit Key matrix (P1/G1) (P6/G6) KS1/S56 | KS6/S61 +5V KI1/S62 | KS5/S66 (General purpose/PWM ports) (For use control of backlight) COM1 COM2 COM3 COM4 S1/P1/G1 S2/P2/G2 VDD (Note2) S6/P6/G6 S7 INHb From Controller LCD Panel (Up to 276 Segments) SCE S66 S67 S68 OSC/S69 SCL SDI To Controller SDO (Note2) Insert capacitors between VDD and VSS C > 0.1uF. Figure 1. Typical Application Circuit ○Product structure：Silicon monolithic integrated circuit www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・14・001 ○This product is not designed protection against radioactive rays. 1/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M COMMON Driver --- S1/P1/G1 S7 --- S6/P6/G6 S55 S67 S68 COM1 COM2 COM3 COM4 Block Diagram SEGMENT Driver INHb Clock / Timing Generator OSC/ S69 Control Register SCE PWM Register Shift Register SCL Serial Interface SDI LCD v oltage Generator SDO KEY Buffer VLCD VDD VLCD1 VDET KEY SCAN VLCD2 KS1/S56 KS2/S57 KS3/S58 KS4/S59 KS5/S60 KS6/S61 KI1/S62 KI2/S63 KI3/S64 KI4/S65 KI5/S66 VSS Figure 2. Block Diagram S43 41 S44 S45 S46 S47 S48 S49 S50 S51 S52 S53 S54 S55 KS1 / S56 KS2 / S57 KS3 / S58 KS4 / S59 KS5 / S60 KI1 / S62 60 KS6 / S61 Pin Configuration 61 40 KI2 / S63 S42 KI3 / S64 S41 KI4 / S65 S40 KI5 / S66 S39 COM1 S38 COM2 S37 COM3 S36 COM4 S35 S67 S34 VDD S33 S68 S32 SDO S31 VSS S30 OSC / S69 S29 INHb S28 SCE S27 SCL S26 SDI S25 S1 / P1 / G1 S24 S2 / P2 / G2 S23 21 S22 S21 S20 S19 S18 S17 S16 S15 S14 S13 S12 S11 S9 S10 S8 S7 S6 / P6 / G6 S5 / P5 / G5 S4 / P4 / G4 S3 / P3 / G3 1 20 80 Figure 3. Pin Configuration (TOP VIEW) www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 2/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M Absolute Maximum Ratings (Ta = 25°C, VSS = 0V) Parameter Maximum Supply Voltage Input Voltage Allowable Loss Operating Temperature Storage Temperature Symbol VDD max VIN1 VIN2 Pd Topr Tstg Conditions VDD SCE, SCL, SDI, INHb KI1 to KI5 Rating -0.3 to +7.0 -0.3 to +7.0 -0.3 to +7.0 (Note3) 1.20 -40 to +105 -55 to +125 Unit V V V W °C °C (Note3) Derate by 12.0mW/°C when operating above Ta=25°C (when mounted in ROHM’s standard board). Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over the absolute maximum ratings. Recommended Operating Conditions (Ta = -40°C to +105°C, VSS = 0V) Parameter Symbol Supply Voltage Conditions VDD Min 2.7 Rating Typ 5.0 Unit Max 6.0 V Electrical Characteristics (Ta = -40°C to +105°C, VDD = 2.7V to 6.0V, VSS = 0V) Parameter Hysteresis Symbol VH1 VH2 Power-on Detection Voltage “H” Level Input Voltage “L” Level Input Voltage Input Floating Voltage Pull-down Resistance Output Off Leakage Current “H” Level Input Current “L” Level Input Current “H” Level Output Voltage “L” Level Output Voltage Middle Level Output Voltage Conditions SCE, SCL, SDI, INHb,OSC KI1 to KI5 VDET VDD VIH1 VIH2 VIH3 VIL1 SCE,SCL,SDI,INHb,OSC SCE,SCL,SDI,INHb,OSC KI1 to KI5 SCE,SCL,SDI,INHb KI1 to KI5,OSC KI1 to KI5 KI1 to KI5 4.0V ≤ VDD ≤ 6.0V 2.7V ≤ VDD < 4.0V IOFFH SDO VO=6.0V IIH1 IIL1 VOH1 VOH2 VOH3 VOH4 VOL1 VOL2 VOL3 VOL4 VOL5 VMID1 SCE,SCL,SDI,INHb,OSC SCE,SCL,SDI,INHb,OSC S1 to S69 COM1 to COM4 P1/G1 to P6/G6 KS1 to KS6 S1 to S69 COM1 to COM4 P1/G1 to P6/G6 KS1 to KS6 SDO S1 to S69 VI = 5.5V VI = 0V IO = -20µA IO = -100µA IO = -1mA IO = -500uA IO = 20µA IO = 100µA IO = 1mA IO = 25uA IO = 1mA 1/2-Bias IO=±20µA VMID2 1/2-Bias IO=±100µA VMID3 COM1 to COM4 S1 to S69 VMID4 S1 to S69 1/3-Bias IO= ±20µA VMID5 COM1 to COM4 COM1 to COM4 VDD VDD 1/3-Bias IO = ±100µA 1/3-Bias IO = ±100µA Power-saving mode VDD = 5.0V Output open 1/2-Bias Frame frequency = 80Hz VDD = 5.0V Output open 1/3-Bias Frame frequency = 80Hz VIF RPD VMID6 Current Consumption Pin IDD1 IDD2 IDD3 VDD www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 VDD=5.0V 1/3-Bias IO=±20µA 3/41 Min Limit Typ Max - 0.03VDD - - 0.1VDD - 1.4 1.8 2.2 V 0.4VDD 0.8VDD 0.7VDD - VDD VDD VDD V 0 - 0.2VDD V - - 0.05VDD V 50 100 250 KΩ - - 6.0 µA -5.0 VDD-0.9 VDD-0.9 VDD-0.9 VDD-1.0 0.2 1/2VDD -0.9 1/2VDD -0.9 2/3VDD -0.9 1/3VDD -0.9 2/3VDD -0.9 1/3VDD -0.9 - VDD-0.5 0.5 0.1 µA µA - 5.0 VDD-0.2 0.9 0.9 0.9 1.5 0.5 1/2VDD +0.9 1/2VDD +0.9 2/3VDD +0.9 1/3VDD +0.9 2/3VDD +0.9 1/3VDD +0.9 15 - 85 170 - Unit V V V V µA - 110 210 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M Oscillation Characteristics(Ta = -40°C to +105°C, VDD = 2.7V to 6.0V, VSS = 0V) Parameter Symbol Pin fosc1 fosc2 - VDD = 2.7V to 6.0V VDD = 5V OSC External clock mode (OC=1) Oscillator Frequency 1 Oscillator Frequency 2 External Clock Frequency Conditions fosc3 (Note4) External Clock Rise Time External Clock Fall Time External Clock Duty tr tf tdty Min 300 510 Limit Typ 600 Max 720 690 30 - 1000 kHz 30 160 160 50 70 ns ns % Min 120 120 120 120 120 320 Limit Typ - Max - 120 - - ns 120 - - ns 1.6 - - us 10 160 160 - - ns ns µs - - 1.5 µs - - 1.5 µs Unit kHz kHz (Note4) Frame frequency is decided by external frequency and dividing ratio of FC0, FC1, FC2 setting. 【Reference Data】 700 650 VDD = 6.0V VDD = 5.0V fosc[kHz] 600 550 VDD = 3.3V 500 VDD = 2.7V 450 400 350 300 -40 -20 0 20 40 60 80 100 Temperature[°C] Figure 4. Typical Temperature Characteristics MPU Interface Characteristics (Ta = -40°C to +105°C, VDD = 2.7V to 6.0V, VSS = 0V) Parameter Symbol Data Setup Time Data Hold Time SCE Wait Time SCE Setup Time SCE Hold Time Clock Cycle Time High-level Clock Pulse Width Low-Level Clock Pulse Width (Write) Low-Level Clock Pulse Width (Read) Rise Time Fall Time INH Switching Time SDO Output Delay Time tds tdh tcp tcs tch tccyc tchw SCL, SDI SCL, SDI SCE, SCL SCE, SCL SCE, SCL SCL SCL tclww SCL tclwr SCL SDO Rise Time Pin tr tf tc SCE, SCL, SDI SCE, SCL, SDI INHb, SCE tdc SDO tdr SDO Conditions RPU=4.7KΩ (Note5) CL=10pF RPU=4.7KΩ (Note5) CL=10pF RPU=4.7KΩ (Note5) CL=10pF Unit ns ns ns ns ns ns (Note5) Since SDO is an open-drain output, “tdc” and “tdr” depend on the resistance of the pull-up resistor RPU and the load capacitance SCL. RPU: 1kΩ≤RPU≤10kΩ is recommended. CL: A parasitic capacitance to VSS in an application circuit. Any component is not necessary to be attached. Power supply for I/O level RPU SDO Host CL www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 4/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M 1. When SCL is stopped at the low level VIH1 SCE VIL1 tccyc tchw tclwr tclww VIH1 SCL VIL1 tr tf tcs tch VIH1 SDI VIL1 tds tdh SDO VOL5 tdc tdr 2. When SCL is stopped at the high level VIL1 tccyc tchw tclww SCL tclwr VIH1 VIL1 tch tcp tr tf VIH1 SDI VIL1 tds tdh SDO VOL5 tdr tdc Figure 5. Serial Interface Timing Pin Description Symbol Pin No. Function Active I/O S1/P1/G1 to S6/P6/G6 79,80, 1 to 4, - O S7 to S55 S67,S68 KS1/S56 to KS6/S61 5 to 53, 69,71 54 to 59 - O OPEN - O OPEN KI1/S62 to KI5/S66 60 to 64 - I/O OPEN COM1 to COM4 65 to 68 - O I/O OPEN OPEN S69/OSC 74 SCE SCL SDI 76 77 78 H ↑ - I I I - SDO 72 Segment output for displaying the display data transferred by serial data input. The S1/P1/G1 to S6/P6/G6 pins can also be used as General-purpose outputs when so set up by the control data. Segment output for displaying the display data transferred by serial data input. Key scan outputs Although normal key scan timing lines require diodes to be inserted in the timing lines to prevent shorts, since these outputs are unbalanced CMOS transistor outputs, these outputs will not be damaged by shorting when these outputs are used to form a key matrix. The KS1/S56 to KS6/S61 pins can be used as segment outputs when so specified by the control data. Key scan inputs These pins have built-in pull-down resistors. The KI1/S62 to KI5/S66 pins can be used as segment outputs when so specified by the control data. Common driver output pins. The frame frequency is fo[Hz]. Segment output for displaying the display data transferred by serial data input. The pin S69/OSC can be used external frequency input pin when set up by the control data. Serial data transfer inputs. Must be connected to the controller. SCE: Chip enable SCL: Clock for serial data transfer. SDI: Transfer data Output data Handling when unused OPEN - O OPEN www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 5/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M INHb 75 VDD 70 VSS 73 Display off control input. When INHb = low (VSS), Display forced off S1/P1/G1 to S6/P6/G6 = low (VSS) S7 to S69 = low (VSS) COM1 to COM4 = low (VSS) Stop the LCD drive bias voltage generation divider resistors. Stop the internal oscillation circuit. When INHb = high (VDD), Display on However, serial data transfer is possible when the display is forced off. Power supply pin. A supply voltage of 2.7V to 6.0V must be applied to this pin. Power supply pin. Must be connected to ground. L I VDD - - - - - - IO Equivalence Circuit VDD VDD SCE / SDI / SCL / INHb VSS VSS VDD VDD S7 to S55, S67, S68 / S69 / OSC COM1 to 4 VSS VSS VDD VDD KI1/ S62 to KI5 / S65 S1/ P1 / G1 to S6 / P6 / G6, KS1 / S56 to KS6 / S61 VSS VSS VDD SDO VSS Figure 6. I/O Equivalence Circuit www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 6/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M Serial Data Transfer Formats 1. 1/4-Duty (1) When SCL is stopped at the low level SCE SCL L SDI 0 1 0 0 0 0 1 0 B0 B1 B2 B3 A0 A1 A2 A3 D1 Device Code D2 D71 D72 0 0 0 0 0 KM0 KM1 KM2 P0 P1 P2 Display Data 8bit 0 1 0 0 0 0 1 0 B1 B2 B3 A0 A1 A2 A3 D73 DR DT FC0 FC1 D74 D143 D144 D145 D146 1 0 0 0 0 1 0 B2 B3 A0 A1 A2 A3 D157 Device Code D158 D147 D148 D149 D150 D151 D152 0 1 0 0 0 0 1 0 B1 B2 B3 A0 A1 A2 A3 Device Code D217 D216 D218 0 0 0 0 0 D276 0 0 0 0 0 Display Data 8bit BU2 0 D153 D154 D155 D156 PG1 PG2 PG3 PG4 PG5 PG6 PF0 PF1 PF2 PF3 0 0 W10 60bit 0 0 W40 W11 W16 W17 0 0 W20 W21 W26 W27 1 DD 10bit 60bit B0 BU1 Control Data Display Data 8bit BU0 DD 84bit B1 SC 2bit Display Data 8bit 0 OC 22bit Device Code B0 FC2 Control Data 72bit B0 FL 2bit W30 W31 W36 W37 1 0 Control Data DD 34bit 2bit W41 W46 W47 W50 W51 W56 W57 W60 W61 W66 W67 1 1 Control Data DD 34bit 2bit (Note6) Figure 7. 3-SPI Data Transfer Format (Note6) DD is direction data. www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 7/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M (2) When SCL is stopped at the high level SCE SCL L SDI 0 1 0 0 0 0 1 B0 B1 B2 B3 A0 A1 A2 0 D1 D2 D71 D72 0 0 0 0 0 KM0 KM1 KM2 P0 P1 P2 Device Code Display Data 8bit 0 1 0 0 0 0 1 B1 B2 B3 A0 A1 A2 DR DT FC0 FC1 FC2 0 0 0 0 1 B2 B3 A0 A1 A2 0 D73 0 D157 D74 D143 D144 D145 D146 D147 D148 D149 D150 D151 D152 D153 D154 D155 D156 PG1 PG2 PG3 PG4 PG5 1 0 0 0 0 1 B2 B3 A0 A1 A2 Device Code 8bit PF0 PF1 PF2 PF3 0 0 1 D158 D216 0 0 0 0 DD 10bit 0 0 0 W10 60bit B1 PG6 Control Data Display Data 8bit 0 0 W11 W16 W17 W20 W21 W26 W27 2bit W30 W31 W36 W37 1 0 A3 Device Code B0 BU2 DD 84bit 1 BU1 2bit Display Data B1 BU0 A3 8bit 0 SC 22bit Device Code B0 OC Control Data 72bit B0 FL A3 0 D217 D218 D276 0 0 0 0 0 0 0 W40 Control Data DD 34bit 2bit W41 W46 W47 W50 W51 W56 W57 W60 W61 W66 W67 1 1 A3 Display Data 60bit Control Data DD 34bit 2bit (Note7) Figure 8. 3-SPI Data Transfer Format (Note7) DD is direction data. Device code ---------------------------------- ”42H” D1 to D162 ----------------------------------- Display data KM0 to KM2 ---------------------------------- Key Scan output port/Segment output port switching control data P0 to P2 --------------------------------------- Segment output port/general-purpose output port switching control data FL ----------------------------------------------- Inversion type select control data DR ---------------------------------------------- 1/3-Bias or 1/2-Bias drive switching control data DT ---------------------------------------------- 1/4-Duty or 1/3-Duty drive switching control data FC0 to FC2 ----------------------------------- Common/segment output waveform frame frequency setting control data OC ---------------------------------------------- Internal oscillator operating mode/External clock operating mode switching control data SC ----------------------------------------------- Segment on/off control data BU0 to BU2 ----------------------------------- Normal mode/power-saving mode control data PG1 to PG6 ----------------------------------- PWM/General Purpose output select data PF0 to PF3 ------------------------------------ PWM output waveform frame frequency setting control data. Wn0 to Wn7 (n=1 to 6) --------------------- PWM output duty setting control data www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 8/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M 2. 1/3-Duty (1) When SCL is stopped at the low level SCE SCL L SDI 0 1 0 0 0 0 1 0 B0 B1 B2 B3 A0 A1 A2 A3 D1 Device Code D2 D71 D72 0 0 0 0 0 KM0 KM1 KM2 P0 P1 P2 Display Data 8bit 0 1 0 0 0 0 1 0 B1 B2 B3 A0 A1 A2 A3 D73 D74 DR DT FC0 FC1 D143 D144 D145 D146 1 0 0 0 0 1 0 B2 B3 A0 A1 A2 A3 D157 Device Code D158 D147 D148 D149 D150 D151 D152 0 1 0 0 0 0 1 0 B1 B2 B3 A0 A1 A2 A3 0 D207 0 BU2 0 D153 D154 D155 D156 PG1 PG2 PG3 PG4 0 0 0 0 0 0 0 0 0 PG5 PG6 PF0 PF1 PF2 PF3 0 0 0 W10 0 0 Device Code 8bit 0 W40 W11 W16 W17 0 0 W20 W21 W26 W27 1 DD 10bit 51bit B0 BU1 Control Data Display Data 8bit BU0 DD 84bit B1 SC 2bit Display Data 8bit 0 OC 22bit Device Code B0 FC2 Control Data 72bit B0 FL 2bit W30 W31 W36 W37 1 0 Control Data DD 39bit 2bit W41 W46 W47 W50 W51 W56 W57 W60 W61 W66 W67 1 1 Control Data DD 94bit 2bit (Note8) Figure 9. 3-SPI Data Transfer Format (Note8) DD is direction data. www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 9/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M (2) When SCL is stopped at the high level SCE SCL L SDI 0 1 0 0 0 0 1 B0 B1 B2 B3 A0 A1 A2 0 D1 D2 D71 D72 0 0 0 0 0 KM0 KM1 KM2 P0 P1 P2 FL Device Code Display Data 8bit 0 1 0 0 0 0 1 B1 B2 B3 A0 A1 A2 DT FC0 FC1 FC2 0 0 0 0 1 B2 B3 A0 A1 A2 0 D73 D74 0 D157 D143 D158 D144 D145 D146 D147 D148 D149 D150 D151 D152 D153 D154 D155 D156 PG1 PG2 PG3 PG4 PG5 1 0 0 0 0 1 B2 B3 A0 A1 A2 PF0 PF1 PF2 PF3 0 0 1 D207 0 0 0 0 DD 10bit 0 0 0 W10 51bit B1 PG6 Control Data Display Data 8bit 0 0 W11 W16 W17 W20 W21 W26 W27 2bit W30 W31 W36 W37 1 0 A3 Device Code B0 BU2 DD 84bit 1 BU1 2bit Display Data B1 BU0 A3 8bit 0 SC 22bit Device Code B0 OC Control Data 72bit B0 DR A3 0 0 0 0 0 0 0 0 0 0 0 W40 Control Data DD 39bit 2bit W41 W46 W47 W50 W51 W56 W57 W60 W61 W66 W67 1 1 A3 Device Code 8bit Control Data DD 94bit 2bit Figure 10. 3-SPI Data Transfer Format (Note9) (Note9) DD is direction data. Device code ---------------------------------- ”42H” D1 to D162 ----------------------------------- Display data KM0 to KM2 ---------------------------------- Key Scan output port/Segment output port switching control data P0 to P2 --------------------------------------- Segment output port/general-purpose output port switching control data FL ----------------------------------------------- Inversion type select control data DR ---------------------------------------------- 1/3-Bias or 1/2-Bias drive switching control data DT ---------------------------------------------- 1/4-Duty or 1/3-Duty drive switching control data FC0 to FC2 ----------------------------------- Common/segment output waveform frame frequency setting control data OC ---------------------------------------------- Internal oscillator operating mode/External clock operating mode switching control data SC ----------------------------------------------- Segment on/off control data BU0 to BU2 ----------------------------------- Normal mode/power-saving mode control data PG1 to PG6 ----------------------------------- PWM/General Purpose output select data PF0 to PF3 ------------------------------------ PWM output waveform frame frequency setting control data. Wn0 to Wn7 (n=1 to 6) --------------------- PWM output duty setting control data www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 10/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M Control Data Functions 1. KM0 to KM2: Key Scan output port/Segment output port control data These control data bits switch the functions of the KS1/S56 to KS6/S61 output pins between key scan output and segment output. KM0 KM1 KM2 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 Output Pin State KS1/S56 KS2/S57 KS3/S58 KS4/S59 KS5/S60 KS6/S61 KS1 S56 S56 S56 S56 S56 S56 S56 KS2 KS2 S57 S57 S57 S57 S57 S57 KS3 KS3 KS3 S58 S58 S58 S58 S58 KS4 KS4 KS4 KS4 S59 S59 S59 S59 KS5 KS5 KS5 KS5 KS5 S60 S60 S60 KS6 KS6 KS6 KS6 KS6 KS6 S61 S61 Maximum Number of Input keys 30 25 20 15 10 5 0 0 Reset condition ○ 2. P0 to P2: Segment / PWM / General Purpose output port control data These control bits are used to select the function of the S1/P1 to S6/P6 output pins (Segment Output Pins or PWM Output Pins or General Purpose Output Pins). P0 P1 P2 S1/P1/G1 S2/P2/G2 S3/P3/G3 S4/P4/G4 S5/P5/G5 S6/P6/G6 Reset condition 0 0 0 S1 S2 S3 S4 S5 S6 0 0 1 P1/G1 S2 S3 S4 S5 S6 0 1 0 P1/G1 P2/G2 S3 S4 S5 S6 0 1 1 P1/G1 P2/G2 P3/G3 S4 S5 S6 1 0 0 P1/G1 P2/G2 P3/G3 P4/G4 S5 S6 1 0 1 P1/G1 P2/G2 P3/G3 P4/G4 P5/G5 S6 1 1 0 P1/G1 P2/G2 P3/G3 P4/G4 P5/G5 P6/G6 1 1 1 S1 S2 S3 S4 S5 S6 ○ PWM output or General Purpose output is selected by PGx (x=1 to 6) control data bit. When the General Purpose Output Port Function is selected, the correspondence between the output pins and the respective display data is given in the table below. Corresponding Display Data Output Pins 1/4-Duty mode 1/3-Duty mode S1/P1/G1 D1 D1 S2/P2/G2 D5 D4 S3/P3/G3 D9 D7 S4/P4/G4 D13 D10 S5/P5/G5 D17 D13 S6/P6/G6 D21 D16 When the General Purpose Output Port Function is selected, the respective output pin outputs a “HIGH” level when its corresponding display data is set to “1”. Likewise, it will output a “LOW” level, if its corresponding display data is set to “0”. For example, S4/P4/G4 is used as a General Purpose Output Port in case of 1/4-Duty, if its corresponding display data – D13 is set to “1”, then S4/P4/G4 will output “HIGH” level. Likewise, if D13 is set to “0”, then S4/P4/G4 will output “LOW” level. 3. DR: 1/3-Bias drive or 1/2-Bias drive control data This control data bit selects either 1/3-Bias drive or 1/2-Bias drive. DR Bias Drive Scheme 0 1/3-Bias drive 1 1/2-Bias drive Reset condition ○ 4. FL: Line Inversion or Frame Inversion control data This control data but selects either Line Inversion or Frame Inversion. FL Inversion Setting Reset condition 0 Line ○ 1 Frame Typically, when driving large capacitance LCD, Line inversion will increase the influence of crosstalk. Regarding driving waveform, refer to LCD driving waveform. www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 11/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M 5. DT: 1/4-Duty drive or 1/3-Duty drive control data This control data bit selects either 1/4-Duty drive or 1/3-Duty drive. DT Duty Drive Scheme 0 1/4-Duty drive 1 1/3-Duty drive Reset condition ○ 6. FC0, FC1, FC2: Common/segment output waveform frame frequency control data These control data bits set the frame frequency for common and segment output waveforms. FC0 FC1 FC2 Frame Frequency fo(Hz) Reset condition (Note10) 0 0 0 fosc /12288 ○ 0 0 1 fosc/10752 0 1 0 fosc/9216 0 1 1 fosc/7680 1 0 0 fosc/6144 1 0 1 fosc/4608 1 1 0 fosc/3840 1 1 1 fosc/3072 (Note10) fosc: Internal oscillation frequency (600 [kHz] typ.) 7. OC: Internal oscillator operating mode/External clock operating mode control data This control data bit selects the oscillation mode. OC Operating Mode In/Out Pin(S69/OSC) Status 0 Internal oscillator S69 (segment output) 1 External Clock OSC (clock input) Reset condition ○ 8. SC: Segment on/off control data This control data bit controls the on/off state of the segments. SC Display State Reset condition 0 On 1 Off ○ Note that when the segments are turned off by setting SC to “1”, the segments are turned off by outputting segment off waveforms from the segment output pins. 9. BU: Normal mode/power-saving mode control data This control data bit selects either normal mode or power-saving mode. BU0 BU1 BU2 Mode OSC Oscillator Segment outputs Common outputs 0 0 0 Normal Operating Operating 0 0 1 0 1 0 0 1 1 Power1 0 0 Stopped Low(VSS) saving 1 0 1 1 1 0 1 1 1 Power-saving mode status: S1/P1/G1 to S6/P6/G6 = active only General Purpose output S7 to S69 = low(VSS) COM1 to COM4 = low(VSS) Stop the LCD drive bias voltage generation circuit Stop the Internal oscillation circuit However, serial data transfer is possible during Power-saving mode. www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 12/41 Output Pin States During Key Scan Standby KS1 KS2 KS3 KS4 KS5 KS6 Reset condition H L L L L L H H H L L L L H H H H L L L H H H H H L L H H H H H H L H H H H H H H H H H H H H H ○ TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M 10. PG1, PG2, PG3, PG4, PG5, PG6: PWM/General Purpose output control data This control data bit select either PWM output or General Purpose output of Sx/Px/Gx pins.(x=1 to 6) PGx(x=1 to 6) Mode Reset condition 0 PWM output ○ 1 General Purpose output <PWM<->GPO Changing function> Normal behavior of changing GPO to PWM is below. - PWM operation is started by command import timing of DD: 01 during GPO - PWM change. - Please take care of reflect timing of new duty setting of DD: 10 and DD: 11 is from the next PWM. SCE DD: 01 DD: 00 DD: 10 GPO ---> PWM change DD: 11 new duty decided timing PWM/GPO output start of PWM operation next PWM cycle (PWM waveform in immediate duty) (PWM waveform in new duty) In order to avoid this operation, please input commands in reverse as below. SCE DD:10 DD:11 new duty decided timing DD:01 DD:00 GPO --＞PWM change PWM/GPO output Start of PWM operation (PWM waveform on new duty) 11. PF0, PF1, PF2, PF3: PWM output waveform frame frequency control data These control data bits set the frame frequency for PWM output waveforms. PF0 PF1 PF2 PF3 PWM output Frame Frequency fp(Hz) 0 0 0 0 fosc/4096 0 0 0 1 fosc/3840 0 0 1 0 fosc/3584 0 0 1 1 fosc/3328 0 1 0 0 fosc/3072 0 1 0 1 fosc/2816 0 1 1 0 fosc/2560 0 1 1 1 fosc/2304 1 0 0 0 fosc/2048 1 0 0 1 fosc/1792 1 0 1 0 fosc/1536 1 0 1 1 fosc/1280 1 1 0 0 fosc/1024 1 1 0 1 fosc/768 1 1 1 0 fosc/512 1 1 1 1 fosc/256 www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 13/41 Reset condition ○ TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M (Note11) 12. W10 to W17 , W20 to W27, W30 to W37, W40 to W47, W50 to W57, W60 to W67: PWM output waveform duty control data. These control data bits set the high level pulse width(duty) for PWM output waveforms. N = 1 to 6, Tp = 1/fp Wn0 Wn1 Wn2 Wn3 Wn4 Wn5 Wn6 Wn7 PWM Duty Reset condition 0 0 0 0 0 0 0 0 (1/256) x Tp ○ 0 0 0 0 0 0 0 1 (2/256) x Tp 0 0 0 0 0 0 1 0 (3/256) x Tp 0 0 0 0 0 0 1 1 (4/256) x Tp 0 0 0 0 0 1 0 0 (5/256) x Tp 0 0 0 0 0 1 0 1 (6/256) x Tp 0 0 0 0 0 1 1 0 (7/256) x Tp 0 0 0 0 0 1 1 1 (8/256) x Tp 0 0 0 0 1 0 0 0 (9/256) x Tp 0 0 0 0 1 0 0 1 (10/256) x Tp 0 0 0 0 1 0 1 0 (11/256) x Tp 0 0 0 0 1 0 1 1 (12/256) x Tp 0 0 0 0 1 1 0 0 (13/256) x Tp 0 0 0 0 1 1 0 1 (14/256) x Tp 0 0 0 0 1 1 1 0 (15/256) x Tp 0 0 0 0 1 1 1 1 (16/256) x Tp 0 0 0 1 0 0 0 0 (17/256) x Tp 0 0 0 1 0 0 0 1 (18/256) x Tp 0 0 0 1 0 0 1 0 (19/256) x Tp 0 0 0 1 0 0 1 1 (20/256) x Tp 0 0 0 1 0 1 0 0 (21/256) x Tp 0 0 0 1 0 1 0 1 (22/256) x Tp 0 0 0 1 0 1 1 0 (23/256) x Tp 0 0 0 1 0 1 1 1 (24/256) x Tp 0 0 0 1 1 0 0 0 (25/256) x Tp 0 0 0 1 1 0 0 1 (26/256) x Tp 0 0 0 1 1 0 1 0 (27/256) x Tp 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 (230/256) x Tp (231/256) x Tp (232/256) x Tp (233/256) x Tp (234/256) x Tp (235/256) x Tp (236/256) x Tp (237/256) x Tp (238/256) x Tp (239/256) x Tp (240/256) x Tp (241/256) x Tp (242/256) x Tp (243/256) x Tp (244/256) x Tp (245/256) x Tp (246/256) x Tp (247/256) x Tp (248/256) x Tp (249/256) x Tp (250/256) x Tp (251/256) x Tp (252/256) x Tp (253/256) x Tp (254/256) x Tp (255/256) x Tp (256/256) x Tp (Note11):W10 to W17:S1/P1/G1 PWM duty data W20 to W27:S2/P2/G2 PWM duty data W30 to W37:S3/P3/G3 PWM duty data W40 to W47:S4/P4/G4 PWM duty data W50 to W57:S5/P5/G5 PWM duty data W60 to W67:S6/P6/G6 PWM duty data www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 14/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M Display Data and Output Pin Correspondence 1. 1/4-Duty (Note12) Output Pin S1/P1/G1 S2/P2/G2 S3/P3/G3 S4/P4/G4 S5/P5/G5 S6/P6/G6 S7 S8 S9 S10 S11 S12 S13 S14 S15 S16 S17 S18 S19 S20 S21 S22 S23 S24 S25 S26 S27 S28 S29 S30 S31 S32 S33 S34 S35 S36 S37 S38 S39 S40 S41 S42 S43 S44 S45 S46 S47 S48 S49 S50 S51 S52 S53 S54 S55 S56 S57 S58 S59 S60 S61 S62 S63 COM1 D1 D5 D9 D13 D17 D21 D25 D29 D33 D37 D41 D45 D49 D53 D57 D61 D65 D69 D73 D77 D81 D85 D89 D93 D97 D101 D105 D109 D113 D117 D121 D125 D129 D133 D137 D141 D145 D149 D153 D157 D161 D165 D169 D173 D177 D181 D185 D189 D193 D197 D201 D205 D209 D213 D217 D221 D225 D229 D233 D237 D241 D245 D249 www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 COM2 D2 D6 D10 D14 D18 D22 D26 D30 D34 D38 D42 D46 D50 D54 D58 D62 D66 D70 D74 D78 D82 D86 D90 D94 D98 D102 D106 D110 D114 D118 D122 D126 D130 D134 D138 D142 D146 D150 D154 D158 D162 D166 D170 D174 D178 D182 D186 D190 D194 D198 D202 D206 D210 D214 D218 D222 D226 D230 D234 D238 D242 D246 D250 COM3 D3 D7 D11 D15 D19 D23 D27 D31 D35 D39 D43 D47 D51 D55 D59 D63 D67 D71 D75 D79 D83 D87 D91 D95 D99 D103 D107 D111 D115 D119 D123 D127 D131 D135 D139 D143 D147 D151 D155 D159 D163 D167 D171 D175 D179 D183 D187 D191 D195 D199 D203 D207 D211 D215 D219 D223 D227 D231 D235 D239 D243 D247 D251 15/41 COM4 D4 D8 D12 D16 D20 D24 D28 D32 D36 D40 D44 D48 D52 D56 D60 D64 D68 D72 D76 D80 D84 D88 D92 D96 D100 D104 D108 D112 D116 D120 D124 D128 D132 D136 D140 D144 D148 D152 D156 D160 D164 D168 D172 D176 D180 D184 D188 D192 D196 D200 D204 D208 D212 D216 D220 D224 D228 D232 D236 D240 D244 D248 D252 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M Output pin S64 S65 S66 S67 S68 S69 (Note12) COM1 D253 D257 D261 D265 D269 D273 COM2 D254 D258 D262 D266 D270 D274 COM3 D255 D259 D263 D267 D271 D275 COM4 D256 D260 D264 D268 D272 D276 (Note12) The Segment Output Port function is assumed to be selected for the output pins – S1/P1/G1 to S6/P6/G6. To illustrate further, the states of the S21 output pin is given in the table below. Display Data State of S21 Output Pin D81 D82 D83 D84 0 0 0 0 LCD Segments corresponding to COM1 to COM4 are OFF. 0 0 0 1 LCD Segment corresponding to COM4 is ON. 0 0 1 0 LCD Segment corresponding to COM3 is ON. 0 0 1 1 LCD Segments corresponding to COM3 and COM4 are ON. 0 1 0 0 LCD Segment corresponding to COM2 is ON. 0 1 0 1 LCD Segments corresponding to COM2 and COM4 are ON. 0 1 1 0 LCD Segments corresponding to COM2 and COM3 are ON. 0 1 1 1 LCD Segments corresponding to COM2, COM3 and COM4 are ON. 1 0 0 0 LCD Segment corresponding to COM1 is ON. 1 0 0 1 LCD Segments corresponding to COM1 and COM4 are ON. 1 0 1 0 LCD Segments corresponding to COM1 and COM3 are ON. 1 0 1 1 LCD Segments corresponding to COM1, COM3 and COM4 are ON. 1 1 0 0 LCD Segments corresponding to COM1 and COM2 are ON. 1 1 0 1 LCD Segments corresponding to COM1, COM2, and COM4 are ON. 1 1 1 0 LCD Segments corresponding to COM1, COM2, and COM3 are ON. 1 1 1 1 LCD Segments corresponding to COM1 to COM 4 are ON. www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 16/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M 2. 1/3-Duty (Note13) Output Pin S1/P1/G1 S2/P2/G2 S3/P3/G3 S4/P4/G4 S5/P5/G5 S6/P6/G6 S7 S8 S9 S10 S11 S12 S13 S14 S15 S16 S17 S18 S19 S20 S21 S22 S23 S24 S25 S26 S27 S28 S29 S30 S31 S32 S33 S34 S35 S36 S37 S38 S39 S40 S41 S42 S43 S44 S45 S46 S47 S48 S49 S50 S51 S52 S53 S54 S55 S56 S57 S58 S59 S60 S61 S62 S63 COM1 D1 D4 D7 D10 D13 D16 D19 D22 D25 D28 D31 D34 D37 D40 D43 D46 D49 D52 D55 D58 D61 D64 D67 D70 D73 D76 D79 D82 D85 D88 D91 D94 D97 D100 D103 D106 D109 D112 D115 D118 D121 D124 D127 D130 D133 D136 D139 D142 D145 D148 D151 D154 D157 D160 D163 D166 D169 D172 D175 D178 D181 D184 D187 www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 COM2 D2 D5 D8 D11 D14 D17 D20 D23 D26 D29 D32 D35 D38 D41 D44 D47 D50 D53 D56 D59 D62 D65 D68 D71 D74 D77 D80 D83 D85 D89 D92 D95 D98 D101 D104 D107 D110 D113 D116 D119 D122 D125 D128 D131 D134 D137 D140 D143 D146 D149 D152 D155 D158 D161 D164 D167 D170 D173 D176 D179 D182 D185 D188 COM3 D3 D6 D9 D12 D15 D18 D21 D24 D27 D30 D33 D36 D39 D42 D45 D48 D51 D54 D57 D60 D63 D66 D69 D72 D75 D78 D81 D84 D87 D90 D93 D96 D99 D102 D105 D108 D111 D114 D117 D120 D123 D126 D129 D132 D135 D138 D141 D144 D147 D150 D153 D156 D159 D162 D165 D168 D171 D174 D177 D180 D183 D186 D189 17/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M Output pin S64 S65 S66 S67 S68 S69 (Note13) COM1 D190 D193 D196 D199 D202 D205 COM2 D191 D194 D197 D200 D203 D206 COM3 D192 D195 D198 D201 D204 D207 (Note13) The Segment Output Port function is assumed to be selected for the output pins – S1/P1/G1 to S6/P6/G6. To illustrate further, the states of the S21 output pin is given in the table below. Display Data State of S21 Output Pin D61 D62 D63 0 0 0 LCD Segments corresponding to COM1, COM2 and COM3 are OFF. 0 0 1 LCD Segment corresponding to COM3 is ON. 0 1 0 LCD Segment corresponding to COM2 is ON. 0 1 1 LCD Segments corresponding to COM2 and COM3 are ON. 1 0 0 LCD Segment corresponding to COM1 is ON. 1 0 1 LCD Segments corresponding to COM1 and COM3 are ON. 1 1 0 LCD Segments corresponding to COM1 and COM2 are ON. 1 1 1 LCD Segments corresponding to COM1, COM2 and COM3 are ON. www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 18/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M Serial Data Output 1. When SCL is stopped at the low level (Note14) SCE SCL SDI 1 1 0 0 0 0 1 0 B0 B1 B2 B3 A0 A1 A2 A3 SDO X KD1 KD2 KD27 KD28 KD29 KD30 PA KD28 KD29 KD30 X Output Data Figure 11. Serial data output format (Note14) 1. X=Don’t care 2. B0 to B3, A0 to A3: Serial Interface address 2. When SCL is stopped at the high level (Note15) SCE SCL SDI 1 1 0 0 0 0 1 0 B0 B1 B2 B3 A0 A1 A2 A3 SDO X KD1 KD2 KD3 PA Output Data Figure 12. Serial Data Output Format (Note15) 1. X=Don’t care 2. B0 to B3, A0 to A3: Serial Interface address 3. Serial Interface address: 43H 4. KD1 to KD30: Key data 5. PA: Power-saving acknowledge data 6. If a key data read operation is executed when SDO is high, the read key data (KD1 to KD30) and Power-saving acknowledge data (PA) will be invalid. www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 19/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M Output Data 1. KD1 to KD30: KEY DATA When a key matrix of up to 30 keys is formed from the KS1 to KS6 output pins and the KI1 to KI5 input pins and one of those keys is pressed, the key output data corresponding to that key will be set to 1. The table shows the relationship between those pins and the key data bits. Item KS1 KS2 KS3 KS4 KS5 KS6 KI1 KD1 KD6 KD11 KD16 KD21 KD26 KI2 KD2 KD7 KD12 KD17 KD22 KD27 KI3 KD3 KD8 KD13 KD18 KD23 KD28 KI4 KD4 KD9 KD14 KD19 KD24 KD29 KI5 KD5 KD10 KD15 KD20 KD25 KD30 2. PA: Power-saving Acknowledge Data This output data is set to the state when the key was pressed. In that case SDO will go to the low level. If serial data is input during this period and the mode is set (normal mode or power-saving mode), the IC will be set to that mode. PA is set to 1 in the power-saving mode and to 0 in the normal mode. Power-saving Mode Power-saving mode is activated by setting at least one of control data BU0 or BU1 or BU2 set to 1. The segment outputs will all go low and the common outputs will also go low, and the oscillator on the OSC pin will stop (it will be started by a key press). This reduces power dissipation. This mode is cleared by sending control data with all the BU0 or BU1 or BU2 set to 0. However, note that the S1/P1/G1 to S6/P6/G6 outputs can be used as general-purpose output ports according to the state of the P0 to P2 control data bits, even in power-saving mode. (See the control data description for details.) www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 20/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M Key Scan Operation Function 1. Key Scan Timing The key scan period is 4608T(s). To reliably determine the on/off state of the keys, the BU91520KV-M scans the keys twice and determines that a key has been pressed when the key data agrees. It outputs a key data read request (a low level on SDO) 9840T(s) after starting a key scan. If the key data does not agree and a key was pressed at that point, it scans the keys again. Thus the BU91520KV-M cannot detect a key press shorter than 9840T(s). KS1 * KS2 * KS3 * KS4 * KS5 * KS6 * 1 1 2 * 2 3 * 3 4 * 4 * 5 5 6 * 6 9216T[S] T= * 1 fosc (Note16) Figure 13. Key Scan Timing (Note16) In power-saving mode the high/low state of these pins is determined by the BU0 to BU2 bits in the control data. Key scan output signals are not output from pins that are set “L”. 2. In Normal Mode The pins KS1 to KS6 are set “H”. When a key is pressed a key scan is started and the keys are scanned until all keys are released. Multiple key presses are recognized by determining whether multiple key data bits are set. If a key is pressed for longer than 9840T(s) (Where T=1/fosc ) the BU91520KV-M outputs a key data read request (a low level on SDO) to the controller. The controller acknowledges this request and reads the key data. However, if SCE is high during a serial data transfer, SDO will be set “H”. After the controller reads the key data, the key data read request is cleared (SDO is set high) and the BU91520KV-M performs another key scan. Also note that SDO, being an open-drain output, requires a pull-up resistor (between 1 KΩ and 10KΩ). Key Input 1 Key Input 2 Key scan 9840T[S] 9840T[S] 9840T[S] SCE Serial data transfer Serial data transfer Key address(43H) Serial data transfer Key address Key address SDI SDO Key data read Key data read Key data read request Key data read request Key data read Key data read request 1 T= fosc Figure 14. Key Scan Operation In Normal Mode www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 21/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M 3. In Power-saving Mode The pins KS1 to KS6 are set to high or low by the BU0 to BU2 bits in the control data. (See the control data description for details.) If a key on one of the lines corresponding to a KS1 to KS6 pin which is set high is pressed, the oscillator on the OSC pin is started and a key scan is performed. Keys are scanned until all keys are released. Multiple key presses are recognized by determining whether multiple key data bits are set. If a key is pressed for longer than 9840T(s)(Where T=1/fosc) the BU91520KV-M outputs a key data read request (a low level on SDO) to the controller. The controller acknowledges this request and reads the key data. However, if SCE is high during a serial data transfer, SDO will be set high. After the controller reads the key data, the key data read request is cleared (SDO is set high) and the BU91520KV-M performs another key scan. However, this does not clear power-saving mode. Also note that SDO, being an open-drain output, requires a pull-up resistor (between 1 and 10KΩ). Power-saving mode key scan example Example: BU0=0, BU1=0, BU2=1 (only KS6 high level output) (L)KS1 (L)KS2 (L)KS3 When any one of these keys is pressed, the oscillator on the OSC pin is started and the keys are scanned. (L)KS4 (L)KS5 (L)KS6 (Note17) (Note16) Kl1 Kl2 Kl3 Kl4 Kl5 (Note17) These diodes are required to reliable recognize multiple key presses on the KS6 line when only KS6 is high, as in the above example. That is, these diodes prevent incorrect operations due to sneak currents in the KS6 key scan output signal when keys on the KS1 to KS5 lines are pressed at the same time. Key Input 2 (KS6 line) Key scan 9840T[S 9840T[S SCE Serial data Serial data Key address(43H) Serial data transfer Key address SDI SDO Key data read Key data read Key data read request Key data read request T= 1 fosc Figure 15. Key Scan Operation In Power-saving Mode Multiple Key Press Although the BU91520KV-M is capable of key scanning without inserting diodes for dual key presses, triple key presses on the KI1 to KI5 input pin lines, or multiple key presses on the KS1 to KS6 output pin lines, multiple presses other than these cases may result in keys that were not pressed recognized as having been pressed. Therefore, a diode must be inserted in series with each key. Applications that do not recognize multiple key presses of three or more keys should check the key data for three or more 1 bit and ignore such data. www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 22/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M Controller Key Data Read Technique When the controller receives a key data read request from BU91520KV-M, it performs a key data read acquisition operation using either the Timer Based Key Data Acquisition or the Interrupt Based Key Data Acquisition. Timer Based Key Data Acquisition Technique Under the Timer Based Key Data Acquisition Technique, the controller uses a timer to determine the states of the keys (ON or OFF) and read the key data. Please refer to the flowchart below. SCE ＝ 「L 」 NO SDO ＝ 「L 」 YES Key data read processing Key data read processing: Refer to “Serial Data Output” Figure 16. Flowchart In this technique, the controller uses a timer to determine key on/off states and read the key data. The controller must check the SDO state when SCE is low every t7 period without fail. If SDO is low, the controller recognizes that a key has been pressed and executes the key data read operation. The period t7 in this technique must satisfy the following condition. T7>t4+t5+t6 If a key data read operation is executed when SDO is high, the read key data (KD1 to KD30) and power-saving acknowledge data (PA) will be invalid. Key on Key on Key Input 1 Key scan t3 t4 t3 SCE t3 t6 t6 t6 SDI t5 t5 t5 Key data read SDO Key data read request t7 t7 t7 t7 Controller determination Controller determination Controller determination Controller determination Controller determination (key on) (key on) (key on) (key on) (key on) t3: Key scan execution time when the key data agreed for two key scans. (9840T(s)) t4: Key scan execution time when the key data did not agree for two key scans and the key scan was executed again. (19680T(s)) T = 1 / fosc t5: Key address (43H) transfer time t6: Key data read time www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 23/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M Figure 17. Timer Based Key Data Read Operation Interrupt Based Key Data Acquisition Technique Under the Interrupt Based Key Data Acquisition Technique, the controller uses interrupts to determine the state of the keys (ON or OFF) and read the key data. Please refer to the flow chart diagram below. SCE ＝ 「L 」 SDO ＝ 「L 」 NO YES Key data read processing Wait for at least t8 NO SDO ＝ 「H 」 YES Key off Key data read processing: Refer to “Serial Data Output” Figure 18. Flowchart www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 24/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M In this technique, the controller uses interrupts to determine key on/off states and read the key data. The controller must check the SDO state when SCE is low. If SDO is low, the controller recognizes that a key has been pressed and executes the key data read operation. After that the next key on/off determination is performed after the time t8 has elapsed by checking the SDO state when SCE is low and reading the key data. The period t8 in this technique must satisfy t8 > t4. If a key data read operation is executed when SDO is high, the read key data (KD1 to KD30) and power-saving acknowledge data (PA) will be invalid. Key on Key on Key Input 1 Key scan t3 t3 t4 SCE t3 t6 t6 t6 t6 SDI t5 t5 t5 t5 Key data read SDO Key data read request Controller Controller determination determination (key on) (key on) t8 t8 t8 t8 Controller determination (key on) Controller determination (key on) Controller determination (key on) Controller determination (key on) t3: Key scan execution time when the key data agreed for two key scans. (9840T(s)) t4: Key scan execution time when the key data did not agree for two key scans and the key scan was executed again. (19680T(s)) T = 1 / fosc t5: Key address (43H) transfer time t6: Key data read time Figure 19. Interrupt Based Key Data Read Operation www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 25/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M LCD Driving Waveforms 1. Line Inversion 1/4-Duty 1/3-Bias Drive Scheme fo[Hz] VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V COM1 COM2 COM3 COM4 LCD driver output when all LCD segment correstpoding to COM1, COM2,COM3, and COM4 are off. LCD driver output when only LCD segments corresponding to COM1 are on. LCD driver output when only LCD segments corresponding to COM2 are on. LCD driver output when LCD segments corresponding to COM1 and COM2 are on. LCD driver output when only LCD segments corresponding to COM3 are on. LCD driver output when LCD segments corresponding to COM1 and COM3 are on. LCD driver output when LCD segments corresponding to COM2 and COM3 are on. LCD driver output when LCD segments corresponding to COM1, COM2, and COM3 are on. LCD driver output when only LCD segments corresponding to COM4 are on. LCD driver output when LCD segments corresponding to COM2 and COM4 are on. LCD driver output when all LCD segments corresponding to COM1, COM2, COM3, and COM4 are on. Figure 20. LCD Waveform (1/4-Duty, 1/3-Bias, Line Inversion) www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 26/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M 2. Line Inversion 1/4-Duty 1/2-Bias Drive Scheme fo[Hz] VLCD COM1 VLCD1,VLCD2 0V VLCD COM2 VLCD1,VLCD2 0V VLCD COM3 VLCD1,VLCD2 0V VLCD COM4 VLCD1,VLCD2 0V LCD driver output when all LCD VLCD segment correstpoding to COM1, VLCD1,VLCD2 COM2,COM3, and COM4 are off 0V VLCD LCD driver output when only LCD segments VLCD1,VLCD2 corresponding to COM1 are on. 0V VLCD LCD driver output when only LCD segments VLCD1,VLCD2 corresponding to COM2 are on. 0V VLCD LCD driver output when LCD segments VLCD1,VLCD2 corresponding to COM1 and COM2 are on. 0V VLCD LCD driver output when only LCD segments VLCD1,VLCD2 corresponding to COM3 are on. 0V VLCD LCD driver output when LCD segments VLCD1,VLCD2 corresponding to COM1 and COM3 are on. 0V VLCD LCD driver output when LCD segments VLCD1,VLCD2 corresponding to COM2 and COM3 are on. 0V VLCD LCD driver output when LCD segments VLCD1,VLCD2 corresponding to COM1,COM2 and COM3 are on 0V VLCD LCD driver output when LCD segments VLCD1,VLCD2 corresponding to COM4 are on. 0V VLCD LCD driver output when LCD segments VLCD1,VLCD2 corresponding to COM2 and COM4 are on. 0V VLCD LCD driver output when VLCD1,VLCD2 all LCD segments corresponding 0V to COM1, COM2, COM3, and COM4 are on. Figure 21. LCD Waveform (1/4-Duty, 1/2-Bias, Line Inversion) www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 27/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M 3. Line Inversion 1/3-Duty 1/3-Bias Drive Scheme fo[Hz] VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V VLCD VLCD1 VLCD2 0V COM1 COM2 COM3 LCD driver output when all LCD segment correstpoding to COM1, COM2,COM3, and COM4 are off LCD driver output when only LCD segments corresponding to COM1 are on. LCD driver output when only LCD segments corresponding to COM2 are on. LCD driver output when LCD segments corresponding to COM1 and COM2 are on. LCD driver output when only LCD segments corresponding to COM3 are on. LCD driver output when LCD segments corresponding to COM1 and COM3 are on. LCD driver output when LCD segments corresponding to COM2 and COM3 are on. LCD driver output when all LCD segments corresponding to COM1, COM2, and COM3 are on. Figure 22. LCD Waveform (1/3-Duty, 1/3-Bias, Line Inversion) (Note18) (Note18) COM4 function is same as COM1 at 1/3-Duty. www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 28/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M 4. Line Inversion 1/3-Duty 1/2-Bias Drive Scheme fo[Hz] VLCD COM1 VLCD1,VLCD2 0V VLCD COM2 VLCD1,VLCD2 0V VLCD COM3 VLCD1,VLCD2 0V LCD driver output when all LCD VLCD segment correstpoding to COM1, VLCD1,VLCD2 COM2, and COM3 are off 0V VLCD LCD driver output when only LCD segments VLCD1,VLCD2 corresponding to COM1 are on. 0V VLCD LCD driver output when only LCD segments VLCD1,VLCD2 corresponding to COM2 are on. 0V VLCD LCD driver output when LCD segments VLCD1,VLCD2 corresponding to COM1 and COM2 are on. 0V VLCD LCD driver output when only LCD segments VLCD1,VLCD2 corresponding to COM3 are on. 0V VLCD LCD driver output when LCD segments VLCD1,VLCD2 corresponding to COM1 and COM3 are on. 0V VLCD LCD driver output when LCD segments VLCD1,VLCD2 corresponding to COM2 and COM3 are on. 0V VLCD LCD driver output when all LCD segments VLCD1,VLCD2 corresponding to COM1,COM2 0V and COM3 are on Figure 23. LCD Waveform (1/3-Duty, 1/2-Bias, Line Inversion) (Note19) (Note19) COM4 function is same as COM1 at 1/3-Duty. www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 29/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M 5. Frame Inversion 1/4-Duty 1/3-Bias Drive Scheme fo[Hz] VLCD VLCD1 COM1 VLCD2 0V VLCD VLCD1 COM2 VLCD2 0V VLCD VLCD1 COM3 VLCD2 0V VLCD VLCD1 COM4 VLCD2 0V VLCD LCD driver output when all LCD VLCD1 segment corresponding to COM1, VLCD2 COM2, COM3 and COM4 are off 0V VLCD LCD driver output when only LCD segments VLCD1 corresponding to COM1 are on VLCD2 0V VLCD LCD driver output when only LCD segments VLCD1 corresponding to COM2 are on. VLCD2 0V VLCD LCD driver output when only LCD segments VLCD1 corresponding to COM1 and COM2 are on. VLCD2 0V VLCD LCD driver output when only LCD segments VLCD1 corresponding to COM3 are on. VLCD2 0V VLCD LCD driver output when LCD segments VLCD1 corresponding to COM1 and COM3 are on VLCD2 0V VLCD LCD driver output when LCD segments VLCD1 corresponding to COM2 and COM3 are on VLCD2 0V VLCD LCD driver output when LCD segments VLCD1 corresponding to COM1, COM2 and COM3 are on VLCD2 0V VLCD LCD driver output when LCD segments VLCD1 corresponding to COM4 are on VLCD2 0V VLCD LCD driver output when LCD segments VLCD1 corresponding to COM2 and COM4 are on VLCD2 0V VLCD LCD driver output when LCD segments VLCD1 corresponding to COM4 are on VLCD2 0V Figure 24. LCD Waveform (1/4-Duty, 1/3-Bias, Frame Inversion) www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 30/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M 6. Frame Inversion 1/4-Duty 1/2-Bias Drive Scheme fo[Hz] VLCD COM1 VLCD1, VLCD2 0V VLCD COM2 VLCD1, VLCD2 0V VLCD COM3 VLCD1, VLCD2 0V VLCD COM4 VLCD1, VLCD2 0V LCD driver output when all LCD VLCD segment corresponding to COM1, VLCD1, VLCD2 COM2, COM3 and COM4 are off 0V VLCD LCD driver output when only LCD segments VLCD1, VLCD2 corresponding to COM1 are on 0V VLCD LCD driver output when only LCD segments VLCD1, VLCD2 corresponding to COM2 are on. 0V VLCD LCD driver output when only LCD segments VLCD1, VLCD2 corresponding to COM1 and COM2 are on. 0V VLCD LCD driver output when only LCD segments VLCD1, VLCD2 corresponding to COM3 are on. 0V VLCD LCD driver output when LCD segments VLCD1, VLCD2 corresponding to COM1 and COM3 are on 0V VLCD LCD driver output when LCD segments VLCD1, VLCD2 corresponding to COM2 and COM3 are on 0V VLCD LCD driver output when LCD segments VLCD1, VLCD2 corresponding to COM1, COM2 and COM3 are on 0V VLCD LCD driver output when LCD segments VLCD1, VLCD2 corresponding to COM4 are on 0V VLCD LCD driver output when LCD segments VLCD1, VLCD2 corresponding to COM2 and COM4 are on 0V VLCD LCD driver output when LCD segments VLCD1, VLCD2 corresponding to COM1, COM2, COM3 0V and COM4 are on Figure 25. LCD Waveform (1/4-Duty, 1/2-Bias, Frame Inversion) www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 31/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M 7. Frame Inversion 1/3-Duty 1/3-Bias Drive Scheme fo[Hz] VLCD VLCD1 COM1 VLCD2 0V VLCD VLCD1 COM2 VLCD2 0V VLCD VLCD1 COM3 VLCD2 0V VLCD LCD driver output when all LCD VLCD1 segment corresponding to COM1, VLCD2 COM2, COM3 and COM4 are off 0V VLCD LCD driver output when only LCD segments VLCD1 corresponding to COM1 are on VLCD2 0V VLCD LCD driver output when only LCD segments VLCD1 corresponding to COM2 are on. VLCD2 0V VLCD LCD driver output when only LCD segments VLCD1 corresponding to COM1 and COM2 are on. VLCD2 0V VLCD LCD driver output when only LCD segments VLCD1 corresponding to COM3 are on. VLCD2 0V VLCD LCD driver output when LCD segments VLCD1 corresponding to COM1 and COM3 are on VLCD2 0V VLCD LCD driver output when LCD segments VLCD1 corresponding to COM2 and COM3 are on VLCD2 0V VLCD LCD driver output when LCD segments VLCD1 corresponding to COM1, COM2 and COM3 are on VLCD2 0V Figure 26. LCD Waveform (1/3-Duty, 1/3-Bias, Frame Inversion) (Note20) (Note20) COM4 function is same as COM1 at 1/3-Duty. www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 32/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M 8. Frame Inversion 1/3-Duty 1/2-Bias Drive Scheme fo[Hz] VLCD COM1 VLCD1, VLCD2 0V VLCD COM2 VLCD1, VLCD2 0V VLCD COM3 VLCD1, VLCD2 0V LCD driver output when all LCD VLCD segment corresponding to COM1, VLCD1, VLCD2 COM2, COM3 and COM4 are off 0V VLCD LCD driver output when only LCD segments VLCD1, VLCD2 corresponding to COM1 are on 0V VLCD LCD driver output when only LCD segments VLCD1, VLCD2 corresponding to COM2 are on. 0V VLCD LCD driver output when only LCD segments VLCD1, VLCD2 corresponding to COM1 and COM2 are on. 0V VLCD LCD driver output when only LCD segments VLCD1, VLCD2 corresponding to COM3 are on. 0V VLCD LCD driver output when LCD segments VLCD1, VLCD2 corresponding to COM1 and COM3 are on 0V VLCD LCD driver output when LCD segments VLCD1, VLCD2 corresponding to COM2 and COM3 are on 0V VLCD LCD driver output when LCD segments VLCD1, VLCD2 corresponding to COM1, COM2 and COM3 are on 0V Figure 27. LCD Waveform (1/3-Duty, 1/2-Bias, Frame Inversion) (Note21) (Note21) COM4 function is same as COM1 at 1/3-Duty. www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 33/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M INHb Pin and Display Control Since the IC internal data (1/4-Duty: the display data D1 to D276 and the control data, 1/3-Duty: the display data D1 to D207 and the control data) is undefined when power is first applied, applications should set the INHb pin low at the same time as power is applied to turn off the display (This sets the S1/P1/G1 to S6/P6/G6, S7 to S69, COM1 to COM4 to the VSS level.) and during this period send serial data from the controller. The controller should then set the INHb pin high after the data transfer has completed. This procedure prevents meaningless displays at power on. 1. 1/4-Duty Figure 28. Power ON/OFF and INHb Control Sequence (1/4-Duty) (Note22) t1≥0, tc: min 10us 2. 1/3-Duty Figure 29. Power ON/OFF and INHb Control Sequence (1/3-Duty) (Note23) t1≥0, tc: min 10us www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 34/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M Oscillation Stabilization Time It must be noted that the oscillation of the internal oscillation circuit is unstable for a maximum of 100μs (oscillation stabilization time) after oscillation has started. Internal oscillation circuit Oscillation stopped Oscillation stabilization time (100 [us] max.) Oscillation operation (under normal conditions) <Oscillation start> 1.If the INHb pin status is switched from "L" to "H" when control data OC = "0" and BU0～ ="0" 2.If the contorol data BU is set from "1" to "0" when INHb = "H" and contorol data OC ="0" Figure 30. Oscillation Stabilization Time www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 35/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M Voltage Detection Type Reset Circuit (VDET) The Voltage Detection Type Reset Circuit generates an output signal that resets the system when power is applied for the first time and when the power supply voltage drops (that is, for example, the power supply voltage is less than or equal to the power down detection voltage (VDET = 1.8V typ.). To ensure that this reset function works properly, it is recommended that a capacitor be connected to the power supply line so that both the power supply voltage (VDD) rise time when power is first applied and the power supply voltage (VDD) fall time when the voltage drops are at least 1ms. t1 VDD t2 VDD min VDD min t3 VDD = 1.0V Figure 31. VDET Detection Timing Power supply voltage VDD fall time: t1 > 1ms Power supply voltage VDD rise time: t2 > 1ms Reset Condition The internal status after power supply has been reset as the following table. Instruction Key Scan mode S1/P1/G1 to S6/P6/G6 Pin LCD Bias LCD Duty Inversion DISPLAY Frequency Display Clock mode LCD Display Power Mode PWM/GPO Output PWM Frequency PWM Duty www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 At Reset Condition [KM0,KM1,KM2]=[1,1,1]: Keyscan no use [P0,P1,P2]=[0,0,0]:all segment output DR=0:1/3-Bias DT=0:1/4-Duty FL=0:Line Inversion [FC0,FC1,FC2]=[0,0,0]:fosc/12288 OC=0:Internal oscillator SC=1:OFF BU0 to 2=[1,1,1]:Power saving mode PGx=0:PWM output(x=1 to 6) [PF0,PF1,PF2,PF3]=[0,0,0,0]: fosc /4096 [Wn0 to Wn7]=[0,0,0,0,0,0,0,0] 1/256xTp(n=1 to 6,Tp=1/fp) 36/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M Operational Notes 1. Reverse Connection of Power Supply Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply pins. 2. Power Supply Lines Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic capacitors. 3. Ground Voltage Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition. 4. Ground Wiring Pattern When using both small-signal and large-current ground traces, the two ground traces should be routed separately but connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal ground caused by large currents. Also ensure that the ground traces of external components do not cause variations on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance. 5. Thermal Consideration Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in deterioration of the properties of the chip. The absolute maximum rating of the Pd stated in this specification is when the IC is mounted on a 70mm x 70mm x 1.6mm glass epoxy board. In case of exceeding this absolute maximum rating, increase the board size and copper area to prevent exceeding the Pd rating. 6. Recommended Operating Conditions These conditions represent a range within which the expected characteristics of the IC can be approximately obtained. The electrical characteristics are guaranteed under the conditions of each parameter. 7. Inrush Current When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing of connections. 8. Operation Under Strong Electromagnetic Field Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction. 9. Testing on Application Boards When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should always be turned off completely before connecting or removing it from the test setup during the inspection process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and storage. 10. Inter-pin Short and Mounting Errors Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin. Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and unintentional solder bridge deposited in between pins during assembly to name a few. www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 37/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M Operational Notes – continued 11. Unused Input Pins Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power supply or ground line. 12. Regarding the Input Pin of the IC In the construction of this IC, P-N junctions are inevitably formed creating parasitic diodes or transistors. The operation of these parasitic elements can result in mutual interference among circuits, operational faults, or physical damage. Therefore, conditions which cause these parasitic elements to operate, such as applying a voltage to an input pin lower than the ground voltage should be avoided. Furthermore, do not apply a voltage to the input pins when no power supply voltage is applied to the IC. Even if the power supply voltage is applied, make sure that the input pins have voltages within the values specified in the electrical characteristics of this IC. 13. Data transmission To refrain from data transmission is strongly recommended while power supply is rising up or falling down to prevent from the occurrence of disturbances on transmission and reception. www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 38/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M Ordering Information B U 9 1 5 2 0 Part Number K V Package KV : VQFP80 - ME2 Product Rank M: for Automotive Packaging Specification E2: Embossed tape and reel (VQFP80) None: Tray (VQFP80) Marking Diagram VQFP80 (TOP VIEW) Part Number Marking Lot Number Marking BU91520KV 1PIN MARK www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 39/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M Physical Dimension, Tape and Reel Information VQFP80 Package Name 1PIN MARK www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 40/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 BU91520KV-M Version / Revision History Version 001 Date 22.Jan.2016 New Release www.rohm.com © 2016 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 Description 41/41 TSZ02201-0P4P0D301340-1-2 22.Jan.2016 Rev.001 Notice Precaution on using ROHM Products 1. (Note 1) If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment , aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific Applications. (Note1) Medical Equipment Classification of the Specific Applications JAPAN USA EU CHINA CLASSⅢ CLASSⅡb CLASSⅢ CLASSⅢ CLASSⅣ CLASSⅢ 2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which a failure or malfunction of our Products may cause. The following are examples of safety measures: [a] Installation of protection circuits or other protective devices to improve system safety [b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our Products under any special or extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of product performance, reliability, etc, prior to use, must be necessary: [a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents [b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust [c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2 [d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves [e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items [f] Sealing or coating our Products with resin or other coating materials [g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] Use of the Products in places subject to dew condensation 4. The Products are not subject to radiation-proof design. 5. Please verify and confirm characteristics of the final or mounted products in using the Products. 6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied, confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect product performance and reliability. 7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in the range that does not exceed the maximum junction temperature. 8. Confirm that operation temperature is within the specified range described in the product specification. 9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in this document. Precaution for Mounting / Circuit board design 1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product performance and reliability. 2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products, please consult with the ROHM representative in advance. For details, please refer to ROHM Mounting specification Notice-PAA-E © 2015 ROHM Co., Ltd. All rights reserved. Rev.003 Precautions Regarding Application Examples and External Circuits 1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the characteristics of the Products and external components, including transient characteristics, as well as static characteristics. 2. You agree that application notes, reference designs, and associated data and information contained in this document are presented only as guidance for Products use. Therefore, in case you use such information, you are solely responsible for it and you must exercise your own independent verification and judgment in the use of such information contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such information. Precaution for Electrostatic This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron, isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control). Precaution for Storage / Transportation 1. Product performance and soldered connections may deteriorate if the Products are stored in the places where: [a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2 [b] the temperature or humidity exceeds those recommended by ROHM [c] the Products are exposed to direct sunshine or condensation [d] the Products are exposed to high Electrostatic 2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is exceeding the recommended storage time period. 3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of which storage time is exceeding the recommended storage time period. Precaution for Product Label A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only. Precaution for Disposition When disposing Products please dispose them properly using an authorized industry waste company. Precaution for Foreign Exchange and Foreign Trade act Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign trade act, please consult with ROHM in case of export. Precaution Regarding Intellectual Property Rights 1. All information and data including but not limited to application example contained in this document is for reference only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any other rights of any third party regarding such information or data. 2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the Products with other articles such as components, circuits, systems or external equipment (including software). 3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to manufacture or sell products containing the Products, subject to the terms and conditions herein. Other Precaution 1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM. 2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written consent of ROHM. 3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the Products or this document for any military purposes, including but not limited to, the development of mass-destruction weapons. 4. The proper names of companies or products described in this document are trademarks or registered trademarks of ROHM, its affiliated companies or third parties. Notice-PAA-E © 2015 ROHM Co., Ltd. All rights reserved. Rev.003 Datasheet General Precaution 1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents. ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny ROHM’s Products against warning, caution or note contained in this document. 2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s representative. 3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or concerning such information. Notice – WE © 2015 ROHM Co., Ltd. All rights reserved. Rev.001 Datasheet BU91520KV-M - Web Page Part Number Package Unit Quantity Minimum Package Quantity Packing Type Constitution Materials List RoHS BU91520KV-M VQFP80 1000 1000 Taping inquiry Yes