TI BQ24380DSGTG4 Overvoltage and overcurrent protection ic and li charger front-end protection ic with ldo mode Datasheet

bq24380
bq24381
bq24382
www.ti.com......................................................................................................................................................... SLUS805B – APRIL 2008 – REVISED MARCH 2009
Overvoltage and Overcurrent Protection IC and Li+ Charger Front-End Protection IC With
LDO Mode
FEATURES
DESCRIPTION
1
•
•
•
•
•
•
•
•
•
•
•
2
Input Overvoltage Protection
Accurate Battery Overvoltage Protection
Output Short-Circuit Protection
Soft-Start to Prevent Inrush Currents
Soft-Stop to Prevent Voltage Spikes
30-V Maximum Input Voltage
Supports up to 1.7-A Load Current
Thermal Shutdown
Enable Function
Fault Status Indication
Small 2 mm × 2 mm 8-Pin SON Package
The bq2438x family are charger front-end integrated
circuits designed to provide protection to Li-ion
batteries from failures of the charging circuitry. The IC
continuously monitors the input voltage and the
battery voltage. The device operates like a linear
regulator, maintaining a 5.5-V (bq24380) or 5-V
(bq24381, bq24382) output with input voltages up to
the Input overvoltage threshold. During input
overvoltage conditions, the IC immediately turns off
the internal pass FET disconnecting the charging
circuitry from the damaging input source. Additionally,
if the battery voltage rises to unsafe levels while
charging, power is removed from the system. The IC
checks for short-circuit or overload conditions at its
output when turning the pass FET on, and if it finds
unsafe conditions, it switches off, and then rechecks
the conditions. Additionally, the IC also monitors its
die temperature and switches off if it exceeds 140°C.
APPLICATIONS
•
•
•
•
Smart Phones, Mobile Phones
PDAs
MP3 Players
Low-Power Handheld Devices
When the IC is controlled by a processor, the IC
provides status information about fault conditions to
the host.
APPLICATION SCHEMATIC
AC Adapter
OUT 8
1 IN
VDC
GND
Charging
Circuit
1 mF
1 mF
bq24380
SYSTEM
VBAT 6
VSS
2
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008–2009, Texas Instruments Incorporated
bq24380
bq24381
bq24382
SLUS805B – APRIL 2008 – REVISED MARCH 2009......................................................................................................................................................... www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
(1)
DEVICE
VOVP
VO(REG)
PACKAGE (1)
bq24380
6.3 V
5.5 V
2mm x 2mm SON
CFE
bq24381
7.1 V
5V
2mm x 2mm SON
CFW
bq24382
10.5 V
5V
2mm x 2mm SON
OBE
MARKING
For the most current package and ordering information, see the Package Option Addendum at the end
of this document, or see the TI Web site at www.ti.com.
ABSOLUTE MAXIMUM RATINGS (1)
over operating free-air temperature range (unless otherwise noted)
VALUE
UNIT
IN (with respect to VSS)
–0.3 to 30
V
OUT (with respect to VSS)
–0.3 to 12
V
FAULT, CE, VBAT (with respect to VSS)
–0.3 to 7
V
VI
Input voltage
IOUTmax
Output source current
OUT
2
A
Output sink current
FAULT
15
mA
TJ
Junction temperature
–40 to 150
°C
Tstg
Storage temperature
–65 to 150
°C
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage
values are with respect to the network ground terminal unless otherwise noted.
DISSIPATION RATINGS
PACKAGE
RθJC
RθJA
DSG
5°C/W
75°C/W
RECOMMENDED OPERATING CONDITIONS
MIN
VI
IN voltage range
IO
Current, OUT pin
TJ
Junction temperature
2
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3.3
-40
MAX
30
UNIT
V
1.7
A
125
°C
Copyright © 2008–2009, Texas Instruments Incorporated
Product Folder Link(s): bq24380 bq24381 bq24382
bq24380
bq24381
bq24382
www.ti.com......................................................................................................................................................... SLUS805B – APRIL 2008 – REVISED MARCH 2009
ELECTRICAL CHARACTERISTICS
Over junction temperature range -40°C ≤ TJ ≤ 125°C and recommended supply voltage (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
IN
UVLO
Undervoltage lock-out, input power
detected threshold
CE = LO or HI, VIN: 0 V → 3 V
2.5
2.8
V
Vhys(UVLO)
Hysteresis on UVLO
CE = LO or HI, VIN: 3 V → 0 V
200
300
mV
tDGL(PGOOD)
Deglitch time, input power detected status
CE = LO or HI. Time measured from
VIN 0 V → 5 V 1-µs rise-time
IDD
Operating current
CE = LO, no load on OUT pin,
VIN = 5 V
ISTDBY
Standby current
8
ms
bq24380
250
bq24381
300
bq24382
300
µA
CE = HI, VIN = 5.5 V
100
µA
280
mV
10
µA
INPUT-TO-OUTPUT CHARACTERISTICS
VDO
Dropout voltage IN to OUT
CE = LO, VIN = 5 V, I(OUT) = 1 A
IOFF
Q1 off-state leakage current
CE = HI, VIN = 5.5 V
INPUT OVERVOLTAGE PROTECTION
VO(REG)
VOVP
Output voltage
CE = LO, VIN = 6 V
Input overvoltage protection threshold
CE = LO, VIN: 5 V → 8 V
CE = LO or HI, VIN: 7 V → 5 V
Vhys(OVP)
tPD(OVP) (1)
tREC(OVP)
Hysteresis on OVP
CE = LO or HI, VIN: 8 V → 5 V
Input OV propagation delay
VIN: 5 V → 10 V
Recovery time from input overvoltage condition
CE = LO. Time measured from
VIN: 7 V → 5 V, 1-µs fall-time
bq24380
5.3
5.5
5.7
bq24381
4.8
5
5.2
bq24382
4.8
5
5.2
bq24380
6.1
6.3
6.5
bq24831
6.88
7.1
7.31
bq24382
10.17
10.5
10.83
bq24380
25
110
bq24831
25
120
bq24382
150
300
V
V
mV
200
ns
8
ms
OUTPUT SHORT-CIRCUIT PROTECTION (only at start-up)
IO(SC)
Short-circuit detection threshold
tREC(SC)
Retry interval if short-circuit detected
3 V < VIN < VOVP - Vhys(OVP)
1.3
1.5
1.7
64
A
ms
BATTERY OVERVOLTAGE PROTECTION
BVOVP
Battery overvoltage protection threshold
VIN > 4.5 V, CE = LO
4.3
Vhys(BVovp)
Hysteresis on BV(OVP)
VIN > 4.5 V, CE = LO
200
I(VBAT)
Input bias current on VBAT pin
TJ = 25°C
Deglitch time, battery overvoltage detected
VIN > 4.5 V, CE = LO, Time measured from
VVSAT rising from 4.1 V to 4.4 V to FAULT
going low.
tDGL(BVovp)
4.35
4.4
V
320
mV
10
nA
µs
176
THERMAL PROTECTION
TJ(OFF)
Thermal shutdown temperature
TJ(OFF-HYS)
Thermal shutdown hysteresis
140
150
20
°C
°C
LOGIC LEVELS ON CE
VIL
Logic LOW input voltage
0
VIH
Logic HIGH input voltage
1.4
0.4
V
1
µA
VCE = 1.8 V
15
µA
IIL
IIH
V
LOGIC LEVELS ON FAULT
VOL
Output LOW voltage
ISINK = 5 mA
0.2
V
Ilkg
Off-state leakage current, HI-Z
VFAULT = 5 V
10
µA
(1)
Not tested. Specified by design
Copyright © 2008–2009, Texas Instruments Incorporated
Product Folder Link(s): bq24380 bq24381 bq24382
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bq24381
bq24382
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DEVICE INFORMATION
IN
1
VSS
2
8
OUT
7
NC
bq2438x
NC
3
6
VBAT
FAULT
4
5
CE
TERMINAL FUNCTIONS
TERMINAL
NAME
NO.
I/O
DESCRIPTION
IN
1
I
Input power, connected to external DC supply. Bypass IN to VSS with a ceramic capacitor (1 µF minimum)
VSS
2
–
Ground terminal. Connect to the thermal pad and to the ground rail of the circuit.
NC
3, 7
Do not connect to any external circuits. These pins may have internal connections used for test purposes.
FAULT
4
O
Open-drain device status output. FAULT is pulled to VSS internally when the input pass FET has been turned
off due to input overvoltage or output short-circuit conditions, an overtemperature condition, or because the
battery voltage is outside safe limits. FAULT is high impedance during normal operation.
CE
5
I
Active-low chip enable input. Connect CE = HI to turn the input pass FET off. Connect CE = LOW to turn the
internal pass FET on and connect the input to the charging circuitry. CE is Internally pulled down, ~200 kΩ.
VBAT
6
I
Battery voltage sense input. Connected to pack positive terminal through a 100-kΩ resistor.
OUT
8
O
Output terminal to the charging system. Bypass OUT to VSS with a ceramic capacitor (1 µF minimum)
Thermal PAD
4
The thermal pad is electrically connected to VSS internally. The thermal pad must be connected to the same
potential as the VSS pin on the printed circuit board. Do not use the thermal pad as the primary ground input
for the device. VSS pin must be connected to ground at all times.
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bq24380
bq24381
bq24382
www.ti.com......................................................................................................................................................... SLUS805B – APRIL 2008 – REVISED MARCH 2009
TYPICAL CHARACTERISTICS
NORMAL POWER-ON
SHOWING SOFT-START (bq24380)
OVP at POWER-ON
ROUT = 6.6 W
VIN
5 V/div
VIN
2 V/div
VOUT
500 mV/div
VOUT
2 V/div
IOUT
500 mA/div
VFAULT
2 V/div
t - Time - 2 ms/div
Figure 2.
t - Time - 2 ms/div
Figure 1.
OVP RESPONSE for INPUT STEP (bq24380)
SLOW INPUT RAMPINTO OVP EVENT (bq24380)
VIN = 6 V to 9 V step
VFAULT
2 V/div
VFAULT
2 V/div
VIN
2 V/div
VIN
2 V/div
VOUT
2 V/div
VOUT
2 V/div
t - Time - 5 ms/div
t - Time - 200 ms/div
Figure 4.
Figure 3.
RECOVERY FROM OVP (bq24380)
POWER UP INTO SHORT CIRCUIT
VIN = 10 V to 6 V step
VIN
5 V/div
VIN
5 V/div
VOUT
5 V/div
VFAULT
2 V/div
VOUT
2 V/div
IOUT
1 A/div
VFAULT
2 V/div
t - Time - 2 ms/div
Figure 5.
Copyright © 2008–2009, Texas Instruments Incorporated
Product Folder Link(s): bq24380 bq24381 bq24382
t - Time - 5 ms/div
Figure 6.
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bq24381
bq24382
SLUS805B – APRIL 2008 – REVISED MARCH 2009......................................................................................................................................................... www.ti.com
TYPICAL CHARACTERISTICS (continued)
SOFT-STOP DURING OCP EVENT (bq24380)
BATTERY OVP EVENT (bq24380)
VBAT
1 V/div
VIN
5 V/div
VOUT
2 V/div
VOUT
500 mV/div
VFAULT
2 V/div
IOUT
1 A/div
VBAT = 3.8 V to 4.5 V step
t - Time - 50 ms/div
t - Time - 20 ms/div
Figure 7.
Figure 8.
UVLO
vs
FREE-AIR TEMPERATURE
DROPOUT VOLTAGE
vs
FREE-AIR TEMPERATURE
250
2.75
IOUT = 1 A
210
VIN Rising
DROPOUT VOLTAGE - mV
UVLO - Undervoltage Lockout - V
2.70
2.65
2.60
2.55
2.50
VIN Falling
VIN = 4 V
170
VIN = 5 V
130
90
2.45
2.40
-40
-15
10
35
60
85
TA - Free-Air Temperature - °C
110
50
-40
135
-15
10
35
60
85
110
135
110
135
TA - Free-Air Temperature - °C
Figure 9.
Figure 10.
OUTPUT VOLTAGE REGULATION, VO(REG)
vs
FREE-AIR TEMPERATURE
OVP THRESHOLD
vs
FREE-AIR TEMPERATURE
5.60
7.4
bq24381
5.40
5.30
5.20
5.10
7.0
VIN Falling
6.8
6.6
VIN Rising
6.4
bq24381
6.2
5.00
4.90
–40
–15
10
35
60
85
110
135
6.0
–40
–15
10
35
60
85
TA – Free-Air Temperature – °C
Figure 11.
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VIN Falling
bq24380
TA – Free-Air Temperature – °C
6
VIN Rising
7.2
bq24380
VOVP – Threshold – V
VOUT(REG) – Output Voltage – V
5.50
Figure 12.
Copyright © 2008–2009, Texas Instruments Incorporated
Product Folder Link(s): bq24380 bq24381 bq24382
bq24380
bq24381
bq24382
www.ti.com......................................................................................................................................................... SLUS805B – APRIL 2008 – REVISED MARCH 2009
TYPICAL CHARACTERISTICS (continued)
OVP THRESHOLD, VBOVP
vs
FREE-AIR TEMPERATURE
LEAKAGE CURRENT (VBAT PIN)
vs
FREE-AIR TEMPERATURE
4.40
25
4.35
IIkg - Bat Leakage Current - nA
VBOVP - Threshold - V
VBAT Rising
4.30
4.25
4.20
4.15
20
15
10
5
VBAT Falling
4.10
4.05
-40
-15
10
35
60
85
TA - Free-Air Temperature - °C
110
0
-40
135
Figure 14.
SUPPLY CURRENT
vs
INPUT VOLTAGE (bq24380)
SUPPLY CURRENT
vs
INPUT VOLTAGE (bq24381)
110
135
1000
900
900
VO(REG)
VO(REG)
800
700
ICC – Supply Current – mA
800
ICC – Supply Current – mA
10
35
60
85
TA - Free-Air Temperature - °C
Figure 13.
1000
IC Enabled
600
500
400
300
IC Disabled
200
700
IC Enabled
600
500
400
300
IC Disabled
200
100
0
-15
100
0
5
10
15
20
VIN – Input Voltage – V
25
30
0
0
5
Figure 15.
10
15
20
VIN – Input Voltage – V
25
30
Figure 16.
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Product Folder Link(s): bq24380 bq24381 bq24382
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bq24381
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AC Adapter
OUT 8
1 IN
VDC
GND
Charging
Circuit
1 mF
1 mF
RBAT
VBAT 6
100 kW
SYSTEM
bq24380
FAULT 4
VSS
2
RPU
47 kW
RFAULT
47 kW
RCE
47 kW
CE 5
Figure 17. Typical Application Circuit
tSStart
tCHK(SC)
t
tSStopREC(SC)
tSStart
tPD(OVP)
tDGL(BVOVP)
tDGL(PGOOD)
tREC(OVP)
5
VOVP
VOVP-Vhys(OVP)
VO(REG)
Input
Voltage
UVLO
2
4
2
2
4
6
VO(REG)
1
Output
Voltage
7
IO(SC)
Output
Current
CE
FAULT
3
BV(OVP)
BV(OVP)-Vhys(BVOVP)
Battery
Voltage
1. Short-circuit during start-up
2. Normal start-up condition
3. Battery overvoltage event
4. VUVLO < VIN < VOREG -- VOUT tracks VIN
5. Input overvoltage event
6. Input below UVLO
7. High-current event during normal operation
Figure 18. Timing Diagram
8
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bq24381
bq24382
www.ti.com......................................................................................................................................................... SLUS805B – APRIL 2008 – REVISED MARCH 2009
DETAILED FUNCTIONAL DESCRIPTION
The bq2438x is a highly integrated circuit designed to provide protection to Li-ion batteries from failures of the
charging circuit and the input source. The IC continuously monitors the input voltage and the battery voltage. The
device operates like a linear regulator, maintaining a 5.5-V (bq24380) or 5-V (bq24381, bq24382) output with
input voltages up to the input overvoltage threshold (VOVP). If the input voltage exceeds VOVP, the IC shuts off the
pass FET and disconnects the system from input power. Additionally, if the battery voltage rises above 4.35 V,
the IC switches off the pass FET, removing the power from the system until the battery voltage falls to safe
levels. The IC also monitors its die temperature and switches the pass FET off if it exceeds 140°C.
The IC can be controlled by a processor, and also provides status information about fault conditions to the host.
POWER DOWN
The device remains in power-down mode when the input voltage at the IN pin is below the undervoltage
threshold (UVLO) of 2.8 V. The FET connected between the IN and OUT pins is off, and the status output,
FAULT, is set to HI-Z.
POWER ON RESET
The device resets when the input voltage at the IN pin exceeds the UVLO threshold. During power-on reset, the
IC waits for duration tDGL(PGOOD) for the input voltage to stabilize. If, after tDGL(PGOOD), the input voltage and battery
voltage are within operation limits, the pass FET is turned ON. The IC has a soft-start feature to control the
inrush current. The soft-start minimizes the ringing at the input due to the resonant circuit formed by the parasitic
inductance of the adapter cable and the input bypass capacitor. During the soft-start time, tSStart, the current limit
is stepped up in 8 equal steps every 625µs. Each step is 1/8 of the IO(SC). After the soft-start sequence is over,
the IC samples the load current. If the load current exceeds IO(SC), the IC initiates short circuit protection. See the
Startup Short-Circuit Protection section for details. If no overcurrent event is measured, the current monitoring
circuitry is disabled for normal operation.
In the event a short-circuit is detected at power-on, to prevent the input voltage from spiking up when the pass
FET is switched off (due to the inductance of the input cable), The pass FET is turned off by gradually reducing
its gate-drive, resulting in a soft-stop (tSStop).
DETAILED FUNCTIONAL DESCRIPTION
The device continuously monitors the input voltage and the battery voltage as described in detail below:
Input Overvoltage Protection
The OUT output of the bq2438x operates similar to a linear regulator. While the input voltage is less than
VO(REG), and above the UVLO, the output voltage tracks the input voltage (less the drop caused by RDS(on) of the
pass FET). When the input voltage is greater than VO(REG) (plus the RDS(on) drop) and less than VOVP, the output
voltage is regulated to VO(REG). VO(REG) is 5.5 V for the bq24380, and 5 V for the bq24381 and bq24382. If the
input voltage is increased above VOVP, the internal pass FET is turned off, removing power from the charging
circuitry connected to OUT. The FAULT output is then asserted low. When the input voltage drops below VOVP –
Vhys(OVP) (but is still above UVLO), the pass FET is turned on after a deglitch time of tREC(OVP). The deglitch time
ensures that the input supply has stabilized. The condition 5 in Figure 18 illustrates an input overvoltage event.
Battery Overvoltage Protection
The battery overvoltage threshold BVOVP is internally set to 4.35 V for the bq2438x. Condition 3 in Figure 18
illustrates a battery overvoltage event. If the battery voltage exceeds the BVOVP threshold for longer than
tDGL(BVovp), the pass FET is turned off (using soft-stop), and FAULT is asserted low. The pass FET is turned on
(using the soft-start sequence) once the battery voltage drops to BVOVP – Vhys(BVovp).
Thermal Protection
If the junction temperature of the device exceeds TJ(OFF), the pass FET is turned off, and the FAULT output is
asserted low. The FET is turned on when the junction temperature falls below TJ(OFF) – TJ(OFF-HYS).
Copyright © 2008–2009, Texas Instruments Incorporated
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Start-Up Short-Circuit Protection
The bq2438x features overload current protection during start-up. The condition 1 in Figure 18 illustrates start-up
into an overload condition. If after the eight soft-start steps are complete, and the current limit is exceeded, the IC
initiates a short-circuit check timer (tCHK(SC)). During this check, the current is clamped to IO(SC). If the 5-ms
tCHK(SC) timer expires and the current remains clamped by the current limit, the internal pass FET is turned off
using the soft-stop method, FAULT is pulled low and the tREC(SC) timer begins. Once the tREC(SC) timer expires,
FAULT becomes high impedance and the soft-start sequence restarts. The device repeats the start/fail sequence
until the overload condition is removed. Once the overload condition is removed, the current limit circuitry is
disabled and the device enters normal operation. Additionally, if the current is not limited after the completion of
the soft-start sequence, the tCHK(SC) timer does not start and the current limit circuitry is disabled for normal
operation.
Enable Function
The IC has an enable pin which is used to enable and disable the device. Connect the CE pin high to turn off the
internal pass FET. Connect the CE pin low to turn on the internal pass FET and enter the start-up routine. The
CE pin has an internal pulldown resistor and can be left unconnected. The FAULT pin is high impedance when
the CE pin is high.
Fault Indication
The FAULT pin is an active-low, open-drain output. It is in a high-impedance state when operating conditions are
safe, or when the device is disabled by setting CE high. With CE low, the FAULT pin goes low whenever any of
these events occurs:
1. Output short-circuit at power-on
2. Input overvoltage
3. Battery overvoltage
4. IC overtemperature
See Figure 18 for an example of FAULT conditions during these events. Connect the FAULT pin to the desired
logic level voltage rail through a resistor between 1 kΩ and 50 kΩ.
10
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bq24381
bq24382
www.ti.com......................................................................................................................................................... SLUS805B – APRIL 2008 – REVISED MARCH 2009
APPLICATION INFORMATION
Selection of R(BAT)
It is recommended that the battery not be tied directly to the VBAT pin of the device, as under some failure
modes of the IC, the voltage at the IN pin may appear on the VBAT pin. This voltage can be as high as 30 V,
and applying 30 V to the battery may cause failure of the device and can be hazardous. Connecting the VBAT
pin through R(BAT) prevents a large current from flowing into the battery in the event of failure. For safety, R(BAT)
must have a high value. The problem with a large R(BAT) is that the voltage drops across the resistor because of
the VBAT bias current, I(VBAT), which causes an error in the BVOVP threshold. This error is over and above the
tolerance on the nominal 4.35-V BVOVP threshold.
Choosing R(BAT) in the range of 100 kΩ to 470 kΩ is a good compromise. If the IC fails with R(BAT) equal to 100
kΩ, the maximum current flowing into the battery would be (30 V – 3 V) ÷ 100 kΩ = 246 µA, which is low enough
to be absorbed by the bias currents of the system components. R(BAT) equal to 100 kΩ results in a worst-case
voltage drop of R(BAT) × I(VBAT) ≈ 1 mV. This is negligible compared to the internal tolerance of 50 mV on the
BVOVP threshold.
If the Bat-OVP function is not required, the VBAT pin must be connected to VSS.
Selection of R(CE)
The CE pin can be used to enable and disable the IC. If host control is not required, the CE pin can be tied to
ground or left unconnected, permanently enabling the device.
In applications where external control is required, the CE pin can be controlled by a host processor. As with the
VBAT pin (see previous discussion), the CE pin must be connected to the host GPIO pin through as large a
resistor as possible. The limitation on the resistor value is that the minimum VOH of the host GPIO pin less the
drop across the resistor must be greater than VIH of the bq2430x CE pin. The drop across the resistor is given by
R(CE) × IIH.
Selection of Input and Output Bypass Capacitors
The input capacitor CIN in Figure 17 is for decoupling and serves an important purpose. Whenever a step change
downwards in the system load current occurs, the inductance of the input cable causes the input voltage to spike
up. CIN prevents the input voltage from overshooting to dangerous levels. It is recommended that a ceramic
capacitor of at least 1 µF be used at the input of the device. It must be located in close proximity to the IN pin.
COUT in Figure 17 is also important. During an overvoltage transient, this capacitance limits the output overshoot
until the power FET is turned off by the overvoltage protection circuitry. COUT must be a ceramic capacitor of at
least 1 µF, located close to the OUT pin. COUT also serves as the input decoupling capacitor for the charging
circuit downstream of the protection IC.
PCB Layout Guidelines
1. This device is a protection device and is meant to protect down-stream circuitry from hazardous voltages.
Potentially, high voltages may be applied to this IC. It has to be ensured that the edge-to-edge clearances of
PCB traces satisfy the design rules for the maximum voltages expected to be seen in the system.
2. The device uses SON packages with a PowerPAD™. For good thermal performance, the PowerPAD must
be thermally coupled with the PCB ground plane. In most applications, this requires a copper pad directly
under the IC. This copper pad should be connected to the ground plane with an array of thermal vias.
3. CIN and COUT should be located close to the IC. Other components like R(BAT) should also be located close to
the IC.
Copyright © 2008–2009, Texas Instruments Incorporated
Product Folder Link(s): bq24380 bq24381 bq24382
Submit Documentation Feedback
11
PACKAGE OPTION ADDENDUM
www.ti.com
23-Mar-2009
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
BQ24380DSGR
ACTIVE
SON
DSG
8
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24380DSGRG4
ACTIVE
SON
DSG
8
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24380DSGT
ACTIVE
SON
DSG
8
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24380DSGTG4
ACTIVE
SON
DSG
8
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24381DSGR
ACTIVE
SON
DSG
8
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24381DSGRG4
ACTIVE
SON
DSG
8
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24381DSGT
ACTIVE
SON
DSG
8
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24381DSGTG4
ACTIVE
SON
DSG
8
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24382DSGR
ACTIVE
SON
DSG
8
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24382DSGT
ACTIVE
SON
DSG
8
250
CU NIPDAU
Level-2-260C-1 YEAR
Green (RoHS &
no Sb/Br)
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Mar-2009
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
BQ24380DSGR
SON
DSG
8
SPQ
Reel
Reel
Diameter Width
(mm) W1 (mm)
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
W
Pin1
(mm) Quadrant
3000
179.0
8.4
2.2
2.2
1.2
4.0
8.0
Q2
BQ24380DSGT
SON
DSG
8
250
179.0
8.4
2.2
2.2
1.2
4.0
8.0
Q2
BQ24381DSGR
SON
DSG
8
3000
179.0
8.4
2.2
2.2
1.2
4.0
8.0
Q2
BQ24381DSGT
SON
DSG
8
250
179.0
8.4
2.2
2.2
1.2
4.0
8.0
Q2
BQ24382DSGR
SON
DSG
8
3000
179.0
8.4
2.2
2.2
1.2
4.0
8.0
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Mar-2009
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
BQ24380DSGR
SON
DSG
8
3000
195.0
200.0
45.0
BQ24380DSGT
SON
DSG
8
250
195.0
200.0
45.0
BQ24381DSGR
SON
DSG
8
3000
195.0
200.0
45.0
BQ24381DSGT
SON
DSG
8
250
195.0
200.0
45.0
BQ24382DSGR
SON
DSG
8
3000
195.0
200.0
45.0
Pack Materials-Page 2
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