ACE ACE24AC64DNTH Two-wire serial eeprom Datasheet

ACE24AC64
Two-wire Serial EEPROM
Description
The ACE24AC64 series are 65,536 bits of serial Electrical Erasable and Programmable Read Only
Memory, commonly known as EEPROM. They are organized as 8192 words of 8 bits (one byte) each.
The devices are fabricated with proprietary advanced CMOS process for low power and low voltage
applications. These devices are available in standard 8-lead DIP, 8-lead SOP, 8-lead MSOP, 8-lead
TSSOP, 8-lead TDFN and SOT-23-5 packages. A standard 2-wire serial interface is used to address all
read and write functions. Our extended V CC range (1.8V to 5.5V) devices enables wide spectrum of
applications.
Features

Low voltage and low power operations:
ACE24AC64: VCC = 1.8V to 5.5V

Maximum Standby current < 1µA

32 bytes page write mode.

Partial page write operation allowed.

Internally organized: 8,192 × 8 (64K).

Standard 2-wire bi-directional serial interface.

Schmitt trigger, filtered inputs for noise protection.

Self-timed Write Cycle (5ms maximum).

800 kHz (5V), 400 kHz (1.8V) Compatibility.

Automatic erase before write operation.

Write protect pin for hardware data protection.

High reliability: typically 1,000,000 cycles endurance.

100 years data retention.

Industrial temperature range (-40℃ to 85℃).

Standard 8-lead DIP/SOP/MSOP/TSSOP/TDFN and SOT-23-5 Pb-free packages.
Absolute Maximum Ratings
Industrial operating temperature:
-40℃ to 85℃
Storage temperature:
-50℃ to 125℃
Input voltage on any pin relative to ground:
-0.3V to VCC + 0.3V
Maximum voltage:
8V
ESD Protection on all pins:
>2000V
Notice: Stresses exceed those listed under “Absolute Maximum Rating” may cause permanent damage to the device. Functional
operation of the device at conditions beyond those listed in the specification is not guaranteed. Prolonged exposure to extreme
conditions may affect device reliability or functionality.
VER 1.1
1
ACE24AC64
Two-wire Serial EEPROM
Packaging Type
DIP-8
SOP-8
TDFN-8
SOT-23-5
TSSOP-8
MSOP-8
Pin Configurations
Pin Name
Functions
AO-A2
Device Address Inputs
SDA
Serial Data Input / Open Drain Output
SCL
Serial Clock Input
WP
Write Protect
NC
No-Connect
VCC
Power Supply
GND
Ground
Ordering information
ACE24AC64 XX
+
X
H
Halogen-free
U : Tube
T : Tape and Reel
Pb - free
DP : DIP-8
FM : SOP-8
OM : MSOP-8
TM : TSSOP-8
DN : TDFN8
BN:SOT-23-5
VER 1.1
2
ACE24AC64
Two-wire Serial EEPROM
Block Diagram
Pin Descriptions
(A)
SERIAL CLOCK (SCL)
The rising edge of this SCL input is to latch data into the EEPROM device while the falling edge of
this clock is to clock data out of the EEPROM device.
(B)
DEVICE / CHIP SELECT ADDRESSES (A2, A1, A0)
These are the chip select input signals for the serial EEPROM devices. Typically, these signals are
hardwired to either VIH or VIL. If left unconnected, they are internally recognized as VIL.
(C)
SERIAL DATA LINE (SDA)
SDA data line is a bi-directional signal for the serial devices. It is an open drain output signal and can
be wired-OR with other open-drain output devices.
(D)
WRITE PROTECT (WP)
The ACE24AC64 devices have a WP pin to protect the whole EEPROM array from programming.
Programming operations are allowed if WP pin is left un-connected or input to VIL. Conversely all
programming functions are disabled if WP pin is connected to VIH or VCC. Read operations is not
affected by the WP pin’s input level.
VER 1.1
3
ACE24AC64
Two-wire Serial EEPROM
Memory Organization
The ACE24AC64 devices have 256 pages respectively. Since each page has 32 bytes, random word
addressing to ACE24AC64 will require 13 bits data word addresses respectively.
Device Operation
(A)
SERIAL CLOCK AND DATA TRANSITIONS
The SDA pin is typically pulled to high by an external resistor. Data is allowed to change only when
Serial clock SCL is at VIL. Any SDA signal transition may interpret as either a START or STOP
condition as described below.
(B)
START CONDITION
With SCL VIH, a SDA transition from high to low is interpreted as a START condition. All valid
commands must begin with a START condition.
(C)
STOP CONDITION
With SCL VIH, a SDA transition from low to high is interpreted as a STOP condition. All valid read or
write commands end with a STOP condition. The device goes into the STANDBY mode if it is after a
read command. A STOP condition after page or byte write command will trigger the chip into the
STANDBY mode after the self-timed internal programming finish (see Figure 1).
(D)
ACKNOWLEDGE
The 2-wire protocol transmits address and data to and from the EEPROM in 8 bit words. The
EEPROM acknowledges the data or address by outputting a "0" after receiving each word. The
ACKNOWLEDGE signal occurs on the 9 th serial clock after each word.
STANDBY MODE
(E)
The EEPROM goes into low power STANDBY mode after a fresh power up, after receiving a STOP
bit in read mode, or after completing a self-time internal programming operation.
Figure 1: Timing diagram for START and STOP conditions
VER 1.1
4
ACE24AC64
Two-wire Serial EEPROM
Figure 2: Timing diagram for output ACKNOWLEDGE
Device Addressing
The 2-wire serial bus protocol mandates an 8 bits device address word after a START bit condition to
invoke a valid read or write command. The first four most significant bits of the device address must be
1010, which is common to all serial EEPROM devices. The next three bits are device address bits. These
three device address bits (5 th, 6th and 7th) are to match with the external chip select/address pin states. If a
match is made, the EEPROM device outputs an ACKNOWLEDGE signal after the 8 th read/write bit,
otherwise the chip will go into STANDBY mode. However, matching may not be needed for some or all
device address bits (5th, 6thand 7th) as noted below. The last or 8th bit is a read/write command bit. If the
8th bit is at VIH then the chip goes into read mode. If a “0” is detected, the device enters programming
mode.
Write Operations
(A)
BYTE WRITE
A write operation requires two 8-bit data word address following the device address word and
ACKNOWLEDGE signal. Upon receipt of this address, the EEPROM will respond with a “0” and then
clock in the first 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will again
output a “0”. The addressing device, such as a microcontroller, must terminate the write sequence
with
a STOP condition. At this time the EEPROM enters into an internally-timed write cycle state.
All inputs are disabled during this write cycle and the EEPROM will not respond until the writing is
completed (figure 3).
VER 1.1
5
ACE24AC64
Two-wire Serial EEPROM
(B)
PAGE WRITE
The 64K EEPROM are capable of 32-byte page write.
A page write is initiated the same way as a byte write, but the microcontroller does not send a STOP
condition after the first data word is clocked in. The microcontroller can transmit up to 31 more data
words after the EEPROM acknowledges receipt of the first data word. The EEPROM will respond
with a “0” after each data word is received. The microcontroller must terminate the page write
sequence with a STOP condition (see Figure 4).
The lower five bits of the data word address are internally incremented following the receipt of each
data word. The higher data word address bits are not incremented, retaining the memory page row
location.
If more than 32 data words are transmitted to the EEPROM, the data word address will
“roll over” and the previous data will be overwritten.
(C)
ACKNOWLEDGE POLLING
ACKNOWLEDGE polling may be used to poll the programming status during a self-timed internal
programming. By issuing a valid read or write address command, the EEPROM will not acknowledge
at the 9th clock cycle if the device is still in the self-timed programming mode. However, if the
programming completes and the chip has returned to the STANDBY mode, the device will return a
valid ACKNOWLEDGE signal at the 9th clock cycle.
Read Operations
The read command is similar to the write command except the 8th read/write bit in address word is set to
“1”. The three read operation modes are described as follows:
(A)
CURRENT ADDRESS READ
The EEPROM internal address word counter maintains the last read or write address plus one if the
power supply to the device has not been cut off. To initiate a current address read operation, the
micro- controller issues a START bit and a valid device address word with the read/write bit (8 th) set
to “1”. The EEPROM will response with an ACKNOWLEDGE signal on the 9th serial clock cycle. An
8-bit data word will then be serially clocked out. The internal address word counter will then
automatically increase by one. For current address read the micro-controller will not issue an
ACKNOWLEDGE signal on the 18th clock cycle. The micro-controller issues a valid STOP bit after
the 18th clock cycle to terminate the read operation.
(see Figure 5).
(B)
The device then returns to STANDBY mode
SEQUENTIAL READ
The sequential read is very similar to current address read. The micro-controller issues a START bit
and a valid device address word with read/write bit (8 th) set to “1”. The EEPROM will response with
an ACKNOWLEDGE signal on the 9 th serial clock cycle. An 8-bit data word will then be serially
clocked out. Meanwhile the internally address word counter will then automatically increase by one.
Unlike current address read, the micro-controller sends an ACKNOWLEDGE signal on the 18th
VER 1.1
6
ACE24AC64
Two-wire Serial EEPROM
clock cycle signaling the EEPROM device that it wants another byte of data. Upon receiving the
ACKNOWLEDGE signal, the EEPROM will serially clocked out an 8-bit data word based on the
incremented internal address counter. If the micro-controller needs another data, it sends out an
ACKNOWLEDGE signal on the 27 th clock cycle. Another 8-bit data word will then be serially clocked
out. This sequential read continues as long as the micro-controller sends an ACKNOWLEDGE signal
after receiving a new data word. When the internal address counter reaches its maximum valid
address, it rolls over to the beginning of the memory array address. Similar to current address read,
the micro- controller can terminate the sequential read by not acknowledging the last data word
received, but sending a STOP bit afterwards instead (figure 6).
(C)
RANDOM READ
Random read is a two-steps process. The first step is to initialize the internal address counter with a
target read address using a “dummy write” instruction. The second step is a current address read.
To initialize the internal address counter with a target read address, the micro-controller issues a
START bit first, follows by a valid device address with the read/write bit (8 th) set to “0”. The EEPROM
will then acknowledge. The micro-controller will then send two address words. Again the EEPROM
will acknowledge. Instead of sending a valid written data to the EEPROM, the micro-controller
performs a current address read instruction to read the data. Note that once a START bit is issued,
the EEPROM will reset the internal programming process and continue to execute the new
instruction - which is to read the current address (figure 7).
Figure 3: Byte Write
Figure 4: Page Write
VER 1.1
7
ACE24AC64
Two-wire Serial EEPROM
Figure 5: Current Address Read
Figure 6: Sequential Read
Figure 7: Random Read
Notes: 1) * = Don’t Care bits
Figure 8: SCL and SDA Bus Timing
VER 1.1
8
ACE24AC64
Two-wire Serial EEPROM
AC Characteristics
2.5V≦VCC≦5.5V
1.8V
Symbol
Parameter
fSCL
Clock Frequency, SCL
TLOW
Clock Pulse Width Low
1.2
0.9
µs
THIGH
Clock Pulse Width High
0.4
0.3
µs
TI
Noise Suppression Time(1)
TAA
Clock Low to Data Out Valid
Min
Time the bus must be free before a new
TBUF
transmission can Start
(1)
Max
Min
400
800
100
0.3
1.2
Units
Max
0.2
kHz
50
ns
0.9
µs
1.3
1.2
µs
THD.STA
Start Hold Time
0.6
0.6
µs
TSU.STA
Start Setup Time
0.6
0.6
µs
THD.DAT
Data In Hold Time
0
0
µs
TSU.DAT
Data In Setup Time
100
100
ns
TR
Inputs Rise Time(1)
0.3
0.3
µs
TF
(1)
300
300
ns
Inputs Fall Time
TSU.STO
Stop Setup Time
0.6
0.6
µs
TDH
Data Out Hold Time
200
50
ns
TWR
Write Cycle Time (for 04B/16B)
Endurance(1)
25℃, Page Mode, 3.3V
5
1,000,000
5
ms
Write
Cycles
Notes: 1. This Parameter is expected by characterization but are not fully screened by test.
2. AC Measurement conditions: RL (Connects to Vcc): 1.3KΩ
Input Pulse Voltages: 0.3Vcc to 0.7Vcc
Input and output timing reference Voltages: 0.5Vcc
VER 1.1
9
ACE24AC64
Two-wire Serial EEPROM
DC Characteristics
Symbol
Parameter
Test Condition
VCC1
24C××A supply VCC
ICC
Supply Read Current
[email protected] SCL=400 kHz
ICC
Supply Write Current
[email protected] SCL=400 kHz
ISB1
Supply Current
ISB2
Min
Typ
Max
Units
5.5
V
0.4
1.0
mA
2.0
3.0
mA
[email protected],VIN = VCC or VSS
1.0
µA
Supply Current
[email protected],VIN = VCC or VSS
1.0
µA
ISB3
Supply Current
[email protected],VIN = VCC or VSS
1.0
µA
ILI
Input Leakage Current
VIN= VCC or VSS
3.0
µA
ILO
Output Leakage Current
VIN= VCC or VSS
3.0
µA
VIL
Input Low Level
-0.6
VCC*0.3
V
VIH
Input High Level
VCC*0.7
VCC+0.5
V
VOL2
Output Low Level
[email protected], IOL= 2.1 mA
0.4
V
VOL1
Output Low Level
[email protected], IOL= 0.15 mA
0.2
V
1.8
VER 1.1
10
ACE24AC64
Two-wire Serial EEPROM
Packaging information
DIP-8
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
3.710
4.310
0.146
0.170
A1
0.510
A2
3.200
3.600
0.126
0.142
B
0.380
0.570
0.015
0.022
B1
0.020
1.524(BSC)
0.060(BSC)
C
0.204
0.360
0.008
0.014
D
9.000
9.400
0.354
0.370
E
6.200
6.600
0.244
0.260
E1
7.320
7.920
0.288
0.312
e
2.540 (BSC)
0.100(BSC)
L
3.000
3.600
0.118
0.142
E2
8.400
9.000
0.331
0.354
VER 1.1
11
ACE24AC64
Two-wire Serial EEPROM
Packaging information
SOP-8
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
1.350
1.750
0.053
0.069
A1
0.100
0.250
0.004
0.010
A2
1.350
1.550
0.053
0.061
b
0.330
0.510
0.013
0.020
c
0.170
0.250
0.006
0.010
D
4.700
5.100
0.185
0.200
E
3.800
4.000
0.150
0.157
E1
5.800
6.200
0.228
0.244
e
1.270 (BSC)
0.050 (BSC)
L
0.400
1.270
0.016
0.050
θ
0°
8°
0°
8°
VER 1.1
12
ACE24AC64
Two-wire Serial EEPROM
Packaging information
MSOP-8
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
0.820
1.100
0.320
0.043
A1
0.020
0.150
0.001
0.006
A2
0.750
0.950
0.030
0.037
b
0.250
0.380
0.010
0.015
c
0.090
0.230
0.004
0.009
D
2.900
3.100
0.114
0.122
e
0.65 (BSC)
0.026 (BSC)
E
2.900
3.100
0.114
0.122
E1
4.750
5.050
0.187
0.199
L
0.400
0.800
0.016
0.031
θ
0°
6°
0°
6°
VER 1.1
13
ACE24AC64
Two-wire Serial EEPROM
Packaging information
TSSOP-8
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
D
2.900
3.100
0.114
0.122
E
4.300
4.500
0.169
0.177
b
0.190
0.300
0.007
0.012
c
0.090
0.200
0.004
0.008
E1
6.250
6.550
0.246
0.258
A
1.100
0.043
A2
0.800
1.000
0.031
0.039
A1
0.020
0.150
0.001
0.006
e
L
0.65 (BSC)
0.500
H
θ
0.026 (BSC)
0.700
0.020
0.25 (TYP)
1°
0.028
0.01 (TYP)
7°
1°
7°
VER 1.1
14
ACE24AC64
Two-wire Serial EEPROM
Packaging information
TDFN-8
Symbol
A
Dimensions In Millimeters
Min
Nom
Max
0.70
0.75
0.80
0.02
0.05
A1
b
0.18
0.25
0.03
c
0.18
0.20
0.25
D
1.90
2.00
2.10
D2
1.50REF
e
0.50BSC
Nd
1.50BSC
E
2.90
E2
3.00
3.10
1.60REF
L
0.30
0.40
0.50
h
0.20
0.25
0.30
VER 1.1
15
ACE24AC64
Two-wire Serial EEPROM
Packaging information
SOT-23-5
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
1.050
1.250
0.041
0.049
A1
0.000
0.100
0.000
0.004
A2
1.050
1.150
0.041
0.045
b
0.300
0.500
0.012
0.020
c
0.100
0.200
0.004
0.008
D
2.820
3.020
0.111
0.119
E
1.500
1.700
0.059
0.067
E1
2.650
2.950
0.104
0.116
e
0.95 (BSC)
0.037 (BSC)
e1
1.800
2.000
0.071
0.079
L
0.300
0.600
0.012
0.024
θ
0°
8°
0°
6°
VER 1.1
16
ACE24AC64
Two-wire Serial EEPROM
Notes
ACE does not assume any responsibility for use as critical components in life support devices or systems
without the express written approval of the president and general counsel of ACE Electronics Co., LTD.
As sued herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and shoes failure to perform when properly used in
accordance with instructions for use provided in the labeling, can be reasonably expected to result in
a significant injury to the user.
2. A critical component is any component of a life support device or system whose failure to perform can
be reasonably expected to cause the failure of the life support device or system, or to affect its safety
or effectiveness.
ACE Technology Co., LTD.
http://www.ace-ele.com/
VER 1.1
17
Similar pages