ON NCP4588DMX15TCG 200 ma, output capacitor free, ldo linear voltage regulator Datasheet

NCP4588
200 mA, Output Capacitor
Free, LDO Linear Voltage
Regulator
The NCP4588 is a CMOS 200mA LDO which is stable without an
output capacitor. This results in a reduction in component count, cost
and board area, as well as contributing to a more robust solution in
hostile environments. With quiescent current < 9.5 mA and
PSRR > 60 dB, the device is an excellent trade off between the two
features. The family is available in a variety of packages: SC−70,
SOT23 and a small, ultra thin 1.2 x 1.2 x 0.4 mm XDFN.
Features
•
•
•
•
•
•
•
•
•
•
•
•
Operating Input Voltage Range: 1.4 V to 5.25 V
Output Voltage Range: 1.0 to 4.2 V (available in 0.1 V steps)
Output Voltage Accuracy: 1%
Quiescent Current: 9.5 mA
Standby Current: 0.1 mA
Very Low Dropout: 270 mV (IOUT = 200 mA, VIN = 3.0 V)
High PSRR: 70 dB at 1 kHz, VOUT ≤ 1.2 V
65 dB at 1 kHz, 1.2 < VOUT < 2.2 V
60 dB at 1 kHz, VOUT ≥ 2.2 V
Line Regulation 0.02%/V Typ.
Current Fold Back Protection: 50 mA at short
Stable with no Output Capacitor
Available in SC−70, XDFN and SOT23 Package
These are Pb−Free Devices
Typical Applications
• Battery Powered Equipments
• Portable Communication Equipments
• Cameras, VCRs and Camcorders
VIN
C1
100 n
VOUT
VOUT
GND
SC−70
CASE 419A
XDFN6
CASE 711AA
XXX MG
G
XX
MM
XX
M
SOT−23−5
CASE 1212
XX, XXX= Specific Device Code
M, MM = Date Code
A
= Assembly Location
Y
= Year
W
= Work Week
G
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 14 of this data sheet.
C2
100n*
CE
MARKING
DIAGRAMS
(Note: Microdot may be in either location)
NCP4588x
VIN
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* output capacitor
may be omitted
Figure 1. Typical Application Schematic
© Semiconductor Components Industries, LLC, 2013
February, 2013 − Rev. 1
1
Publication Order Number:
NCP4588/D
NCP4588
VIN
VIN
VOUT
Vref
Vref
Current Limit
CE
VOUT
Current Limit
CE
GND
GND
NCP4588Dxxxxxxx
NCP4588Hxxxxxxx
Figure 2. Simplified Schematic Block Diagram
PIN FUNCTION DESCRIPTION
Pin No.
XDFN
Pin No.
SC−70
Pin No.
SOT23
4
5
1
VIN
Input pin
2
3
2
GND
Ground
3
1
3
CE
6
4
5
VOUT
1, 5
2
4
NC
Pin Name
Description
Chip enable pin (Active “H”)
Output pin
No connection
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VIN
6.0
V
Output Voltage
VOUT
−0.3 to VIN + 0.3
V
Chip Enable Input
VCE
−0.3 to 6.0
V
Output Current
IOUT
400
mA
PD
400
mW
Input Voltage (Note 1)
Power Dissipation XDFN
Power Dissipation SC70
380
Power Dissipation SOT23
420
Junction Temperature
TJ
−40 to 150
°C
Storage Temperature
TSTG
−55 to 125
°C
ESD Capability, Human Body Model (Note 2)
ESDHBM
2000
V
ESD Capability, Machine Model (Note 2)
ESDMM
200
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
Latchup Current Maximum Rating tested per JEDEC standard: JESD78.
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2
NCP4588
THERMAL CHARACTERISTICS
Symbol
Value
Unit
Thermal Characteristics, XDFN
Thermal Resistance, Junction−to−Air
Rating
RqJA
250
°C/W
Thermal Characteristics, SOT23
Thermal Resistance, Junction−to−Air
RqJA
238
°C/W
Thermal Characteristics, SC−70
Thermal Resistance, Junction−to−Air
RqJA
263
°C/W
ELECTRICAL CHARACTERISTICS
−40°C ≤ TA ≤ 85°C; VIN = VOUT(NOM) + 1 V; IOUT = 1 mA; CIN = COUT = 1 mF; unless otherwise noted. Typical values are at TA = +25°C.
Parameter
Test Conditions
Symbol
Min
Max
Unit
VIN
1.4
5.25
V
VOUT
x0.99
x1.01
V
VOUT ≤ 2.0 V
−20
20
mV
VOUT > 2.0 V
x0.980
x1.015
V
VOUT ≤ 2.0 V
−40
30
mV
Operating Input Voltage
Output Voltage
TA = +25 °C
VOUT > 2.0 V
−40°C ≤ TA ≤ 85°C
Output Voltage Temp.
Coefficient
Line Regulation
Load Regulation
Dropout Voltage
−40°C ≤ TA ≤ 85°C
100
LineReg
IOUT = 1 mA to 200 mA
LineReg
VDO
1.1 V ≤ VOUT < 1.5 V
0.59
0.84
1.2 V ≤ VOUT < 1.8 V
0.55
0.76
1.5 V ≤ VOUT < 2.3 V
0.44
0.60
2.0 V ≤ VOUT < 3.0 V
0.35
0.49
2.6 V ≤ VOUT < 4.0 V
0.27
0.36
IOUT = 200 mA
1.0 V ≤ VOUT < 1.3 V
IOUT
VOUT = 0 V
Quiescent Current
50
mV
0.92
V
200
mA
9.5
25
mA
0.1
3.0
mA
CE Pin Threshold Voltage
CE Input Voltage “H”
VCEH
CE Input Voltage “L”
VCEL
VIN = VOUT + 1 V or 2.2 V whichever is higher,
DVIN = 0.2 Vpk−pk, IOUT = 30 mA, f = 1 kHz
PSRR
Low Output Nch Tr. On
Resistance
25
0.64
IQ
ISTB
Output Noise Voltage
%/V
50
VCE = 0 V, TA = 25°C
Power Supply Rejection Ratio
0.2
ISC
Standby Current
CE Pull Down Current
0.02
ppm/°C
VOUT(NOM) + 0.5 V ≤ VIN ≤ 5.0 V
Output Current
Short Current Limit
Typ
ICEPD
mA
V
1.0
0.4
0.1
mA
dB
VOUT ≤ 1.2 V
70
1.2 V < VOUT ≤ 2.2 V
65
2.2 V ≤ VOUT
60
VOUT = 1 V, IOUT = 30 mA, f = 10 Hz to 100 kHz
VN
80
mVrms
VIN = 4 V, VCE = 0 V, D version only
RLOW
30
W
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NCP4588
TYPICAL CHARACTERISTICS
1.2
1.6
1.4
1.0
1.8 V
2.0 V
VIN = 1.4 V
0.6
0.4
3.5 V
VIN = 3.0 V
1.2
VOUT (V)
VOUT (V)
0.8
3.0 V
4.5 V
1.0
0.8
0.6
0.4
0.2
0.0
0.2
0
100
200
300
IOUT (mA)
400
0.0
500
0
100
Figure 3. Output Voltage vs. Output Current
1.0 V Version (TA = 255C)
500
1.2
2.5
1.0
4.5 V
3.5 V
2.0
0.8
VIN = 3.0 V
VDO (V)
VOUT (V)
400
Figure 4. Output Voltage vs. Output Current
1.5 V Version (TA = 255C)
3.0
1.5
0.4
0.5
0.2
0
100
200
300
IOUT (mA)
400
0.0
500
25°C
85°C
0.6
1.0
0.0
200
300
IOUT (mA)
−40°C
0
Figure 5. Output Voltage vs. Output Current
2.5 V Version (TA = 255C)
50
100
150
IOUT (mA)
200
250
300
Figure 6. Dropout Voltage vs. Output Current
1.0 V Version
0.6
0.8
0.7
0.5
0.4
25°C
0.5
0.4
VDO (V)
VDO (V)
0.6
85°C
0.3
−40°C
25°C
0.3
85°C
0.2
−40°C
0.2
0.1
0.1
0.0
0
50
100
150
200
250
0.0
0
300
50
100
150
200
250
IOUT (mA)
IOUT (mA)
Figure 7. Dropout Voltage vs. Output Current
1.5 V Version
Figure 8. Dropout Voltage vs. Output Current
2.5 V Version
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4
300
NCP4588
TYPICAL CHARACTERISTICS
1.55
VIN = 2.0 V
1.03
1.53
1.01
1.51
VOUT (V)
VOUT (V)
1.05
0.99
0.97
VIN = 2.5 V
1.49
1.47
0.95
−40
−20
0
20
40
60
TJ, JUNCTION TEMPERATURE (°C)
1.45
−40
80
Figure 9. Output Voltage vs. Temperature,
1.0 V Version
2.55
12
10
2.53
2.52
8
2.51
IGND (mA)
VOUT (V)
80
Figure 10. Output Voltage vs. Temperature,
1.5 V Version
VIN = 3.5 V
2.54
−20
0
20
40
60
TJ, JUNCTION TEMPERATURE (°C)
2.5
2.49
6
4
2.48
2.47
2
2.46
2.45
−40
−20
0
20
40
60
TJ, JUNCTION TEMPERATURE (°C)
0
80
0
1
2
3
VIN (V)
4
5
6
Figure 12. Supply Current vs. Input Voltage,
1.0 V Version
Figure 11. Output Voltage vs. Temperature,
2.5 V Version
16
12
14
10
12
IGND (mA)
IGND (mA)
8
6
4
10
8
6
4
2
0
2
0
1
2
3
VIN (V)
4
5
0
6
0
Figure 13. Supply Current vs. Input Voltage,
1.5 V Version
1
2
3
VIN (V)
4
5
Figure 14. Supply Current vs. Input Voltage,
2.5 V Version
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5
6
NCP4588
12
12
10
10
8
8
IGND (mA)
IGND (mA)
TYPICAL CHARACTERISTICS
6
4
4
2
2
0
−40
−20
0
20
40
60
0
−40
80
−20
0
20
40
60
80
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 15. Supply Current vs. Temperature,
1.0 V Version
Figure 16. Supply Current vs. Temperature,
1.5 V Version
12
100
90
10
80
70
PSRR (dB)
8
IGND (mA)
6
6
4
30 mA
60
10 mA
50
IOUT = 1 mA
40
30
20
2
10
0
−40
−20
0
20
40
60
0
0.01
80
1
10
100
1000
TJ, JUNCTION TEMPERATURE (°C)
FREQUENCY (kHz)
Figure 17. Supply Current vs. Temperature,
2.5 V Version
Figure 18. PSRR, 1.0 V Version, COUT = 100 nF
100
100
90
90
80
80
70
70
30 mA
60
50
10 mA
40
IOUT = 1 mA
PSRR (dB)
PSRR (dB)
0.1
60
50
30 mA
40
10 mA
30
30
IOUT = 1 mA
20
20
10
10
0
0.01
0.1
1
10
FREQUENCY (kHz)
100
0
1000
0.01
Figure 19. PSRR, 1.5 V Version, COUT = 100 nF
0.1
1
10
FREQUENCY (kHz)
100
1000
Figure 20. PSRR, 2.5 V Version, COUT = 100 nF
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NCP4588
TYPICAL CHARACTERISTICS
100
100
90
90
80
80
70
10 mA
IOUT = 1 mA
60
PSRR (dB)
PSRR (dB)
70
30 mA
50
40
40
30
20
20
10
10
0.1
1
10
100
IOUT = 1 mA
50
30
0
0.01
30 mA
60
10 mA
0
0.01
1000
0.1
1
10
100
1000
FREQUENCY (kHz)
FREQUENCY (kHz)
Figure 21. PSRR, 1.0 V Version, COUT = 0 mF
Figure 22. PSRR, 1.5 V Version, COUT = 0 mF
100
IOUT = 1 mA
90
80
PSRR (dB)
70
30 mA
60
50
10 mA
40
30
20
10
0
0.01
0.1
1
10
100
1000
FREQUENCY (kHz)
Figure 23. PSRR, 2.5 V Version, COUT = 0 mF
4.0
12
3.5
10
VN (mVrms/√Hz)
VN (mVrms/√Hz)
3.0
2.5
2.0
1.5
8
6
4
1.0
2
0.5
0
0.01
0.1
1
10
FREQUENCY (kHz)
100
0
0.01
1000
Figure 24. Output Voltage Noise, 1.0 V Version
0.1
1
10
FREQUENCY (kHz)
100
1000
Figure 25. Output Voltage Noise, 1.5 V Version
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NCP4588
TYPICAL CHARACTERISTICS
4
9
3
8
2
7
VOUT (V)
5
4
1.03
1.02
1.01
3
1.00
2
0.99
1
0.98
0
0.01
0.1
1
10
100
1000
0
0.97
0
20
40
60
80
100 120 140 160 180 200
FREQUENCY (kHz)
t (ms)
Figure 26. Output Voltage Noise, 2.5 V Version
Figure 27. Line Transients, 1.0 V Version,
tR = tF = 5 ms, IOUT = 30 mA, COUT = 0 nF
4
3
1.04
1
1.03
0
1.02
1.01
VIN (V)
VOUT (V)
2
1.00
0.99
0.98
0.97
0
20
40
60
80
100 120 140 160 180 200
t (ms)
Figure 28. Line Transients, 1.0 V Version,
tR = tF = 5 ms, IOUT = 30 mA, COUT = 100 nF
5
4
3
1
1.52
0
1.51
1.50
1.49
1.48
1.47
0
20
40
60
80
100 120 140 160 180 200
t (ms)
Figure 29. Line Transients, 1.5 V Version,
tR = tF = 5 ms, IOUT = 30 mA, COUT = 0 nF
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VIN (V)
2
1.53
VIN (V)
1
6
VOUT (V)
VN (mVrms/√Hz)
10
NCP4588
TYPICAL CHARACTERISTICS
5
4
3
1
1.52
0
VOUT (V)
1.53
1.51
VIN (V)
2
1.50
1.49
1.48
1.47
0
20
40
60
80
100 120 140 160 180 200
t (ms)
Figure 30. Line Transients, 2.5 V Version,
tR = tF = 5 ms, IOUT = 30 mA, COUT = 100 nF
6
5
4
2
2.53
1
VOUT (V)
2.54
2.52
VIN (V)
3
2.51
2.50
2.49
2.48
0
20
40
60
80
100 120 140 160 180 200
t (ms)
Figure 31. Line Transients, 2.5 V Version,
tR = tF = 5 ms, IOUT = 30 mA, COUT = 0 nF
6
5
4
2
2.53
1
VOUT (V)
2.54
2.52
2.51
2.50
2.49
2.48
0
20
40
60
80
100 120 140 160 180 200
t (ms)
Figure 32. Line Transients, 2.5 V Version,
tR = tF = 5 ms, IOUT = 30 mA, COUT = 100 nF
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VIN (V)
3
NCP4588
TYPICAL CHARACTERISTICS
200
150
100
0
1.10
1.05
IOUT (mA)
VOUT (V)
50
1.00
0.95
0.90
0.85
0
20
40
60
80
100 120 140 160 180 200
t (ms)
Figure 33. Load Transients, 1.0 V Version,
tR = tF = 0.5 ms, VIN = 2.0 V
200
150
100
0
1.60
1.55
IOUT (mA)
VOUT (V)
50
1.50
1.45
1.40
1.35
0
20
40
60
80
100 120 140 160 180 200
t (ms)
Figure 34 - Load Transients, 1.5 V Version,
tR = tF = 0.5 ms, VIN = 1.5 V
200
150
100
0
2.60
2.55
2.50
2.45
2.40
2.35
0
20
40
60
80
100 120 140 160 180 200
t (ms)
Figure 35. Load Transients, 2.5 V Version,
tR = tF = 0.5 ms, VIN = 3.5 V
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IOUT (mA)
VOUT (V)
50
NCP4588
TYPICAL CHARACTERISTICS
200
150
100
0
1.90
1.60
IOUT (mA)
VOUT (V)
50
1.30
1.00
0.70
0.40
0
50
100 150 200 250 300 350 400 450 500
t (ms)
Figure 36. Load Transients, 1.0 V Version,
tR = tF = 0.5 ms, VIN = 2.0 V
200
150
100
0
2.40
2.10
IOUT (mA)
VOUT (V)
50
1.80
1.50
1.20
0.90
0
50
100 150 200 250 300 350 400 450 500
t (ms)
Figure 37. Load Transients, 1.5 V Version,
tR = tF = 0.5 ms, VIN = 2.5 V
200
150
100
0
3.40
3.10
2.80
2.50
2.20
1.90
0
50
100 150 200 250 300 350 400 450 500
t (ms)
Figure 38. Load Transients, 2.5 V Version,
tR = tF = 0.5 ms, VIN = 3.5 V
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IOUT (mA)
VOUT (V)
50
NCP4588
TYPICAL CHARACTERISTICS
4
Chip Enable
3
2
0
2.0
1.5
1.0
IOUT = 1 mA
0.5
IOUT = 200 mA
0.0
−0.5
VCE (V)
VOUT (V)
1
0
20
40
60
80
100 120 140 160 180 200
t (ms)
Figure 39. Start−up, 1.0 V Version, VIN = 2.0 V
5
4
Chip Enable
3
1
2.0
0
1.0
1.0
IOUT = 1 mA
0.5
VCE (V)
VOUT (V)
2
IOUT = 200 mA
0.0
−0.5
0
20
40
60
80
100 120 140 160 180 200
t (ms)
Figure 40. Start−up, 1.5 V Version, VIN = 2.5 V
5
Chip Enable
4
3
1
4
0
3
2
IOUT = 1 mA
1
IOUT = 200 mA
0
−1
0
20
40
60
80
100 120 140 160 180 200
t (ms)
Figure 41. Start−up, 2.5 V Version, VIN = 3.5 V
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VCE (V)
VOUT (V)
2
NCP4588
TYPICAL CHARACTERISTICS
4
3
2
VOUT (V)
0
2.0
IOUT = 200 mA
1.5
1.0
IOUT = 30 mA
0.5
IOUT = 1 mA
VCE (V)
1
Chip Enable
0.0
−0.5
0
5
10
15
20
25 30
t (ms)
35
40
45
50
Figure 42. Shutdown, 1.0 V Version D,
VIN = 2.0 V
5
4
3
1
Chip Enable
2.0
IOUT = 200 mA
1.5
VCE (V)
VOUT (V)
2
IOUT = 30 mA
1.0
IOUT = 1 mA
0.5
0.0
−0.5
0
5
10
15
20
25 30
t (ms)
35
40
45
50
Figure 43. Shutdown, 1.5 V Version D,
VIN = 2.5 V
5
4
3
1
Chip Enable
4
IOUT = 200 mA
IOUT = 30 mA
3
2
1
IOUT = 1 mA
0
−1
0
5
10
15
20
25
30
35
40
45
t (ms)
Figure 44. Shutdown, 2.5 V Version D,
VIN = 3.5 V
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50
VCE (V)
VOUT (V)
2
NCP4588
APPLICATION INFORMATION
A typical application circuit for NCP4588 series is shown
in Figure 45.
NCP4588x
VIN
VIN
C1
100 n
voltage is above logic high level. The enable pin has internal
pull down current source. If enable function is not needed
connect CE pin to VIN.
VOUT
Output Discharger
VOUT
The D version includes a transistor between VOUT and
GND that is used for faster discharging of the output
capacitor. This function is activated when the IC goes into
disable mode.
C2
100n*
CE
GND
* output capacitor
may be omitted
Thermal
A 100 nF ceramic input decoupling capacitor should be
connected as close as possible to the input and ground pin of
the NCP4588. Higher values and lower ESR improves line
transient response.
As power across the IC increases, it might become
necessary to provide some thermal relief. The maximum
power dissipation supported by the device is dependent
upon board design and layout. Mounting pad configuration
on the PCB, the board material, and also the ambient
temperature affect the rate of temperature rise for the part.
That is to say, when the device has good thermal
conductivity through the PCB, the junction temperature will
be relatively low with high power dissipation applications.
Output Decoupling Capacitor (C2)
PCB layout
Figure 45. Typical Application Schematic
Input Decoupling Capacitor (C1)
The output capacitor may be not used even if the load
current is varied, but if load variation is very large it is better
to use an output capacitor in the range of 0.1 mF to 10 mF. It
is recommended to use ceramic capacitor; tantalum
capacitor with higher ESR may cause unstable output.
Make VIN and GND line sufficient. If their impedance is
high, noise pickup or unstable operation may result. Connect
capacitors C1 and C2 (if it is used) as close as possible to the
IC, and make wiring as short as possible.
Enable Operation
The enable pin CE may be used for turning the regulator
on and off. The regulator is switched on when the CE pin
ORDERING INFORMATION
Nominal Output
Voltage
Description
Marking
Package
Shipping†
NCP4588DSQ10T1G
1.0 V
Auto discharge
P010
SC−70
(Pb−Free)
3000 / Tape & Reel
NCP4588DSQ15T1G
1.5 V
Auto discharge
P015
SC−70
(Pb−Free)
3000 / Tape & Reel
NCP4588DSQ25T1G
2.5 V
Auto discharge
P025
SC−70
(Pb−Free)
3000 / Tape & Reel
NCP4588DMX10TCG
1.0 V
Auto discharge
LA
XDFN
(Pb−Free)
5000 / Tape & Reel
NCP4588DMX15TCG
1.5 V
Auto discharge
LF
XDFN
(Pb−Free)
5000 / Tape & Reel
NCP4588DMX25TCG
2.5 V
Auto discharge
LR
XDFN
(Pb−Free)
5000 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
NOTE: To order other package and voltage variants, please contact your ON Semiconductor sales representative.
http://onsemi.com
14
NCP4588
PACKAGE DIMENSIONS
SC−88A (SC−70−5/SOT−353)
CASE 419A−02
ISSUE L
A
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD
419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
G
5
4
−B−
S
1
2
DIM
A
B
C
D
G
H
J
K
N
S
3
D 5 PL
0.2 (0.008)
B
M
M
N
INCHES
MIN
MAX
0.071
0.087
0.045
0.053
0.031
0.043
0.004
0.012
0.026 BSC
--0.004
0.004
0.010
0.004
0.012
0.008 REF
0.079
0.087
J
C
K
H
SOLDER FOOTPRINT
0.50
0.0197
0.65
0.025
0.65
0.025
0.40
0.0157
1.9
0.0748
http://onsemi.com
15
SCALE 20:1
mm Ǔ
ǒinches
MILLIMETERS
MIN
MAX
1.80
2.20
1.15
1.35
0.80
1.10
0.10
0.30
0.65 BSC
--0.10
0.10
0.25
0.10
0.30
0.20 REF
2.00
2.20
NCP4588
PACKAGE DIMENSIONS
XDFN6 1.2x1.2, 0.4P
CASE 711AA
ISSUE O
PIN ONE
REFERENCE
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.25mm FROM TERMINAL TIPS.
4. COPLANARITY APPLIES TO ALL OF THE
TERMINALS.
A
B
D
ÍÍÍ
ÍÍÍ
ÍÍÍ
E
DIM
A
A1
b
C
D
E
e
L
0.05 C
2X
2X
0.05 C
TOP VIEW
A
0.05 C
0.05 C
A1
SIDE VIEW
NOTE 4
C
MILLIMETERS
MIN
MAX
--0.40
0.00
0.05
0.13
0.23
0.20
0.30
1.20 BSC
1.20 BSC
0.40 BSC
0.37
0.48
RECOMMENDED
MOUNTING FOOTPRINT*
SEATING
PLANE
6X
6X
0.22
0.66
PACKAGE
OUTLINE
e
1
3
1.50
C
6X
L
0.40
PITCH
6
4
DIMENSIONS: MILLIMETERS
6X
0.05
BOTTOM VIEW
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
b
M
C A B
NOTE 3
http://onsemi.com
16
NCP4588
PACKAGE DIMENSIONS
SOT−23 5−LEAD
CASE 1212
ISSUE A
A
5
E
1
L1
A1
4
2
DIM
A
A1
A2
b
c
D
E
E1
e
L
L1
L
3
5X
e
A2
0.05 S
B
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSIONS: MILLIMETERS.
3. DATUM C IS THE SEATING PLANE.
A
E1
b
0.10
C
M
C B
S
A
S
C
MILLIMETERS
MIN
MAX
--1.45
0.00
0.10
1.00
1.30
0.30
0.50
0.10
0.25
2.70
3.10
2.50
3.10
1.50
1.80
0.95 BSC
0.20
--0.45
0.75
RECOMMENDED
SOLDERING FOOTPRINT*
3.30
5X
0.85
5X
0.95
PITCH
0.56
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
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any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
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PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
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17
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NCP4588/D
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