PD - 9.903A
IRLZ14S/L
HEXFET® Power MOSFET
l
l
l
l
l
Advanced Process Technology
Surface Mount (IRLZ14S)
Low-profile through-hole (IRLZ14L)
175°C Operating Temperature
Fast Switching
D
VDSS = 60V
RDS(on) = 0.20Ω
G
ID = 10A
S
Description
Third Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power MOSFETs
are well known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of
applications.
The D2 Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible onresistance in any existing surface mount package. The
D 2Pak is suitable for high current applications because of
its low internal connection resistance and can dissipate
up to 2.0W in a typical surface mount application.
The through-hole version (IRLZ14L) is available for lowprofile applications.
D 2 Pak
T O -2 6 2
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TA = 25°C
PD @TC = 25°C
VGS
EAS
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Max.
Units
10
7.2
40
3.7
43
0.29
± 10
68
4.5
-55 to + 175
A
W
W
W/°C
V
mJ
V/ns
°C
°C
300 (1.6mm from case )
Thermal Resistance
Parameter
RθJC
RθJA
Junction-to-Case
Junction-to-Ambient ( PCB Mounted,steady-state)**
Typ.
Max.
Units
–––
–––
3.5
40
°C/W
8/25/97
IRLZ14S/L
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
∆V(BR)DSS/∆TJ
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
60
–––
–––
–––
1.0
3.5
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
gfs
Gate Threshold Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
LS
Internal Source Inductance
–––
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
–––
–––
–––
V(BR)DSS
IGSS
Typ.
–––
0.07
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
9.3
110
17
26
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
0.2
VGS = 5.0V, ID = 6.0A
Ω
0.28
VGS = 4.0V, ID = 5.0A
2.0
V
VDS = VGS, ID = 250µA
–––
S
VDS = 25V, ID = 6.0A
25
VDS = 60V, VGS = 0V
µA
250
VDS = 48V, VGS = 0V, T J = 150°C
100
VGS = 10V
nA
-100
VGS = -10V
8.4
ID = 10A
3.5
nC VDS = 48V
6.0
VGS = 5.0V, See Fig. 6 and 13
–––
VDD = 30V
–––
ID = 10A
–––
RG = 12Ω
–––
RD = 2.8Ω, See Fig. 10
Between lead,
7.5
nH
–––
and center of die contact
400 –––
VGS = 0V
170 –––
pF
VDS = 25V
42 –––
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
IS
ISM
VSD
t rr
Q rr
t on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– –––
10
showing the
A
G
integral reverse
––– –––
40
p-n junction diode.
S
––– ––– 1.6
V
TJ = 25°C, IS = 10A, VGS = 0V
––– 93 130
ns
TJ = 25°C, IF = 10A
––– 340 650
nC
di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
VDD = 25V, starting TJ = 25°C, L = 790µH
RG = 25Ω, IAS = 10A. (See Figure 12)
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Uses IRLZ14 data and test conditions
ISD ≤ 10A, di/dt ≤ 90A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
** When mounted on 1" square PCB (FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
IRLZ14S/L
IRLZ14S/L
IRLZ14S/L
IRLZ14S/L
IRLZ14S/L
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
-
-
+
•
•
•
•
RG
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Driver Gate Drive
Period
P.W.
D=
+
-
VDD
P.W.
Period
VGS=10V
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
ISD
*
IRLZ14S/L
D2Pak Package Outline
10.54 ( .415)
10.29 ( .405)
1.40 (.055)
MAX.
-A-
1.32 (.052)
1.22 (.048)
2
1.78 (.070)
1.27 (.050)
1
10.16 (.400)
RE F .
-B -
4.69 (.185)
4.20 (.165)
6.47 (.255)
6.18 (.243)
3
15.49 (.610)
14.73 (.580)
2.79 (.110)
2.29 (.090)
2.61 (.103)
2.32 (.091)
5.28 (.208)
4.78 (.188)
3X
1.40 (.055)
1.14 (.045)
5.08 ( .200)
0.55 (.022)
0.46 (.018)
0.93 (.037)
3X
0.69 (.027)
0.25 (.010)
M
8.89 (.350)
RE F.
1.39 (.055)
1.14 (.045)
B A M
MINIMUM RECO MM ENDED F OO TP RINT
11.43 (.450)
NO TE S:
1 DIM ENS IO NS AF T ER S OLDE R DIP .
2 DIM ENS IO NING & TO LERA NCING PE R ANS I Y 14.5M, 1982.
3 CO NT RO LLING DIME NSIO N : INCH.
4 HE AT SINK & LEAD DIMEN SION S DO NO T INCLUDE BURRS.
LE AD ASS IG NM ENT S
1 - G AT E
2 - DRA IN
3 - S OU RC E
8.89 (.350)
17.78 (.700)
3.81 (.150)
2.08 (.082)
2X
Part Marking Information
D2Pak
IN TER NATION AL
REC TIFIER
L OGO
AS SEMBLY
LOT CODE
A
PART NU MBER
F53 0S
9246
9B
1M
DATE CODE
(YYW W )
YY = YEAR
W W = W EE K
2.54 (.100)
2X
IRLZ14S/L
Package Outline
TO-262 Outline
Part Marking Information
TO-262
IRLZ14S/L
Tape & Reel Information
D2Pak
TR R
1 .6 0 (.0 6 3 )
1 .5 0 (.0 5 9 )
4 .1 0 (.1 6 1)
3 .9 0 (.1 5 3)
F E E D D IR E C TIO N 1 .8 5 (.0 7 3 )
1 .6 5 (.0 6 5 )
1 .6 0 (.0 6 3)
1 .5 0 (.0 5 9)
11 .6 0 (. 45 7 )
11 .4 0 (. 44 9 )
0 .3 68 (.0 14 5 )
0 .3 42 (.0 13 5 )
15 .4 2 (.60 9 )
15 .2 2 (.60 1 )
2 4 .30 (.9 5 7)
2 3 .90 (.9 4 1)
TR L
1 0. 90 (.4 29 )
1 0. 70 (.4 21 )
1. 75 (.0 69 )
1. 25 (.0 49 )
4 .7 2 (.1 3 6)
4 .5 2 (.1 7 8)
1 6. 10 (.6 34 )
1 5. 90 (.6 26 )
FE E D D IR E C TIO N
1 3.5 0 (. 532 )
1 2.8 0 (. 504 )
2 7.4 0 (1 .079 )
2 3.9 0 (.9 41)
4
33 0.0 0
(14. 17 3)
M AX .
N O T ES :
1. C O M F O R M S T O EIA -418 .
2. C O N T R O LLIN G D IM EN SIO N : M ILLIM E T ER .
3. D IM E N S IO N M EA S U R E D @ H U B .
4. IN C LU D E S F L AN G E D IS T O R T IO N @ O U T E R ED G E.
6 0.0 0 (2 .36 2)
M IN .
26 .40 (1. 03 9)
24 .40 (.9 61 )
3
3 0.4 0 (1 .19 7)
MA X .
4
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
http://www.irf.com/
Data and specifications subject to change without notice.
8/97