TI1 LM158-N Low-power, dual-operational amplifier Datasheet

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LM158-N, LM258-N, LM2904-N, LM358-N
SNOSBT3I – JANUARY 2000 – REVISED DECEMBER 2014
LMx58-N Low-Power, Dual-Operational Amplifiers
1 Features
3 Description
•
The LM158 series consists of two independent, high
gain, internally frequency compensated operational
amplifiers which were designed specifically to operate
from a single power supply over a wide range of
voltages. Operation from split power supplies is also
possible and the low power supply current drain is
independent of the magnitude of the power supply
voltage.
1
•
•
•
•
•
•
•
•
•
•
•
Available in 8-Bump DSBGA Chip-Sized Package,
(See AN-1112, SNVA009)
Internally Frequency Compensated for Unity Gain
Large DC Voltage Gain: 100 dB
Wide Bandwidth (Unity Gain): 1 MHz
(Temperature Compensated)
Wide Power Supply Range:
– Single Supply: 3V to 32V
– Or Dual Supplies: ±1.5V to ±16V
Very Low Supply Current Drain (500
μA)—Essentially Independent of Supply Voltage
Low Input Offset Voltage: 2 mV
Input Common-Mode Voltage Range Includes
Ground
Differential Input Voltage Range Equal to the
Power Supply Voltage
Large Output Voltage Swing
Unique Characteristics:
– In the Linear Mode the Input Common-Mode
Voltage Range Includes Ground and the
Output Voltage Can Also Swing to Ground,
even though Operated from Only a Single
Power Supply Voltage.
– The Unity Gain Cross Frequency is
Temperature Compensated.
– The Input Bias Current is also Temperature
Compensated.
Advantages:
– Two Internally Compensated Op Amps
– Eliminates Need for Dual Supplies
– Allows Direct Sensing Near GND and VOUT
Also Goes to GND
– Compatible with All Forms of Logic
– Power Drain Suitable for Battery Operation
Application areas include transducer amplifiers, dc
gain blocks and all the conventional op-amp circuits
which now can be more easily implemented in single
power supply systems. For example, the LM158
series can be directly operated off of the standard
3.3-V power supply voltage which is used in digital
systems and will easily provide the required interface
electronics without requiring the additional ±15V
power supplies.
The LM358 and LM2904 are available in a chip sized
package (8-Bump DSBGA) using TI's DSBGA
package technology.
Device Information(1)
PART NUMBER
LM158-N
LM258-N
LM2904-N
LM358-N
PACKAGE
BODY SIZE (NOM)
TO-CAN (8)
9.08 mm x 9.09 mm
CDIP (8)
10.16 mm x 6.502 mm
TO-CAN (8)
9.08 mm x 9.09 mm
DSBGA (8)
1.31 mm x 1.31 mm
SOIC (8)
4.90 mm x 3.91 mm
PDIP (8)
9.81 mm x 6.35 mm
TO-CAN (8)
9.08 mm x 9.09 mm
DSBGA (8)
1.31 mm x 1.31 mm
SOIC (8)
4.90 mm x 3.91 mm
PDIP (8)
9.81 mm x 6.35 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Voltage Controlled Oscillator (VCO)
2 Applications
•
•
•
Active Filters
General Signal Conditioning and Amplification
4- to 20-mA Current Loop Transmitters
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM158-N, LM258-N, LM2904-N, LM358-N
SNOSBT3I – JANUARY 2000 – REVISED DECEMBER 2014
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Table of Contents
1
2
3
4
5
6
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
Absolute Maximum Ratings ...................................... 4
ESD Ratings ............................................................ 4
Recommended Operating Conditions....................... 5
Thermal Information .................................................. 5
Electrical Characteristics: LM158A, LM358A, LM158,
LM258 ........................................................................ 5
6.6 Electrical Characteristics: LM358, LM2904............... 7
6.7 Typical Characteristics .............................................. 9
7
Detailed Description ............................................ 12
7.1 Overview ................................................................. 12
7.2 Functional Block Diagram ....................................... 12
7.3 Feature Description................................................. 12
7.4 Device Functional Modes........................................ 13
8
Application and Implementation ........................ 14
8.1 Application Information............................................ 14
8.2 Typical Applications ................................................ 14
9 Power Supply Recommendations...................... 24
10 Layout................................................................... 24
10.1 Layout Guidelines ................................................. 24
10.2 Layout Example .................................................... 24
11 Device and Documentation Support ................. 25
11.1
11.2
11.3
11.4
Related Links ........................................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
25
25
25
25
12 Mechanical, Packaging, and Orderable
Information ........................................................... 25
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision H (March 2013) to Revision I
•
Page
Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional
Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1
Changes from Revision G (March 2013) to Revision H
•
2
Page
Changed layout of National Data Sheet to TI format ........................................................................................................... 25
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5 Pin Configuration and Functions
D, P, and NAB Package
8-Pin SOIC, PDIP, and CDIP
Top View
LMC Package
8-Pin TO-99
Top View
YPB Package
8-Pin DSBGA
Top View
Pin Functions
PIN
TYPE
DESCRIPTION
D/P/LMC
NO.
DSBGA NO.
NAME
1
A1
OUTA
O
Output , Channel A
2
B1
-INA
I
Inverting Input, Channel A
3
C1
+INA
I
Non-Inverting Input, Channel A
4
C2
GND / V-
P
Ground for Single supply configurations. negative supply for dual supply
configurations
5
C3
+INB
I
Output, Channel B
6
B3
-INB
I
Inverting Input, Channel B
7
A3
OUTB
O
Non-Inverting Input, Channel B
8
A2
V+
P
Positive Supply
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6 Specifications
6.1 Absolute Maximum Ratings
See
(1) (2) (3)
.
LM158, LM258,
LM358, LM158A,
LM258A, LM358A
MIN
MAX
Supply Voltage, V+
32
PDIP (P)
830
TO-99 (LMC)
550
SOIC (D)
530
DSBGA (YPB)
435
Output Short-Circuit to V+ ≤ 15 V and TA = 25°C
GND (One
Amplifier) (5)
(2)
(3)
(4)
(5)
(6)
26
V
26
V
830
mW
mW
530
mW
mW
50
50
125
mA
°C
PDIP Package (P): Soldering (10 seconds)
260
260
°C
SOIC Package (D)
Vapor Phase (60
seconds)
215
215
°C
Infrared (15 seconds)
220
220
°C
PDIP (P): (Soldering, 10 seconds)
260
260
°C
TO-99 (LMC): (Soldering, 10 seconds)
300
300
°C
150
°C
−65
Storage temperature, Tstg
(1)
V
Continuou
s
−55
Temperature
−0.3
26
Continuous
Input Current (VIN < −0.3V) (6)
UNIT
MAX
32
−0.3
Input Voltage
Lead Temperature
MIN
32
Differential Input Voltage
Power Dissipation (4)
LM2904
150
−65
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Recommended Operating Conditions indicate
conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the
test conditions, see the Electrical Characteristics.
Refer to RETS158AX for LM158A military specifications and to RETS158X for LM158 military specifications.
If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.
For operating at high temperatures, the LM358/LM358A, LM2904 must be derated based on a 125°C maximum junction temperature
and a thermal resistance of 120°C/W for PDIP, 182°C/W for TO-99, 189°C/W for SOIC package, and 230°C/W for DSBGA, which
applies for the device soldered in a printed circuit board, operating in a still air ambient. The LM258/LM258A and LM158/LM158A can be
derated based on a +150°C maximum junction temperature. The dissipation is the total of both amplifiers—use external resistors, where
possible, to allow the amplifier to saturate or to reduce the power which is dissipated in the integrated circuit.
Short circuits from the output to V+ can cause excessive heating and eventual destruction. When considering short circuits to ground,
the maximum output current is approximately 40 mA independent of the magnitude of V+. At values of supply voltage in excess of +15
V, continuous short-circuits can exceed the power dissipation ratings and cause eventual destruction. Destructive dissipation can result
from simultaneous shorts on all amplifiers.
This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of
the input PNP transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is
also lateral NPN parasitic transistor action on the IC chip. This transistor action can cause the output voltages of the op amps to go to
the V+voltage level (or to ground for a large overdrive) for the time duration that an input is driven negative. This is not destructive and
normal output states will re-establish when the input voltage, which was negative, again returns to a value greater than −0.3 V (at 25°C).
6.2 ESD Ratings
V(ESD)
(1)
4
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
VALUE
UNIT
±250
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
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6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
Supply Voltage (V+ - V-):LM158. LM258, LM358
3 (±1.5)
32 (±16)
Supply Voltage (V+ - V-):LM2904
3 (±1.5)
26 (±13)
V
Operating Temperature: LM158
-55
125
°C
Operating Temperature: LM258
-25
85
°C
0
70
°C
-40
85
°C
Operating Temperature: LM358
Operating Temperature: LM2904
UNIT
V
6.4 Thermal Information
THERMAL METRIC (1)
LM158-N,
LM258-N,
LM358-N
LM158-N
LMC
NAB
155
132
LM2904-N, LM358-N
UNIT
YPB
D
P
189
120
8 PINS
RθJA
(1)
Junction-to-ambient thermal resistance
230
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
6.5 Electrical Characteristics: LM158A, LM358A, LM158, LM258
V+ = +5.0 V, See (1), unless otherwise stated
PARAMETER
TEST CONDITIONS
Input Offset Voltage
See (2), TA = 25°C
Input Bias Current
IIN(+) or IIN(−), TA = 25°C,
LM158A
MIN
TYP
LM358A
MAX
MIN
TYP
LM158, LM258
MAX
MIN
TYP
MAX
UNIT
1
2
2
3
2
5
mV
20
50
45
100
45
150
nA
2
10
5
30
3
30
VCM = 0 V, (3)
Input Offset Current
IIN(+) − IIN(−), VCM = 0V, TA =
25°C
+
nA
(4)
Input Common-Mode
V = 30 V,
Voltage Range
(LM2904, V+ = 26V), TA =
25°C
Supply Current
Over Full Temperature
Range
V+−1.
5
0
V+−1.5
0
V+−1.5
0
V
RL = ∞ on All Op Amps
V+ = 30V (LM2904 V+ = 26V)
V+ = 5V
1
2
1
2
1
2
mA
0.5
1.2
0.5
1.2
0.5
1.2
mA
+
Large Signal Voltage Gain V = 15 V, TA = 25°C,
RL ≥ 2 kΩ, (For VO = 1 V to
11 V)
Common-Mode
TA = 25°C,
Rejection Ratio
VCM = 0 V to V+−1.5 V
Power Supply
V+ = 5 V to 30 V
Rejection Ratio
(LM2904, V+ = 5 V to 26 V),
TA = 25°C
(1)
(2)
(3)
(4)
50
100
25
100
50
100
V/mV
70
85
65
85
70
85
dB
65
100
65
100
65
100
dB
These specifications are limited to –55°C ≤ TA ≤ +125°C for the LM158/LM158A. With the LM258/LM258A, all temperature specifications
are limited to −25°C ≤ TA ≤ 85°C, the LM358/LM358A temperature specifications are limited to 0°C ≤ TA ≤ 70°C, and the LM2904
specifications are limited to –40°C ≤ TA ≤ 85°C.
VO ≃ 1.4 V, RS = 0 Ω with V+ from 5 V to 30 V; and over the full input common-mode range (0 V to V+ −1.5 V) at 25°C. For LM2904, V+
from 5 V to 26 V.
The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the
state of the output so no loading change exists on the input lines.
The input common-mode voltage of either input signal voltage should not be allowed to go negative by more than 0.3 V (at 25°C). The
upper end of the common-mode voltage range is V+ −1.5 V (at 25°C), but either or both inputs can go to 32 V without damage (26 V for
LM2904), independent of the magnitude of V+.
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Electrical Characteristics: LM158A, LM358A, LM158, LM258 (continued)
V+ = +5.0 V, See(1), unless otherwise stated
PARAMETER
TEST CONDITIONS
Power Supply
V+ = 5 V to 30 V
Rejection Ratio
(LM2904, V+ = 5 V to 26 V),
TA = 25°C
Amplifier-to-Amplifier
Coupling
f = 1 kHz to 20 kHz, TA =
25°C (Input Referred), See (5)
Output Current Source
VIN+ = 1 V,
VIN− = 0 V,
V+ = 15 V,
LM158A
MIN
TYP
65
100
LM358A
MAX
MIN
TYP
65
100
−120
LM158, LM258
MAX
TYP
65
100
dB
−120
dB
−120
MAX
UNIT
MIN
20
40
20
40
20
40
mA
10
20
10
20
10
20
mA
12
50
12
50
12
50
μA
VO = 2 V, TA = 25°C
Sink
VIN− = 1 V, VIN+ = 0 V
V+ = 15 V, TA = 25°C,
VO = 2 V
VIN− = 1 V,
VIN+ = 0 V
TA = 25°C, VO = 200 mV,
V+ = 15 V
Short Circuit to Ground
TA = 25°C, See (6), V+ = 15 V
Input Offset Voltage
See (2)
Input Offset Voltage Drift
RS = 0Ω
Input Offset Current
IIN(+) − IIN(−)
Input Offset Current Drift
40
60
40
60
4
7
15
RS = 0Ω
10
Input Bias Current
IIN(+) or IIN(−)
40
Input Common-Mode
Voltage Range
V+ = 30 V, See (4) (LM2904,
V+ = 26 V)
20
200
10
300
10
100
40
200
40
V+−2
V+−2
100
0
mA
mV
μV/°C
7
75
0
60
7
7
30
0
40
5
nA
pA/°C
300
nA
V+−2
V
+
Large Signal Voltage Gain V = +15 V
(VO = 1 V to 11 V)
25
15
25
V/mV
26
26
V
RL ≥ 2 kΩ
Output
VOH
Voltage
Swing
VOL
Output Current Source
V+ = +30 V
RL = 2
kΩ
26
(LM2904, V+ = 26 V)
RL =
10 kΩ
27
V+ = 5V, RL = 10 kΩ
VIN+ = +1 V, VIN− = 0 V,
V+ = 15 V, VO = 2 V
Sink
VIN− = +1 V, VIN+ = 0 V,
V+ = 15 V, VO = 2 V
(5)
(6)
6
28
5
27
20
28
5
27
20
28
5
V
20
mV
10
20
10
20
10
20
mA
10
15
5
8
5
8
mA
Due to proximity of external components, insure that coupling is not originating via stray capacitance between these external parts. This
typically can be detected as this type of capacitance increases at higher frequencies.
Short circuits from the output to V+ can cause excessive heating and eventual destruction. When considering short circuits to ground,
the maximum output current is approximately 40 mA independent of the magnitude of V+. At values of supply voltage in excess of +15
V, continuous short-circuits can exceed the power dissipation ratings and cause eventual destruction. Destructive dissipation can result
from simultaneous shorts on all amplifiers.
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6.6 Electrical Characteristics: LM358, LM2904
V+ = +5.0 V, See (1), unless otherwise stated
PARAMETER
TEST CONDITIONS
Input Offset Voltage
See (2) , TA = 25°C
Input Bias Current
IIN(+) or IIN(−), TA = 25°C,
VCM = 0 V, See (3)
Input Offset Current
IIN(+) − IIN(−), VCM = 0 V, TA = 25°C
Input Common-Mode
Voltage Range
V+ = 30 V, See (4)
(LM2904, V+ = 26 V), TA = 25°C
Supply Current
Over Full Temperature Range
LM358
MIN
TYP
LM2904
MAX
MIN
TYP
UNIT
MAX
2
7
2
7
mV
45
250
45
250
nA
50
5
50
nA
V −1.5
V
5
V+−1.
5
0
+
0
RL = ∞ on All Op Amps
V+ = 30 V (LM2904 V+ = 26 V)
V+ = 5 V
1
2
1
2
mA
0.5
1.2
0.5
1.2
mA
+
Large Signal Voltage
V = 15V, TA = 25°C,
Gain
RL ≥ 2 kΩ, (For VO = 1 V to 11 V)
Common-Mode
Rejection Ratio
TA = 25°C,
Power Supply
Rejection Ratio
V+ = 5 V to 30 V
Amplifier-to-Amplifier Coupling
f = 1 kHz to 20 kHz, TA = 25°C
(Input Referred), See (5)
Output Current
VIN+
VIN−
+
VCM = 0 V to V+−1.5 V
25
100
25
100
V/mV
65
85
50
70
dB
65
100
50
100
dB
−120
dB
(LM2904, V+ = 5 V to 26 V), TA = 25°C
Source
−120
= 1 V,
= 0 V,
V = 15 V,
20
40
20
40
mA
10
20
10
20
mA
12
50
12
50
μA
VO = 2 V, TA = 25°C
Sink
VIN− = 1 V, VIN+ = 0 V
V+ = 15V, TA = 25°C,
VO = 2 V
VIN− = 1 V,
VIN+ = 0 V
TA = 25°C, VO = 200 mV,
V+ = 15 V
Short Circuit to Ground
TA = 25°C, See (6), V+ = 15 V
40
(2)
Input Offset Voltage
See
Input Offset Voltage Drift
RS = 0 Ω
Input Offset Current
IIN(+) − IIN(−)
Input Offset Current Drift
RS = 0 Ω
10
Input Bias Current
IIN(+) or IIN(−)
40
(1)
(2)
(3)
(4)
(5)
(6)
60
40
9
60
mA
10
7
150
45
200
10
500
40
mV
μV/°C
7
nA
pA/°C
500
nA
These specifications are limited to –55°C ≤ TA ≤ +125°C for the LM158/LM158A. With the LM258/LM258A, all temperature specifications
are limited to −25°C ≤ TA ≤ 85°C, the LM358/LM358A temperature specifications are limited to 0°C ≤ TA ≤ 70°C, and the LM2904
specifications are limited to –40°C ≤ TA ≤ 85°C.
VO ≃ 1.4 V, RS = 0 Ω with V+ from 5 V to 30 V; and over the full input common-mode range (0 V to V+ −1.5 V) at 25°C. For LM2904, V+
from 5 V to 26 V.
The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the
state of the output so no loading change exists on the input lines.
The input common-mode voltage of either input signal voltage should not be allowed to go negative by more than 0.3 V (at 25°C). The
upper end of the common-mode voltage range is V+ −1.5 V (at 25°C), but either or both inputs can go to 32 V without damage (26 V for
LM2904), independent of the magnitude of V+.
Due to proximity of external components, insure that coupling is not originating via stray capacitance between these external parts. This
typically can be detected as this type of capacitance increases at higher frequencies.
Short circuits from the output to V+ can cause excessive heating and eventual destruction. When considering short circuits to ground,
the maximum output current is approximately 40 mA independent of the magnitude of V+. At values of supply voltage in excess of +15
V, continuous short-circuits can exceed the power dissipation ratings and cause eventual destruction. Destructive dissipation can result
from simultaneous shorts on all amplifiers.
Copyright © 2000–2014, Texas Instruments Incorporated
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Electrical Characteristics: LM358, LM2904 (continued)
V+ = +5.0 V, See(1), unless otherwise stated
PARAMETER
TEST CONDITIONS
Input Common-Mode
Voltage Range
V+ = 30 V, See (4) (LM2904, V+ = 26 V)
Large Signal Voltage Gain
V+ = +15 V
(VO = 1 V to 11 V)
LM358
MIN
TYP
0
LM2904
MAX
MIN
V+−2
0
TYP
MAX
V+ −2
UNIT
V
15
15
V/mV
RL = 2 kΩ
26
22
V
RL = 10 kΩ
27
RL ≥ 2 kΩ
Output
VOH
V+ = 30 V
+
Voltage
(LM2904, V = 26 V)
Swing
VOL
V+ = 5 V, RL = 10 kΩ
Output Current
Source
VIN+ = 1 V, VIN− = 0 V,
V+ = 15 V, VO = 2 V
Sink
VIN− = 1 V, VIN+ = 0 V,
V+ = 15 V, VO = 2 V
8
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28
5
23
20
24
5
V
100
mV
10
20
10
20
mA
5
8
5
8
mA
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6.7 Typical Characteristics
Figure 1. Input Voltage Range
Figure 2. Input Current
Figure 3. Supply Current
Figure 4. Voltage Gain
Figure 5. Open Loop Frequency Response
Figure 6. Common-Mode Rejection Ratio
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Typical Characteristics (continued)
10
Figure 7. Voltage Follower Pulse Response
Figure 8. Voltage Follower Pulse Response (Small Signal)
Figure 9. Large Signal Frequency Response
Figure 10. Output Characteristics Current Sourcing
Figure 11. Output Characteristics Current Sinking
Figure 12. Current Limiting
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Typical Characteristics (continued)
Figure 13. Input Current (LM2902 Only)
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Figure 14. Voltage Gain (LM2902 Only)
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7 Detailed Description
7.1 Overview
The LM158 series are operational amplifiers which can operate with only a single power supply voltage, have
true-differential inputs, and remain in the linear mode with an input common-mode voltage of 0 VDC. These
amplifiers operate over a wide range of power supply voltage with little change in performance characteristics. At
25°C amplifier operation is possible down to a minimum supply voltage of 2.3 VDC.
Large differential input voltages can be easily accommodated and, as input differential voltage protection diodes
are not needed, no large input currents result from large differential input voltages. The differential input voltage
may be larger than V+ without damaging the device. Protection should be provided to prevent the input voltages
from going negative more than −0.3 VDC (at 25°C). An input clamp diode with a resistor to the IC input terminal
can be used.
7.2 Functional Block Diagram
Figure 15. (Each Amplifier)
7.3 Feature Description
The amplifier's differential inputs consist of a non-inverting input (+IN) and an inverting input (–IN). The amplifer
amplifies only the difference in voltage between the two inpus, which is called the differential input voltage. The
output voltage of the op-amp Vout is given by Equation 1:
VOUT = AOL (IN+ - IN-)
where
•
AOL is the open-loop gain of the amplifier, typically around 100dB (100,000x, or 10uV per Volt).
(1)
To reduce the power supply current drain, the amplifiers have a class A output stage for small signal levels which
converts to class B in a large signal mode. This allows the amplifiers to both source and sink large output
currents. Therefore both NPN and PNP external current boost transistors can be used to extend the power
capability of the basic amplifiers. The output voltage needs to raise approximately 1 diode drop above ground to
bias the on-chip vertical PNP transistor for output current sinking applications.
For ac applications, where the load is capacitively coupled to the output of the amplifier, a resistor should be
used, from the output of the amplifier to ground to increase the class A bias current and prevent crossover
distortion. Where the load is directly coupled, as in dc applications, there is no crossover distortion.
Capacitive loads which are applied directly to the output of the amplifier reduce the loop stability margin. Values
of 50 pF can be accommodated using the worst-case non-inverting unity gain connection. Large closed loop
gains or resistive isolation should be used if larger load capacitance must be driven by the amplifier.
The bias network of the LM158 establishes a drain current which is independent of the magnitude of the power
supply voltage over the range of 3 VDC to 30 VDC.
Output short circuits either to ground or to the positive power supply should be of short time duration. Units can
be destroyed, not as a result of the short circuit current causing metal fusing, but rather due to the large increase
in IC chip power dissipation which will cause eventual failure due to excessive junction temperatures. Putting
direct short-circuits on more than one amplifier at a time will increase the total IC power dissipation to destructive
levels, if not properly protected with external dissipation limiting resistors in series with the output leads of the
amplifiers. The larger value of output source current which is available at 25°C provides a larger output current
capability at elevated temperatures (see Typical Characteristics) than a standard IC op amp.
12
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7.4 Device Functional Modes
Figure 16. Schematic Diagram
The circuits presented in the Typical Single-Supply Applications emphasize operation on only a single power
supply voltage. If complementary power supplies are available, all of the standard op-amp circuits can be used.
In general, introducing a pseudo-ground (a bias voltage reference of V+/2) will allow operation above and below
this value in single power supply systems. Many application circuits are shown which take advantage of the wide
input common-mode voltage range which includes ground. In most cases, input biasing is not required and input
voltages which range to ground can easily be accommodated.
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The LM158 family bring performance, economy, and ease-of-use to a wide variety of op-amp applications.
8.2 Typical Applications
8.2.1 Noninverting DC Gain
Figure 17 shows a high input impedance non-inverting circuit. This circuit gives a closed-loop gain equal to the
ratio of the sum of R1 and R2 to R1 and a closed-loop 3 dB bandwidth equal to the amplifier unity-gain frequency
divided by the closed-loop gain. This design has the benefit of a very high input impedance, which is equal to the
differential input impedance multiplied by loop gain. (Open loop gain/Closed loop gain.) In DC coupled
applications, input impedance is not as important as input current and its voltage drop across the source
resistance. Note that the amplifier output will go into saturation if the input is allowed to float. This may be
important if the amplifier must be switched from source to source.
*R not needed due to temperature independent IIN
Figure 17. Non-Inverting DC Gain (0-V Output)
8.2.1.1 Design Requirements
For this example application, the supply voltage is +5V, and 100x±5% of noninverting gain is necessary. Signal
input impedance is approx 10kΩ.
8.2.1.2 Detailed Design Procedure
Using the equation for a non-inverting amplifier configuration ; G = 1+ R2/R1, set R1 to 10kΩ, and R2 to 99x the
value of R1, which would be 990kΩ. Replacing the 990kΩ with a 1MΩ will result in a gain of 101, which is within
the desired gain tolerance.
The gain-frequency characteristic of the amplifier and its feedback network must be such that oscillation does not
occur. To meet this condition, the phase shift through amplifier and feedback network must never exceed 180°
for any frequency where the gain of the amplifier and its feedback network is greater than unity. In practical
applications, the phase shift should not approach 180° since this is the situation of conditional stability. Obviously
the most critical case occurs when the attenuation of the feedback network is zero.
14
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Typical Applications (continued)
8.2.1.3 Application Curve
Figure 18. Transfer Curve for Non-Inverting Configuration
8.2.2 System Examples
8.2.2.1 Typical Single-Supply Applications
(V+ = 5.0 VDC)
Where: VO = V1 + V2 − V3 − V4
VO = 0 VDC for VIN = 0 VDC
(V1 + V2) ≥ (V3 + V4) to keep VO > 0 VDC
AV = 10
Figure 19. DC Summing Amplifier
(VIN'S ≥ 0 VDC and VO ≥ 0 VDC)
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Figure 20. Power Amplifier
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Typical Applications (continued)
(V+ = 5.0 VDC)
fo = 1 kHz
Q = 50
Av = 100 (40 dB)
16
Figure 21. “BI-QUAD” RC Active Bandpass Filter
Figure 22. Lamp Driver
Figure 23. LED Driver
Figure 24. Driving TTL
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Typical Applications (continued)
(V+ = 5.0 VDC)
VO = VIN
Figure 25. Voltage Follower
Figure 26. Pulse Generator
Figure 27. Squarewave Oscillator
Figure 28. Pulse Generator
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Typical Applications (continued)
(V+ = 5.0 VDC)
HIGH ZIN
IO = 1 amp/volt VIN
LOW ZOUT
(Increase RE for IO small)
Figure 29. Low Drift Peak Detector
Figure 30. High Compliance Current Sink
*WIDE CONTROL VOLTAGE RANGE: 0 VDC ≤ VC ≤
2 (V+ −1.5V DC)
Figure 31. Comparator with Hysteresis
18
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Figure 32. Voltage Controlled Oscillator (VCO)
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Typical Applications (continued)
(V+ = 5.0 VDC)
fo = 1 kHz
Q=1
AV = 2
Figure 33. Ground Referencing a Differential Input
Signal
Figure 34. DC Coupled Low-Pass RC Active Filter
fo = 1 kHz
Q = 25
Figure 35. Bandpass Active Filter
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Figure 36. Photo Voltaic-Cell Amplifier
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Typical Applications (continued)
(V+ = 5.0 VDC)
Figure 37. Using Symmetrical Amplifiers to Reduce Input Current (General Concept)
Figure 38. Fixed Current Sources
20
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Typical Applications (continued)
(V+ = 5.0 VDC)
*(Increase R1 for IL small)
VL ≤ V+ −2V
Figure 39. Current Monitor
Figure 40. AC Coupled Inverting Amplifier
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Typical Applications (continued)
(V+ = 5.0 VDC)
Av = 11 (As Shown)
Figure 41. AC Coupled Non-Inverting Amplifier
Figure 42. High Input Z, DC Differential Amplifier
Figure 43. Bridge Current Amplifier
22
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Typical Applications (continued)
(V+ = 5.0 VDC)
Figure 44. High Input Z Adjustable-Gain DC Instrumentation Amplifier
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9 Power Supply Recommendations
For proper operation, the power supplies must be properly decoupled. For decoupling the supply pins it is
suggested that 10 nF capacitors be placed as close as possible to the op-amp power supply pins. For single
supply, place a capacitor between V+ and V−supply leads. For dual supplies, place one capacitor between
V+ and ground, and one capacitor between V- and ground.
Precautions should be taken to insure that the power supply for the integrated circuit never becomes
reversed in polarity or that the unit is not inadvertently installed backwards in a test socket as an unlimited
current surge through the resulting forward diode within the IC could cause fusing of the internal conductors
and result in a destroyed unit.
10 Layout
10.1 Layout Guidelines
For single-ended supply configurations, the V+ pin should be bypassed to ground with a low ESR capacitor. The
optimum placement is closest to the V+ pin. Care should be taken to minimize the loop area formed by the
bypass capacitor connection between V+ and ground. The ground pin should be connected to the PCB ground
plane at the pin of the device. The feedback components should be placed as close to the device as possible to
minimize stray parasitics.
For dual supply configurations, both the V+ pin and V- pin should be bypassed to ground with a low ESR
capacitor. The optimum placement is closest to the corresponding supply pin. Care should be taken to minimize
the loop area formed by the bypass capacitor connection between V+ or V- and ground. The feedback
components should be placed as close to the device as possible to minimize stray parasitics.
For both configurations, as ground plane underneath the device is recommended.
10.2 Layout Example
Figure 45. Layout Example
24
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11 Device and Documentation Support
11.1 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 1. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
LM158-N
Click here
Click here
Click here
Click here
Click here
LM258-N
Click here
Click here
Click here
Click here
Click here
LM2904-N
Click here
Click here
Click here
Click here
Click here
LM358-N
Click here
Click here
Click here
Click here
Click here
11.2 Trademarks
All trademarks are the property of their respective owners.
11.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 2000–2014, Texas Instruments Incorporated
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PACKAGE OPTION ADDENDUM
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PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LM158AH
ACTIVE
TO-99
LMC
8
500
TBD
Call TI
Call TI
-55 to 125
( LM158AH ~
LM158AH)
LM158AH/NOPB
ACTIVE
TO-99
LMC
8
500
Green (RoHS
& no Sb/Br)
Call TI
Level-1-NA-UNLIM
-55 to 125
( LM158AH ~
LM158AH)
LM158H
ACTIVE
TO-99
LMC
8
500
TBD
Call TI
Call TI
-55 to 125
( LM158H ~ LM158H)
LM158H/NOPB
ACTIVE
TO-99
LMC
8
500
Green (RoHS
& no Sb/Br)
Call TI
Level-1-NA-UNLIM
-55 to 125
( LM158H ~ LM158H)
LM158J
ACTIVE
CDIP
NAB
8
40
TBD
Call TI
Call TI
-55 to 125
LM158J
LM258H
ACTIVE
TO-99
LMC
8
500
TBD
Call TI
Call TI
-25 to 85
( LM258H ~ LM258H)
LM258H/NOPB
ACTIVE
TO-99
LMC
8
500
Green (RoHS
& no Sb/Br)
Call TI
Level-1-NA-UNLIM
-25 to 85
( LM258H ~ LM258H)
LM2904ITP/NOPB
ACTIVE
DSBGA
YPB
8
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 85
A
09
LM2904ITPX/NOPB
ACTIVE
DSBGA
YPB
8
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 85
A
09
LM2904M
NRND
SOIC
D
8
95
TBD
Call TI
Call TI
-40 to 85
LM
2904M
LM2904M/NOPB
ACTIVE
SOIC
D
8
95
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 85
LM
2904M
LM2904MX
NRND
SOIC
D
8
2500
TBD
Call TI
Call TI
-40 to 85
LM
2904M
LM2904MX/NOPB
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 85
LM
2904M
LM2904N/NOPB
ACTIVE
PDIP
P
8
40
Green (RoHS
& no Sb/Br)
CU SN
Level-1-NA-UNLIM
-40 to 85
LM
2904N
LM358AM
NRND
SOIC
D
8
95
TBD
Call TI
Call TI
0 to 70
LM
358AM
LM358AM/NOPB
ACTIVE
SOIC
D
8
95
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 70
LM
358AM
LM358AMX
NRND
SOIC
D
8
2500
TBD
Call TI
Call TI
0 to 70
LM
358AM
Addendum-Page 1
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PACKAGE OPTION ADDENDUM
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19-Mar-2015
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LM358AMX/NOPB
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 70
LM
358AM
LM358AN/NOPB
ACTIVE
PDIP
P
8
40
Green (RoHS
& no Sb/Br)
CU SN
Level-1-NA-UNLIM
0 to 70
LM
358AN
LM358H/NOPB
ACTIVE
TO-99
LMC
8
500
Green (RoHS
& no Sb/Br)
Call TI
Level-1-NA-UNLIM
0 to 70
( LM358H ~ LM358H)
LM358M
NRND
SOIC
D
8
95
TBD
Call TI
Call TI
0 to 70
LM
358M
LM358M/NOPB
ACTIVE
SOIC
D
8
95
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 70
LM
358M
LM358MX
NRND
SOIC
D
8
2500
TBD
Call TI
Call TI
0 to 70
LM
358M
LM358MX/NOPB
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 70
LM
358M
LM358N/NOPB
ACTIVE
PDIP
P
8
40
Green (RoHS
& no Sb/Br)
CU SN
Level-1-NA-UNLIM
0 to 70
LM
358N
LM358TP/NOPB
ACTIVE
DSBGA
YPB
8
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
0 to 70
A
07
LM358TPX/NOPB
ACTIVE
DSBGA
YPB
8
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
0 to 70
A
07
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
Addendum-Page 2
Samples
PACKAGE OPTION ADDENDUM
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19-Mar-2015
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
7-Oct-2014
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
LM2904ITP/NOPB
DSBGA
YPB
8
250
178.0
LM2904ITPX/NOPB
DSBGA
YPB
8
3000
LM2904MX
SOIC
D
8
2500
LM2904MX/NOPB
SOIC
D
8
LM358AMX
SOIC
D
LM358AMX/NOPB
SOIC
LM358MX
SOIC
LM358MX/NOPB
B0
(mm)
K0
(mm)
P1
(mm)
8.4
1.5
1.5
0.66
4.0
178.0
8.4
1.5
1.5
0.66
330.0
12.4
6.5
5.4
2.0
2500
330.0
12.4
6.5
5.4
8
2500
330.0
12.4
6.5
D
8
2500
330.0
12.4
D
8
2500
330.0
12.4
SOIC
D
8
2500
330.0
LM358TP/NOPB
DSBGA
YPB
8
250
LM358TPX/NOPB
DSBGA
YPB
8
3000
W
Pin1
(mm) Quadrant
8.0
Q1
4.0
8.0
Q1
8.0
12.0
Q1
2.0
8.0
12.0
Q1
5.4
2.0
8.0
12.0
Q1
6.5
5.4
2.0
8.0
12.0
Q1
6.5
5.4
2.0
8.0
12.0
Q1
12.4
6.5
5.4
2.0
8.0
12.0
Q1
178.0
8.4
1.5
1.5
0.66
4.0
8.0
Q1
178.0
8.4
1.5
1.5
0.66
4.0
8.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
7-Oct-2014
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM2904ITP/NOPB
DSBGA
YPB
8
250
210.0
185.0
35.0
LM2904ITPX/NOPB
DSBGA
YPB
8
3000
210.0
185.0
35.0
LM2904MX
SOIC
D
8
2500
367.0
367.0
35.0
LM2904MX/NOPB
SOIC
D
8
2500
367.0
367.0
35.0
LM358AMX
SOIC
D
8
2500
367.0
367.0
35.0
LM358AMX/NOPB
SOIC
D
8
2500
367.0
367.0
35.0
LM358MX
SOIC
D
8
2500
367.0
367.0
35.0
LM358MX/NOPB
SOIC
D
8
2500
367.0
367.0
35.0
LM358TP/NOPB
DSBGA
YPB
8
250
210.0
185.0
35.0
LM358TPX/NOPB
DSBGA
YPB
8
3000
210.0
185.0
35.0
Pack Materials-Page 2
MECHANICAL DATA
NAB0008A
J08A (Rev M)
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MECHANICAL DATA
YPB0008
D
0.5±0.045
E
TPA08XXX (Rev A)
D: Max = 1.337 mm, Min =1.276 mm
E: Max = 1.337 mm, Min =1.276 mm
4215100/A
NOTES:
A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994.
B. This drawing is subject to change without notice.
www.ti.com
12/12
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