ICST MK1418 Opl3, opl4 codec clock source Datasheet

MK1418/MK1420
OPL3, OPL4 + Codec Clock Source
Description
Features
The MK1418 and MK1420 are the ideal way to
generate clocks for new sound cards. The MK1420
provides clocks for Analog Devices’ AD1848,
Crystal Semiconductor’s CS4231, and Yamaha’s
OPL3L, OPL3LS, and OPL4. The MK1420 uses
either a 14.318 MHz crystal, or a 14.318 MHz bus
clock input to synthesize the clocks required to
drive the codec, and the 33.868 MHz required for
the FM or wavetable music synthesizer. The chips
are ideal for add-in sound cards and motherboards
with integrated sound. In an 8 pin SOIC, the
MK1420 can save component count, board space,
and cost over surface mount crystals, and increase
reliability by eliminating three or four mechanical
devices from the board.
• Packaged in 8 pin SOIC
• Input crystal or clock frequency of 14.318 MHz
• MK1418 is clock input only
• MK1420 output clock frequencies of 16.934MHz,
24.576 MHz, 33.868 MHz, and 14.318 MHz
• Advanced, low power CMOS process
• Lowest jitter in industry for best audio
performance
• Insensitive to input clock duty cycle
• 50% (typ) 14.318 MHz duty cycle with crystal
MicroClock offers many other parts with stereo
codec support. The MK1430 has 5 output clocks,
the MK1448 has 7, the MK1444 has eight
including DSP clocks, and the MK1450/1 offers
Pentium™ and SCSI support, plus the stereo
codec clocks.
Block Diagram
VDD GND
Additional Clocks or Features
If more than these four output clocks or features
such as power down are needed, MicroClock has
many other products in development. Consult
MicroClock for your specific needs.
Clock Synthesis
Circuitry
14.318 MHz
crystal or clock
X1
Crystal
Oscillator
X2
AC Coupling/Portable Applications
For applications in portable computers, it is possible
to drive the input clock with a 3.3V, 14.318MHz
clock by a.c. coupling using a 0.01µF capacitor
connected in series to the CLKIN pin. But the
operating VDD on pin 2 must be 5V±10%. This
technique is also effective if the input clock doesn’t
meet the VIH and VIL specifications on page 3.
Output
Buffer
16.934 MHz
Output
Buffer
24.576 MHz
Output
Buffer
33.868 MHz
(MK1420 only)
Output
Buffer
14.318 MHz
(MK1420 only)
1
Revision 013098
Printed 11/15/00
MicroClock Division of ICS•1271 Parkmoor Ave.•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax
MDS 1418/20 A
MK1418/MK1420
OPL3, OPL4 + Codec Clock Source
Suggested Layout
for MK1420
Pin Assignments
clock only
MK1418
ICLK
1
8
GND
VDD
2
7
VDD
GND
3
6
GND
16.9M
4
5
24.6M
14.318 MHz
crystal
V
Pin 1
8
2
7
14.3MHz out
33Ω (optional)
0.1µF
3
6
33.9MHz out
33Ω (optional)
G
MK1420
X1
1
8
X2
VDD
2
7
14.3M
GND
3
6
33.9M
16.9M
4
5
24.6M
4
33Ω (optional)
16.9MHz out
5
33Ω (optional)
24.6MHz out
Pin Descriptions for MK1420
Number
1
2
3
4
5
6
7
8
Name
X1
VDD
GND
16.9M
24.6M
33.9M
14.3M
X2
Type
I
P
P
O
O
O
O
O
Description
Crystal Connection. Connect to a 14.318 MHz crystal or clock.
Connect to +5V.
Connect to ground.
16.9344 MHz clock output for stereo codec.
24.576 MHz clock output for stereo codec.
33.868 MHz clock output for OPL4.
14.318 MHz clock buffered output for OPL3 or PCMCIA controller.
Crystal Connection to a 14.318 MHz crystal, or leave unconnected for clock input.
Key: I = Input, O = output, P = power supply connection
External Components/Crystal Selection
A minimum number of external components are required for proper oscillation. For a crystal input, one
22pF load capacitor should be connected to each of the X1 and X2 pins and ground, and a parallel
resonant 14.318 MHz, 16pF load, crystal is recommended. Values near these are acceptable, as is a series
resonant crystal, but either will result in frequencies which are slightly (up to 0.06%) different from the
ideal. For a clock input, connect to X1 and leave X2 unconnected. A decoupling capacitor of 0.1µF should
be connected between VDD and GND, and 33Ω terminating resistors may be used on the clock outputs.
These terminating resistors are unnecessary for clock traces less than 1” (25mm).
2
Revision 013098
Printed 11/15/00
MicroClock Division of ICS•1271 Parkmoor Ave.•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax
MDS 1418/20 A
MK1418/MK1420
OPL3, OPL4 + Codec Clock Source
Electrical Specifications
Parameter
Conditions
Minimum
Typical
Maximum
Units
7
VDD+.5V
VDD+.5V
70
260
150
V
V
V
°C
°C
°C
5.5
V
V
V
V
V
V
mA
pF
%
ABSOLUTE MAXIMUM RATINGS (note 1)
Supply Voltage, VDD
Inputs
Clock Outputs
Ambient Operating Temperature
Soldering Temperature
Storage temperature
Referenced to GND
Referenced to GND
Referenced to GND
-0.5
-0.5
0
Max of 20 seconds
-65
DC CHARACTERISTICS (at 5.0V unless otherwise noted)
Operating Voltage, VDD
Input High Voltage, VIH
Input Low Voltage, VIL
Output High Voltage, VOH
Output High Voltage, VOH
Output Low Voltage, VOL
Operating Supply Current, IDD
Input Capacitance
Actual Mean Frequency versus Target
4.5
3.5
IOH=-4mA
IOH=-25mA
IOL=25mA
No Load
2.5
2.5
1.5
VDD-0.4
2.4
0.4
18
7
Outputs
±0.2
AC CHARACTERISTICS
Input Clock or Crystal Frequency
Input Clock Duty Cycle, 14.318MHz
Output Clock Rise Time
Output Clock Fall Time
Output Clock Duty Cycle, 24.576MHz
Output Clock Duty Cycle, 16.9344 MHz
Output Clock Duty Cycle, 33.868MHz
Output Clock Duty Cycle, 14.318 MHz, Note 3
Absolute Clock Period Jitter, except 14.3
One Sigma Clock Period Jitter, except 14.3
14.31818
Time above 2.5V
0.8 to 2.0V
2.0 to 0.8V
Time above 1.5V
Time above 1.5V
Time above 1.5V
Time above 1.5V
Pins 4, 5, 6 only
Pins 4, 5, 6 only
20
40
45
45
45
-400
45
50
50
50
200
60
80
1.5
1.5
60
55
55
55
400
MHz
%
ns
ns
%
%
%
%
ps
ps
Notes:
1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged exposure
to levels above the operating limits but below the Absolute Maximums may affect device reliability.
2. Typical values are at 25°C.
3. If crystal is used as input with CL = 16pf. If a clock is used as input, the duty cycle of the 14.318MHz output will be the same as the
input clock.
3
Revision 013098
Printed 11/15/00
MicroClock Division of ICS•1271 Parkmoor Ave.•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax
MDS 1418/20 A
MK1418/MK1420
OPL3, OPL4 + Codec Clock Source
Package Outline and Package Dimensions
8 pin SOIC
E
H
Pin 1
h x 45°
D
Q
A
c
e
b
Symbol
A
b
D
E
H
e
h
Q
L
Inches
Min
Max
0.055 0.061
0.013 0.019
0.185 0.200
0.150 0.160
0.225 0.245
.050 BSC
0.015
0.004
0.01
0.016 0.035
Millimeters
Min
Max
1.397 1.5494
0.330
0.483
4.699
5.080
3.810
4.064
5.715
6.223
1.27 BSC
0.381
0.102
0.254
0.406
0.889
L
Ordering Information
Part/Order Number
MK1418S
MK1418STR
MK1420S
MK1420STR
Marking
MK1418S
MK1418S
MK1420S
MK1420S
Package
8 pin SOIC
Add tape and reel
8 pin SOIC
Add tape and reel
Temperature
0-70°C
0-70°C
0-70°C
0-70°C
While the information presented herein has been checked for both accuracy and reliability, MicroClock Incorporated assumes no responsibility for either its use or for the
infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in
normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements
are not recommended without additional processing by MicroClock. MicroClock reserves the right to change any circuitry or specifications without notice. MicroClock does not
authorize or warrant any MicroClock product for use in life support devices or critical medical instruments.
1201BO.7
4
Revision 013098
Printed 11/15/00
MicroClock Division of ICS•1271 Parkmoor Ave.•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax
MDS 1418/20 A
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