ICS840-125 Integrated Circuit Systems, Inc. 125MHZ, LVCMOS/LVTTL OSCILLATOR REPLACEMENT GENERAL DESCRIPTION FEATURES The ICS840-125 is a Gigabit Ethernet Oscillator Replacement and a member of the HiPerClockS™ HiPerClocks TM family of high perfor mance devices from ICS. The ICS840-125 uses a 25MHz crystal to synthesize 125MHz. The ICS840-125 has excellent jitter perfor mance. The ICS840-125 is packaged in a small 8-pin TSSOP, making it ideal for use in systems with limited board space. • One LVCMOS/LVTTL output, 15Ω output impedance ICS • Crystal oscillator interface designed for 25MHz, 18pF parallel resonant crystal • Output frequency: 125MHz • Random jitter: 3.7ps (typical) • Deterministic jitter: 0.1ps (typical) • 3.3V operating supply • 0°C to 70°C ambient operating temperature • Available in both standard and lead-free RoHS-compliant packages BLOCK DIAGRAM OE PIN ASSIGNMENT Pullup VDD XTAL_OUT XTAL_IN OE 25MHz XTAL_IN Clock Synthesizer 125MHz 1 2 3 4 8 7 6 5 nc Q VDDO GND ICS840-125 Q 8-Lead TSSOP 4.40mm x 3.0mm x 0.925mm package body G Package Top View XTAL_OUT ICS840-125 8-Lead SOIC 3.90mm x 4.92mm x 1.37mm body package M Package Top View 840AG-125 www.icst.com/products/hiperclocks.html 1 REV. A FEBRUARY 3, 2006 ICS840-125 Integrated Circuit Systems, Inc. 125MHZ, LVCMOS/LVTTL OSCILLATOR REPLACEMENT TABLE 1. PIN DESCRIPTIONS Number Name 1 VDD XTAL_OUT, XTAL_IN Power 4 OE Input 5 GND Power 6 VDDO Power 7 Q Output 8 nc Unused 2, 3 Type Description Input Pullup Power supply pin. Crystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the output. Output enable pin. When HIGH, Q output is enabled. When LOW, forces Q output to HiZ state. LVCMOS/LVTTL interface levels. Power supply ground. Output supply pin. Single-ended clock output. LVCMOS/LVTTL interface levels. 15Ω output impedance. No connect NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values. TABLE 2. PIN CHARACTERISTICS Symbol Parameter Test Conditions Minimum Typical Maximum Units CIN Input Capacitance 4 pF RPULLUP Input Pullup Resistor 51 kΩ ROUT Output Impedance 15 Ω TABLE 3. CONROL FUNCTION TABLE Control Inputs Output OE Q 840AG-125 0 Hi-Z 1 Active www.icst.com/products/hiperclocks.html 2 REV. A FEBRUARY 3, 2006 ICS840-125 Integrated Circuit Systems, Inc. 125MHZ, LVCMOS/LVTTL OSCILLATOR REPLACEMENT ABSOLUTE MAXIMUM RATINGS Supply Voltage, VDD 4.6V Inputs, VI -0.5V to VDD + 0.5 V Outputs, VO -0.5V to VDDO + 0.5V device. These ratings are stress specifications only. Functional operation of product at these conditions or any condi- Package Thermal Impedance, θJA 8 Lead TSSOP 101.7°C/W (0 mps) tions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maxi- 8 Lead SOIC 112.7°C/W (0 lfpm) Storage Temperature, TSTG -65°C to 150°C mum rating conditions for extended periods may affect product reliability. NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDO = 3.3V±0.3V, TA = 0°C TO 70°C Symbol Parameter VDD Power Supply Voltage VDDO Output Supply Voltage IDD Power Supply Current IDDO Output Supply Current Test Conditions Minimum Typical Maximum Units 3.0 3.3 3.6 V 3.0 3.3 3.6 V 96 mA 24 mA Maximum Units OE = VDD (output enabled) TABLE 4B. LVCMOS/LVTTL DC CHARACTERISTICS, VDD = VDDO = 3.3V±0.3V, TA = 0°C TO 70°C Symbol Parameter Test Conditions Minimum Typical VIH Input High Voltage 2 VDD + 0.3 V VIL Input Low Voltage -0.3 0.8 V IIH Input High Current VDD = VIN = 3.6V 5 µA IIL Input Low Current VDD = 3.6V, VIN = 0V VOH Output High Voltage; NOTE 1 -150 µA 2.6 V Output Low Voltage; NOTE 1 VOL NOTE 1: Outputs terminated with 50Ω to VDDO/2. See Parameter Measurement Information Section, "3.3V Output Load Test Circuit". 0.5 V Maximum Units TABLE 5. CRYSTAL CHARACTERISTICS Parameter Test Conditions Minimum Mode of Oscillation Typical Fundamental Frequency 25 MHz Shunt Capacitance 7 pF Drive Level 1 mW 840AG-125 www.icst.com/products/hiperclocks.html 3 REV. A FEBRUARY 3, 2006 ICS840-125 Integrated Circuit Systems, Inc. 125MHZ, LVCMOS/LVTTL OSCILLATOR REPLACEMENT TABLE 6. AC CHARACTERISTICS, VDD = VDDO = 3.3V±0.3V, TA = 0°C TO 70°C Symbol Parameter fOUT Output Frequency Test Conditions Minimum Typical Maximum 125 Units MHz tDJ Deterministic Jitter ; NOTE 1 0.1 ps tRJ Random Jitter ; NOTE 1 RMS of Total Distribution (σ); NOTE 1 Peak-to-Peak Jitter ; NOTE 1 3.7 ps 3.7 ps 30 ps tRMS tp-p tOSC Oscillation Star t Up Time t R / tF Output Rise/Fall Time Time at minimum operating voltage to be 0 s 20% to 80% 250 odc Output Duty Cycle 48 Outputs terminated with 50Ω to VDDO/2. See Parameter Measurement Information Section, "3.3V Output Load Test Circuit". NOTE 1: Measured using Wavecrest SIA-3000. 840AG-125 www.icst.com/products/hiperclocks.html 4 10 ms 900 ps 52 % REV. A FEBRUARY 3, 2006 ICS840-125 Integrated Circuit Systems, Inc. 125MHZ, LVCMOS/LVTTL OSCILLATOR REPLACEMENT PARAMETER MEASUREMENT INFORMATION 1.65V ± 0.15V V DDO SCOPE VDD, VDDO 2 Q t PW Qx LVCMOS t GND odc = PERIOD t PW x 100% t PERIOD -1.65V ± 0.15V 3.3V OUTPUT LOAD AC TEST CIRCUIT 80% Clock Outputs OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD 80% 20% 20% tR tF OUTPUT RISE/FALL TIME 840AG-125 www.icst.com/products/hiperclocks.html 5 REV. A FEBRUARY 3, 2006 ICS840-125 Integrated Circuit Systems, Inc. 125MHZ, LVCMOS/LVTTL OSCILLATOR REPLACEMENT APPLICATION INFORMATION CRYSTAL INPUT INTERFACE lel resonant crystal and were chosen to minimize the ppm error. The optimum C1 and C2 values can be slightly adjusted for different board layouts. The ICS840-125 has been characterized with 18pF parallel resonant crystals. The capacitor values, C1 and C2, shown in Figure 1 below were determined using a 25MHz, 18pF paral- XTAL_OUT C1 12p X1 18pF Parallel Cry stal XTAL_IN C2 12p Figure 1. CRYSTAL INPUt INTERFACE 840AG-125 www.icst.com/products/hiperclocks.html 6 REV. A FEBRUARY 3, 2006 ICS840-125 Integrated Circuit Systems, Inc. 125MHZ, LVCMOS/LVTTL OSCILLATOR REPLACEMENT RELIABILITY INFORMATION TABLE 7A. θJAVS. AIR FLOW TABLE FOR 8 LEAD TSSOP θJA by Velocity (Meters per Second) Multi-Layer PCB, JEDEC Standard Test Boards 0 1 2.5 101.7°C/W 90.5°C/W 89.8°C/W TABLE 7B. θJAVS. AIR FLOW TABLE 8 LEAD SOIC θJA by Velocity (Linear Feet per Minute) Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards 0 200 500 153.3°C/W 112.7°C/W 128.5°C/W 103.3°C/W 115.5°C/W 97.1°C/W NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs. TRANSISTOR COUNT The transistor count for ICS840-125 is: 2423 840AG-125 www.icst.com/products/hiperclocks.html 7 REV. A FEBRUARY 3, 2006 ICS840-125 Integrated Circuit Systems, Inc. PACKAGE OUTLINE - G SUFFIX 125MHZ, LVCMOS/LVTTL OSCILLATOR REPLACEMENT FOR 8 LEAD TSSOP PACKAGE OUTLINE - M SUFFIX FOR 8 LEAD SOIC TABLE 8A. PACKAGE DIMENSIONS SYMBOL Millimeters Minimum N A SYMBOL Maximum 8 Millimeters MINIMUM N -- 1.20 A MAXIMUM 8 1.35 1.75 A1 0.05 0.15 A1 0.10 0.25 A2 0.80 1.05 B 0.33 0.51 b 0.19 0.30 C 0.19 0.25 c 0.09 0.20 D 4.80 5.00 D 2.90 3.10 E 3.80 4.00 4.50 H 5.80 6.20 E E1 6.40 BASIC 4.30 e 840AG-125 TABLE 8B. PACKAGE DIMENSIONS e 0.65 BASIC 1.27 BASIC h 0.25 0.50 L 0.45 0.75 L 0.40 1.27 α 0° 8° α 0° 8° aaa -- 0.10 Reference Document: JEDEC Publication 95, MS-012 www.icst.com/products/hiperclocks.html 8 REV. A FEBRUARY 3, 2006 ICS840-125 Integrated Circuit Systems, Inc. 125MHZ, LVCMOS/LVTTL OSCILLATOR REPLACEMENT TABLE 9. ORDERING INFORMATION Part/Order Number Marking Package Shipping Packaging Temperature ICS840AG-125 AG125 8 lead TSSOP tube 0°C to 70°C ICS840AG-125T AG125 8 lead TSSOP 2500 tape & reel 0°C to 70°C ICS840AG-125LF TBD 8 lead "Lead-Free" TSSOP tube 0°C to 70°C ICS840AG-125LFT TBD 8 lead "Lead-Free" TSSOP 2500 tape & reel 0°C to 70°C ICS840AM-125 840AM125 8 lead SOIC tube 0°C to 70°C ICS840AM-125T 840AM125 8 lead SOIC 2500 tape & reel 0°C to 70°C ICS840AM-125LF TBD 8 lead "Lead-Free" SOIC tube 0°C to 70°C ICS840AM-125LFT TBD 8 lead "Lead-Free" SOIC 2500 tape & reel 0°C to 70°C NOTE: Par ts that are ordered with an "LF" suffix to the par t number are the Pb-Free configuration and are RoHS compliant. The aforementioned trademark, HiPerClockS is a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 840AG-125 www.icst.com/products/hiperclocks.html 9 REV. A FEBRUARY 3, 2006