Data Delay DDU4C-5200A2 5-tap, hcmos-interfaced fixed delay line (series ddu4c) Datasheet

DDU4C
data 3 
delay
devices, inc.
5-TAP, HCMOS-INTERFACED
FIXED DELAY LINE
(SERIES DDU4C)
FEATURES
•
•
•
•
•
•
PACKAGES
Five equally spaced outputs
Fits standard 8-pin DIP socket
Low profile
Auto-insertable
Input & outputs fully CMOS interfaced & buffered
2
10 T L fan-out capability
IN
1
T2
4
T4
6
GND
7
14
VCC
12
T1
10
T3
8
T5
DIP
DDU4C-xx Comm.
DDU4C-xxM Military
IN
N/C
N/C
T2
N/C
T4
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
VDD
N/C
T1
N/C
T3
N/C
T5
SMD
DDU4C-xxA2 Comm.
DDU4C-xxB2 Comm.
DDU4C-xxMC2 Military
FUNCTIONAL DESCRIPTION
PIN DESCRIPTIONS
The DDU4C-series device is a 5-tap digitally buffered delay line. The
signal input (IN) is reproduced at the outputs (T1-T5), shifted in time by an
amount determined by the device dash number (See Table). The total
delay of the line is measured from IN to T5. The nominal tap-to-tap delay
increment is given by one-fifth of the total delay.
IN
T1-T5
VDD
GND
SERIES SPECIFICATIONS
•
•
•
•
•
•
Signal Input
Tap Outputs
+5 Volts
Ground
DASH NUMBER SPECIFICATIONS
Minimum input pulse width: 20% of total delay
Output rise time: 8ns typical
Supply voltage: 5VDC ± 5%
Supply current: ICCL = 40µa typical
ICCH = 10ma typical
Operating temperature: 0° to 70° C
Temp. coefficient of total delay: 300 PPM/°C
Part
Number
DDU4C-5050
DDU4C-5060
DDU4C-5075
DDU4C-5100
DDU4C-5125
DDU4C-5150
DDU4C-5200
DDU4C-5250
DDU4C-5300
DDU4C-5400
DDU4C-5500
Total
Delay (ns)
50 ± 2.5
60 ± 3.0
75 ± 4.0
100 ± 5.0
125 ± 6.5
150 ± 7.5
200 ± 10.0
250 ± 12.5
300 ± 15.0
400 ± 20.0
500 ± 25.0
Delay Per
Tap (ns)
10.0 ± 3.0
12.0 ± 3.0
15.0 ± 3.0
20.0 ± 3.0
25.0 ± 3.0
30.0 ± 3.0
40.0 ± 4.0
50.0 ± 5.0
60.0 ± 6.0
80.0 ± 8.0
100.0 ± 10.0
NOTE: Any dash number between 5050 and 5500
not shown is also available.
20%
VDD IN
20%
T1
20%
T2
20%
T3
20%
T4
T5 GND
DDU4C Functional diagram
 1997 Data Delay Devices
Doc #97034
12/10/97
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
1
DDU4C
APPLICATION NOTES
Delay Devices if your application requires device
testing at a specific input condition.
HIGH FREQUENCY RESPONSE
The DDU4C tolerances are guaranteed for input
pulse widths and periods greater than those
specified in the test conditions. Although the
device will function properly for pulse widths as
small as 20% of the total delay and periods as
small as 40% of the total delay (for a symmetric
input), the delays may deviate from their values at
low frequency. However, for a given input
condition, the deviation will be repeatable from
pulse to pulse. Contact technical support at Data
POWER SUPPLY BYPASSING
The DDU4C relies on a stable power supply to
produce repeatable delays within the stated
tolerances. A 0.1uf capacitor from VDD to GND,
located as close as possible to the VDD pin, is
recommended. A wide VDD trace and a clean
ground plane should be used.
DEVICE SPECIFICATIONS
TABLE 1: ABSOLUTE MAXIMUM RATINGS
PARAMETER
DC Supply Voltage
Input Pin Voltage
Storage Temperature
Lead Temperature
SYMBOL
VDD
VIN
TSTRG
TLEAD
MIN
-0.3
-0.3
-55
MAX
7.0
VDD+0.3
150
300
UNITS
V
V
C
C
NOTES
10 sec
TABLE 2: DC ELECTRICAL CHARACTERISTICS
(0C to 70C, 4.75V to 5.25V)
PARAMETER
High Level Output Voltage
SYMBOL
VOH
Low Level Output Voltage
VOL
High Level Output Current
Low Level Output Current
High Level Input Voltage
Low Level Input Voltage
Input Current
IOH
IOL
VIH
VIL
IIH
Doc #97034
12/10/97
MIN
3.98
TYP
4.4
MAX
UNITS
V
0.15
0.26
V
-4.0
4.0
mA
mA
V
V
µA
3.15
1.35
0.10
NOTES
VDD = 5.0, IOH = MAX
VIH = MIN, VIL = MAX
VDD = 5.0, IOL = MAX
VIH = MIN, VIL = MAX
VDD = 5.0
DATA DELAY DEVICES, INC.
Tel: 973-773-2299
Fax: 973-773-9672
http://www.datadelay.com
2
DDU4C
PACKAGE DIMENSIONS
14
12
10
8
Lead Material:
Nickel-Iron alloy 42
TIN PLATE
14
12
4
6
8
.410
TYP.
1
1
10
4
6
7
7
.280
MAX.
.780 MAX.
.820 MAX.
.290
MAX.
.020 .320
TYP. MAX.
.130
±.030
.015 TYP.
.010±.002
.018
TYP.
.070 MAX.
.350
MAX.
.600±.010
.040
TYP.
14 13 12 11 10
9
.010 TYP.
1
2
3
.090
4
5
6
.040
TYP.
.020 TYP.
8
.430
TYP.
7
.300
MAX.
.050
TYP.
DDU4C-xxA2 (Commercial Gull-Wing)
.020 TYP.
9
2
.110
3
4
2
.090
3
4
5
6
.100
.600
.780±.020
6
7
.100
.600
.790 MAX.
.350
MAX.
.110
TYP.
.010±.002
8
.882
±.005
.710 .590
±.005 MAX.
1
5
DDU4C-xxB2 (Commercial J-Lead)
.040
TYP.
14 13 12 11 10
.320
TYP.
.270
TYP.
1
.100
.600
.790 MAX.
.050 TYP.
8
14 13 12 11 10 9
.270
TYP.
.300
TYP.
DDU4C-xxM (Military DIP)
DDU4C-xx (Commercial DIP)
.020 TYP.
.020 TYP.
.100
TYP.
.018 TYP.
.600 TYP.
.007
±.005
7
.320
MAX.
.050
±.010
DDU4C-xxMC2 (Military SMD)
Doc #97034
12/10/97
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
3
DDU4C
DELAY LINE AUTOMATED TESTING
TEST CONDITIONS
INPUT:
o
o
Ambient Temperature: 25 C ± 3 C
Supply Voltage (VDD): 5.0V ± 0.1V
Input Pulse:
High = 5.0V ± 0.1V
Low = 0.0V ± 0.1V
Source Impedance:
50Ω Max.
Rise/Fall Time:
5.0 ns Max. (measured
between 0.5V and 4.5V )
Pulse Width:
PWIN = 1.5 x Total Delay
Period:
PERIN = 10 x Total Delay
OUTPUT:
Load:
Cload:
Threshold:
1 FAST-TTL Gate
5pf ± 10%
2.5V (Rising & Falling)
NOTE: The above conditions are for test only and do not in any way restrict the operation of the device.
PRINTER
COMPUTER
SYSTEM
REF
PULSE
GENERATOR
OUT
IN
TRIG
DEVICE UNDER
TEST (DUT)
T1
IN
T2
TRIG
TIME INTERVAL
COUNTER
T3
T4
T5
Test Setup
PERIN
PWIN
TRISE
INPUT
SIGNAL
TFALL
VIH
4.5V
2.5V
0.5V
4.5V
2.5V
0.5V
TRISE
VIL
TFALL
VOH
OUTPUT
SIGNAL
2.5V
2.5V
VOL
Timing Diagram For Testing
Doc #97034
12/10/97
DATA DELAY DEVICES, INC.
Tel: 973-773-2299
Fax: 973-773-9672
http://www.datadelay.com
4
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