ams AS1100WL Serially interfaced, 8-digit led driver Datasheet

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D ata she et
A S11 00
S e r ia ll y In t er f a c ed , 8 -D ig i t L E D D r iv e r
2 Key Features
The device includes a BCD code-B decoder, a multiplex scan
circuitry, segment and display drivers, and a 64 Bit memory. The
memory is used to store the LED settings, so that continuous
reprogramming is not necessary.
10MHz Serial Interface
Individual LED Segment Control
Decode/No-Decode Digit Selection
20µA Low-Power Shutdown (Data Retained)
Extremely low Operating Current 0.5mA in open loop
Digital and Analog Brightness Control
Display Blanked on Power-Up
Drive Common-Cathode LED Display
Software Reset
Optional External clock
24-pin SOIC Package
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Every individual segment can be addressed and updated separately.
Only one external resistor is required to set the current through the
LED display. Brightness can be controlled either in an analog or
digital way. The user can choose the internal code-B decoder to
display numeric digits or to address each segment directly.
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The AS1100 is an LED driver for 7 segment numeric displays of up to
8 digits. The AS1100 can be programmed via a conventional 4 wire
serial interface.
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1 General Description
The AS1100 features an extremely low shutdown current of only
20µA and an operational current of less than 500µA. The number of
visible digits can be programmed as well. The AS1100 can be reset
by software and an external clock can be used. Several test modes
support easy debugging.
3 Applications
The AS1100 is an ideal solution for Bar-Graph Displays, Industrial
Controllers, Panel Meters, LED Matrix Displays and White Goods
such as washing machines and dishwasher.
The AS1100 is offered in a 24-pin SOIC package.
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Figure 1. AS1100 - Typical Application Diagram
+5V
19
VDD
18
ISET
1 DIN
µP I/O
12 LOAD
SCK
1 CLK
9 GND
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DIFG0-DIG3
8 Digits
AS1100
MOSI
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9.53k
SEG A-G
SEP DP
8 Segments
GND
4
8-Digit µP Display
Revision 1.37
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AS1100
Datasheet - P i n A s s i g n m e n t s
4 Pin Assignments
24 DOUT
DIG0 2
23 SEG D
DIG4 3
22 SEG DP
GND
4
DIG6
5
DIG2
21 SEG E
AS1100
20 SEG C
DIG3 7
19 VDD
18 ISET
DIG7 8
17 SEG G
9
16 SEG B
DIG5 10
15 SEG F
14 SEG A
13 CLK
GND
6
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DIG1 11
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1
DIN
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Figure 2. Pin Assignments (Top View)
LOAD 12
4.1 Pin Descriptions
Table 1. Pin Descriptions
Pin Number
1
Pin Name
DIN
2, 3, 5:8, 10, 11
DIG 0 : DIG 7
4, 9
GND
12
LOAD/CS
13
CLK
19
VDD
DOUT
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24
ISET
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18
SEGA:G, DP
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14:17, 20:23
Description
Data input. Data is programmed into the 16Bit shift register on the rising CLK edge
8 digit driver lines that sink the current from the common cathode of the display. In shutdown
mode the AS1100 switches the outputs to VDD.
Both GND pins must be connected.
Strobe input. With the rising edge of the LOAD signal the 16 bit of serial data is latched into
the register.
Clock input. The interface is capable to support clock frequencies up to 10MHz. The serial
data is clocked into the internal shift register with the rising edge of the CLK signal. On the
DOUT pin the data is applied with the falling edge of CLK.
Seven segment driver lines including the decimal point. When a segment is turned off the
output is connected to GND.
The current into ISET determines the peak current through the segments and therefore the
brightness.
Positive Supply Voltage (+5V)
Serial data output for cascading drivers. The output is valid after 16.5 clock cycles. The
output is never set to high impedance.
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Revision 1.37
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AS1100
Datasheet - A b s o l u t e M a x i m u m R a t i n g s
5 Absolute Maximum Ratings
Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only, and functional operation of
the device at these or any other conditions beyond those indicated in Electrical Characteristics on page 4 is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Table 2. Absolute Maximum Ratings
Max
Units
-0.3
7
V
-0.3
VDD + 0.3
(max 7V)
V
DIG 0:DIG 7 Sink Current
500
mA
SEG A : SEG G, SEG DP
100
mA
Latch-Up Immunity
±200
mA
Electrical Parameters
VDD to GND
All other pins to GND
Electrostatic Discharge
Norm: JEDEC 78
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Current
Notes
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Min
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Parameter
Digital outputs
500
V
All other pins
1000
V
941
mW
+150
ºC
Norm: MIL 883 E method 3015
Continuous Power Dissipation (TA = +85°C)
Wide SOIC
Derate 11.8mW/ºC
above +70ºC
Temperature Ranges and Storage Conditions
Storage Temperature Range
-55
Package Body Temperature (Wide SOIC)
Humidity
ºC
85
%
Non-condensing
3
Represents a max. floor life time of 168h
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Moisture Sensitive Level
5
+260
The reflow peak soldering temperature (body
temperature) specified is in accordance with IPC/
JEDEC J-STD-020 “Moisture/Reflow Sensitivity
Classification for Non-Hermetic Solid State Surface
Mount Devices”.
The lead finish for Pb-free leaded packages is
matte tin (100% Sn).
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Revision 1.37
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AS1100
Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
6 Electrical Characteristics
VDD = 5V, RSET = 9.53kΩ±1%, TA = TMIN to TMAX (unless otherwise specified). All limits are guaranteed. The parameters with min and max
values are guaranteed with production tests or SQC (Statistical Quality Control) methods.
Table 3. Electrical Characteristics
Parameter
Conditions
Min
TAMB
Operating Temperature Range
-40
VDD
Operating Supply Voltage
4.0
IDDSD
Shutdown Supply Current
All digital inputs at VDD or GND,
TA = +25ºC
Typ
5.0
20
Operating Supply Current
All segments and decimal point on,
ISEG = -40mA
fOSC
Display Scan Rate
8 digits scanned
Digit Drive Sink Current
IDIGIT
+85
ºC
5.5
V
50
µA
500
µA
330
500
800
mA
1300
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IDD
Units
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RSET = open circuit
Max
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Symbol
VOUT = 0.65V
320
TA = +25ºC, VOUT = (VDD -1V)
-30
Hz
mA
ISEG
Segment Drive Source Current
∆ISEG
Segment Drive Current Matching
IDIGIT
Digit Drive Source Current
Digit off, VDIGIT = (VDD -0.3V)
-2
mA
ISEG
Segment Drive Sink Current
Segment off, VSEG = 0.3V
5
mA
IIH, IIL
Input Current DIN, CLK, LOAD
VIN = 0V or VDD
-1
VIH
Logic High Input Voltage
VIL
Logic Low Input Voltage
VOH
Output High Voltage
DOUT, ISOURCE = -1mA
VOL
Output Low Voltage
DOUT, ISINK = 1.6mA
Hysteresis Voltage
DIN, CLK, LOAD
Logic Inputs
Timing Characteristics
-40
-45
3.0
1
3.5
0.8
VDD - 1
0.4
1
mA
%
µA
V
V
V
V
V
CLK Clock Period
100
ns
tCH
CLK Pulse Width High
50
ns
tCL
CLK Pulse Width Low
50
ns
CLK Rise to LOAD Rise Hold Time
0
ns
DIN Setup Time
25
ns
0
ns
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tCSH
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tCP
DIN Hold Time
tDO
Output Data Propagation Delay
tLDCK
LOAD Rising Edge to Next Clock
Rising Edge
50
ns
tCSW
Minimum LOAD Pulse High
50
ns
tDSPD
Data-to-Segment Delay
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tDH
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CLOAD = 50pF
25
2.25
Revision 1.37
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AS1100
Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s
7 Typical Operating Characteristics
50
50
45
45
40
40
30
25
20
15
10
35
30
25
20
15
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Figure 4. Segment Current vs. RSET
ISEGMENT (mA).
Segment Current (mA).
Figure 3. Segment Driver Capability,
VDD = 5V, Logic Level = High
10
5
5
0
0.5
1
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0
0
1.5
2
2.5
3
3.5
4
4.5
10
Voltage below VDD at output (V)
100
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RSET (kOhm)
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AS1100
Datasheet - D e t a i l e d D e s c r i p t i o n
8 Detailed Description
8.1 Serial-Addressing Modes
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Programming of the AS1100 is done via 4 wire serial interface. A programming sequence consists of 16-bit packages. The data is shifted into the
internal 16 Bit register with the rising edge of the CLK signal. With the rising edge of the LOAD signal the data is latched into a digital or control
register depending on the address. The LOAD signal must go to high after the 16th rising clock edge. The LOAD signal can also come later but
just before the next rising edge of CLK, otherwise data would be lost. The content of the internal shift register is applied 16.5 clock cycles later to
the DOUT pin. The data is clocked out at the falling edge of CLK. The Bits of the 16Bit-programming package are described in Table 5. The first
4 Bits D15-D12 are don’t care, D11-D8 contain the address and D7-D0 contain the data. The first bit is D15, the most significant bit (MSB). The
exact timing is given in Figure 5.
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Figure 5. Timing Diagram
tCSW
LOAD
tCS
tCH
tCL
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tCP
CLK
tLDCK
tDH
tDS
DIN
D14
D15
D1
D0
tDO
DOUT
Table 4. Serial Data Format (16bits)
D14
D13
X
X
X
D12
D11
X
D10
D9
Address
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D15
D8
D7
MSB
D6
D5
D4
Data
D3
D2
D1
D0
LSB
8.2 Digit and Control Registers
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The AS1100 incorporates 15 registers, which are listed in Table 5. The digit and control registers are selected via the 4Bit address word. The 8
digit registers are realized with a 64bit memory. Each digit can be controlled directly without rewriting the whole contents. The control registers
consist of decode mode, display intensity, number of scanned digits, shutdown, display test, and reset/external clock register.
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8.3 Shutdown Mode
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The AS1100 features a shutdown mode, where it consumes only 20µA current. The shutdown mode is entered via a write to register 0Ch. Then
all segment current sources are pulled to ground and all digit drivers are connected to VDD, so that nothing is displayed. All internal digit
registers keep the programmed values. The shutdown mode can either be used for power saving or for generating a flashing display by
repeatedly entering and leaving the shutdown mode. The AS1100 needs typically 250µs to exit the shutdown mode. During shutdown the
AS1100 is fully programmable. Only the display test function overrides the shutdown mode.
8.4 Initial Power-Up
After powering up the system all register are reset, so that the display is blank. The AS1100 starts the shutdown mode. All registers should be
programmed for normal operation. The default settings enable only scan of one digit, the internal decoder is disabled, data register and intensity
register are set to the minimum value.
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AS1100
Datasheet - D e t a i l e d D e s c r i p t i o n
8.5 Decode-Mode Register
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In the AS1100 a BCD decoder is included. Every digit can be selected via register 09h to be decoded. The BCD code consists of the numbers 09, E,H, L,P and -. In register 09h a logic high enables the decoder for the appropriate digit. In case that the decoder is bypassed (logic low) the
data Bits D7-D0 correspond to the segment lines of the AS1100. In Table 7 some possible settings for register 09h are shown. Bit D7, which
corresponds to the decimal point, is not affected by the settings of the decoder. Logic high means that the decimal point is displayed. In Table 8
the font of the Code B decoder is shown. In Table 9 the correspondence of the register to the appropriate segments of a 7 segment display is
shown (see Figure 6).
8.6 Intensity Control and Interdigit Blanking
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Brightness of the display can be controlled in an analog way by changing the external resistor (RSET). The current, which flows between VDD
and ISET, defines the current that flows through the LEDs. The LED current is 100 times the ISET current. The minimum value of RSET should
be 9.53kΩ, which corresponds to 40mA segment current. The brightness of the display can also be controlled digitally via register 0Ah. The
brightness can be programmed in 16 steps and is shown in Table 10. An internal pulse width modulator controls the intensity of the display.
8.7 Scan-Limit Register
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The scan limit register 0Bh selects the number of digits displayed. When all 8 digits are displayed the update frequency is typically 800Hz. If the
number of digits displayed is reduced, the update frequency is reduced as well. The frequency can be calculated using 8fOSC/N, where N is the
number of digits. Since the number of displayed digits influences the brightness, the resistor RSET should be adjusted accordingly. The Table 12
shows the maximum allowed current, when fewer than 4 digits are used. To avoid differences in brightness the scan limit register should not be
used to blank portions of the display (leading zeros).
Table 5. Register Address Map
No-Op
Digit 0
Digit 1
Digit 2
Digit 3
Digit 4
Digit 5
Digit 6
Digit 7
Decode Mode
Intensity
D15-D12
D11
D10
D9
D8
Hex
Code
X
0
0
0
0
0xX0
X
0
0
0
1
0xX1
X
0
0
1
0
0xX2
X
0
0
1
1
0xX3
X
0
1
0
0
0xX4
X
0
1
0
1
0xX5
X
0
1
1
0
0xX6
X
0
1
1
1
0xX7
0
0
0
0xX8
X
X
1
0
0
1
0xX9
X
1
0
1
0
0xXA
1
X
1
0
1
1
0xXB
Shutdown
X
1
1
0
0
0xXC
Not used
X
1
1
0
1
0xXD
Reset and ext. Clock
X
1
1
1
0
0xXE
Display Test
X
1
1
1
1
0xXF
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Scan Limit
Address
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Register
Table 6. Shutdown Register Format (address (hex) = 0xXC
Register Data
Mode
Address Code
(Hex)
D7
D6
D5
D4
D3
D2
D1
D0
Shutdown Mode
0xXC
X
X
X
X
X
X
X
0
Normal Operation
0xXC
X
X
X
X
X
X
X
1
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AS1100
Datasheet - D e t a i l e d D e s c r i p t i o n
Table 7. Decode-mode Register Examples (address (hex) = 0xX9
Register Data
Decode Mode
Hex Code
D6
D5
D4
D3
D2
D1
D0
No decode for digits 7–0
0
0
0
0
0
0
0
0
0x00
Code B decode for digit 0
No decode for digits 7–1
0
0
0
0
0
0
0
1
0x01
Code B decode for digits 3–0
No decode for digits 7– 4
0
0
0
0
1
1
1
1
Code B decode for digits 7–0
1
1
1
1
1
1
1
1
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D7
0x0F
0xFF
Table 8. Code B font
Register Data
D7*
D6-D4
D3
D2
D1
D0
X
0
0
0
0
DP*
A
B
C
1
1
1
D
E
F
G
1
1
1
0
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0
On Segments = 1
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7-Segment
Character
1
2
3
4
5
6
7
8
9
-E
H
L
P
0
0
0
1
0
1
1
0
0
0
0
X
0
0
1
0
1
1
0
1
1
0
1
X
0
0
1
1
1
1
1
1
0
0
1
X
0
1
0
0
0
1
1
0
0
1
1
X
0
1
0
1
1
0
1
1
0
1
1
X
0
1
1
0
1
0
1
1
1
1
1
X
0
1
1
1
1
1
1
0
0
0
0
X
1
0
0
0
1
1
1
1
1
1
1
X
1
0
0
1
1
1
1
1
0
1
1
X
1
0
1
0
0
0
0
0
0
0
1
X
1
0
1
1
1
0
0
1
1
1
1
X
1
1
0
0
0
1
1
0
1
1
1
X
1
1
0
1
0
0
0
1
1
1
0
X
1
1
1
0
1
1
0
0
1
1
1
X
1
1
1
1
0
0
0
0
0
0
0
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blank
X
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Note: The decimal point is set by bit D7 = 1
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Table 9. No-decode Mode Data Bits and Corresponding Segment Lines
D7
D6
D5
D4
D3
D2
D1
D0
DP
A
B
C
D
E
F
G
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Corresponding Segment Line
Register Data
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Revision 1.37
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AS1100
Datasheet - D e t a i l e d D e s c r i p t i o n
Figure 6. Standard 7-segment LED
A
F
B
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E
D
Table 10. Intensity Register Format (address (hex) = 0xXA)
1/32 (min on)
3/32
5/32
7/32
9/32
11/32
13/32
15/32
17/32
19/32
21/32
23/32
25/32
D5
D4
D3
D2
D1
D0
Hex Code
X
X
X
X
0
0
0
0
0xX0
X
X
X
X
0
0
0
1
0xX1
X
X
X
X
0
0
1
0
0xX2
X
X
X
X
0
0
1
1
0xX3
X
X
X
X
0
1
0
0
0xX4
X
X
X
X
0
1
0
1
0xX5
X
X
X
X
0
1
1
0
0xX6
X
X
X
X
0
1
1
1
0xX7
X
X
X
X
1
0
0
0
0xX8
X
X
X
X
1
0
0
1
0xX9
X
X
X
X
1
0
1
0
0xXA
X
X
X
X
1
0
1
1
0xXB
X
X
X
X
1
1
0
0
0xXC
X
X
X
X
1
1
0
1
0xXD
X
X
X
X
1
1
1
0
0xXE
X
X
X
X
1
1
1
1
0xXF
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31/32 (max on)
D6
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27/32
29/32
D7
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Duty Cycle
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DP
Table 11. Scan-limit Register Format (address (hex) = 0xXB)
Decode Mode
Register Data
Hex Code
D6
D5
D4
D3
D2
D1
D0
Display digit 0 only
X
X
X
X
X
0
0
0
0xX0
Display digit 0 & 1
X
X
X
X
X
0
0
1
0xX1
Display digit 0 1 2
X
X
X
X
X
0
1
0
0xX2
Display digit 0 1 2 3
X
X
X
X
X
0
1
1
0xX3
Display digit 0 1 2 3 4
X
X
X
X
X
1
0
0
0xX4
Display digit 0 1 2 3 4 5
X
X
X
X
X
1
0
1
0xX5
Display digit 0 1 2 3 4 5 6
X
X
X
X
X
1
1
0
0xX6
Display digit 0 1 2 3 4 5 6 7
X
X
X
X
X
1
1
1
0xX7
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D7
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Revision 1.37
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AS1100
Datasheet - D e t a i l e d D e s c r i p t i o n
8.8 Display Test Register
With the display test register 0Fh all LED can be tested. In the test mode all LEDs are switched on at maximum brightness (duty cycle 31/32). All
programming of digit and control registers are maintained. The format of the register is given in Table 13.
Table 12. Maximum Segment Current for 1-, 2-, or 3-digit Displays
Maximum Segment Current (mA)
1
10
2
20
3
30
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Number of digits Displayed
Table 13. Display-test Register Format (address (hex) = 0xXF)
D6
D5
D4
D3
Normal Operation
X
X
X
X
X
Display Test Mode
X
X
X
X
X
D2
D1
D0
X
X
0
X
X
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Register Data
Mode
Note: The AS1100 remains in display-test mode until the display-test register is reconfigured for normal operation.
8.9 No-Op Register (Cascading of AS1100)
The no-operation register 00h is used when AS1100s are cascaded in order to support more than 8 digit displays. The cascading must be done
in a way that all DOUT are connected to DINof the following AS1100. The LOAD and CLK signals are connected to all devices. For a write
operation for example to the fifth device the command must be followed by four no-operation commands. When the LOAD signal finally goes to
high all shift registers are latched. The first four devices have got no-operation commands and only the fifth device sees the intended command
and updates its register.
8.10 Reset and External Clock Register
This register is addressed via the serial interface. It allows to switch the device to external clock mode (If D0=1 the CLK pin of the serial interface
operates as system clock input.) and to apply an external reset (D1). This brings all registers (except reg. E) to default state. For standard
operation the register contents should be "00h".
Table 14. Reset and External Clock Register (address (hex) = oxXE)
Address
Mode
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code (Hex)
Register Data
D7
D6
D5
D4
D3
D2
D1
D0
0xXE
X
X
X
X
X
X
0
0
Normal Operation,
external clock
0xXE
X
X
X
X
X
X
0
1
Reset state,
internal clock
0xXE
X
X
X
X
X
X
1
0
0xXE
X
X
X
X
X
X
1
1
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Normal Operation,
internal clock
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Reset state,
external clock
www.austriamicrosystems.com/LED-Driver-ICs/AS1100
Revision 1.37
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AS1100
Datasheet - A p p l i c a t i o n I n f o r m a t i o n
9 Application Information
9.1 Supply Bypassing and Wiring
In order to achieve optimal performance the AS1100 shall be placed very close to the LED display to minimize effects of electromagnetic
interference and wiring inductance. Furthermore, it is recommended to connect a 10µF electrolytic and a 0.1µF ceramic capacitor between VDD
and GND to avoid power supply ripple. Also, both GNDs must be connected to ground.
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9.2 Selecting RSET Resistor and Using External Drivers
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The current through the segments is controlled via the external resistor RSET. Segment current is about 100 times the current in ISET. The right
values for ISET are given in Table 15. The maximum current the AS1100 can drive is 40mA. If higher currents are needed, external drivers must
be used. In that case it is no longer necessary that the AS1100 drives high currents. A recommended value for RSET is 47kΩ. In cases that the
AS1100 only drives few digits, Table 12 specifies the maximum currents and RSET must be set accordingly. Refer to absolute maximum ratings
to calculate acceptable limits for ambient temperature, segment current, and the LED forward-voltage drop.
Table 15. RSET vs. Segment Current and LED Forward Voltage
VLED(V)
ISEG (mA)
2.0
2.5
3.0
3.5
12.2kΩ
11.8kΩ
11.0kΩ
10.6kΩ
9.69kΩ
17.8kΩ
17.1kΩ
15.8kΩ
15.0kΩ
14.0kΩ
29.8kΩ
28.0kΩ
25.9kΩ
24.5kΩ
22.6kΩ
66.7kΩ
63.7kΩ
59.3kΩ
55.4kΩ
51.2kΩ
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1.5
40
30
20
10
9.3 8x8 LED Dot Matrix Driver
The example in Figure 7 uses the AS1100 to drive an 8x8 LED dot matrix. The LED columns have common cathode and are connected to the
DIG0-7 outputs. The rows are connected to the segment drivers. Each of the 64 LEDs can be addressed separately. The columns are selected
via the digits as shown in Table 5. The decode mode register (0xX9) has to be programmed to ‘00000000’ as stated in Table 4. The single LEDs
in a column can be addressed as stated in Table 9, where D0 corresponds to segment G and D7 corresponds to segment DP.
Note: For a multiple-digit dot matrix, multiple AS1100 devices must be cascaded.
Figure 7. Application Example as LED Dot Matrix Driver
SEG G
SEG F
SEG G
SEG F
SEG D
SEG E
SEG C
SEG D
SEG B
SEG C
SEG A
SEG B
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SEG E
SEG DP
SEG A
SEG DP
DIG 7
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DIG 0
µP
1
12
13
9
DIG 7
DIG 0
SEG A:G
SEG DP
DIG0:7
DOUT
VDD
24
SEG A:G
SEG DP
19
DIG0:7
DIN
LOAD
AS1100
9.53kΩ
1
12
CLK
GND
ISET
18
13
9
GND
4
VDD
19
DIN
LOAD
AS1100
9.53kΩ
CLK
GND
ISET
18
GND
4
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Revision 1.37
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AS1100
Datasheet - A p p l i c a t i o n I n f o r m a t i o n
9.4 Calculating the Power Dissipation
The upper limit for power dissipation (PD) for the AS1100 is determined from the following equation:
PD = (VDD x 0.5mA) + (VDD - VLED)(DUTY x ISEG x N)
(EQ 1)
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Where:
VDD = supply voltage
DUTY = duty cycle set by intensity register
N = number of segments driven (worst case is 8)
VLED = LED forward voltage
ISEG = segment current set by RSET
Dissipation Example:
ISEG = 40mA, N = 8, DUTY = 31/32, VLED = 1.8V at 40mA, VDD = 5.25V
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PD = 5.25V(0.5mA) + (5.25V - 1.8V)(31/32 x 40mA x 8) = 1.07W
Thus, for a PDIP package θJA = +75°C/W (from Table 13), the maximum allowed ambient temperature TA is given by:
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TJ,MAX = TA + PD x θJA = 150°C = TA +1.07W x 75°C/W.
Where:
TA = +69.7°C.
The TA limit for SO Packages in the dissipation example above is +59.0°C.
Table 16. Package Thermal Resistance Data
Package
Thermal Resistance (θJA)
24 Wide SO
+85ºC/w
Maximum Junction Temperature (TJ) = +150ºC
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Maximum Ambient Temperature (TA) = +85ºC
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Revision 1.37
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AS1100
Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s
10 Package Drawings and Markings
Table 17. Packaging Code YYWWQZZ
WW
Q
last two digits of the current year
manufacturing week
plant identifier
ZZ
free choice / traceability code
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YY
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Figure 8. AS1100 Marking
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Revision 1.37
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AS1100
Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s
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Figure 9. SOIC 24-pin Package Diagram
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Revision 1.37
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AS1100
Datasheet - O r d e r i n g I n f o r m a t i o n
11 Ordering Information
The device is available as the standard products shown in Table 18.
Table 18. Ordering Information
Marking
AS1100WL
Description
Serially Interfaced, 8-Digit LED Driver
Temp Range
AS1100WE
AS1100WE
Serially Interfaced, 8-Digit LED Driver
-40ºC to +85ºC
Tubes
AS1100WL-T
AS1100WL
Serially Interfaced, 8-Digit LED Driver
0ºC to +70ºC
Tape & Reel
AS1100WE-T
AS1100WE
Serially Interfaced, 8-Digit LED Driver
-40ºC to +85ºC
Tape & Reel
0ºC to +70ºC
Delivery Form
Tubes
Package
SOIC 24-pin
SOIC 24-pin
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Ordering Code
AS1100WL
SOIC 24-pin
SOIC 24-pin
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Note: All products are RoHS compliant and austriamicrosystems green.
Buy our products or get free samples online at ICdirect: http://www.austriamicrosystems.com/ICdirect
Technical Support is found at http://www.austriamicrosystems.com/Technical-Support
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For further information and requests, please contact us mailto:[email protected]
or find your local distributor at http://www.austriamicrosystems.com/distributor
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Revision 1.37
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AS1100
Datasheet
Copyrights
Copyright © 1997-2012, austriamicrosystems AG, Tobelbaderstrasse 30, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®.
All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of
the copyright owner.
All products and companies mentioned are trademarks or registered trademarks of their respective companies.
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Disclaimer
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Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale.
austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding
the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at
any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for
current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range,
unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are
specifically not recommended without additional processing by austriamicrosystems AG for each application. For shipments of less than 100
parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location.
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The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not
be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use,
interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing,
performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of
austriamicrosystems AG rendering of technical or other services.
Headquarters
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Contact Information
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austriamicrosystems AG
Tobelbaderstrasse 30
A-8141 Unterpremstaetten, Austria
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Tel: +43 (0) 3136 500 0
Fax: +43 (0) 3136 525 01
For Sales Offices, Distributors and Representatives, please visit:
http://www.austriamicrosystems.com/contact
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Revision 1.37
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