ON NSB9435T1 High current bias resistor transistor Datasheet

NSB9435T1
Preferred Device
High Current Bias Resistor
Transistor
PNP Silicon
Features
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• Collector −Emitter Sustaining Voltage −
POWER BJT
IC = 3.0 AMPERES
BVCEO = 30 VOLTS
VCE(sat) = 0.275 VOLTS
VCEO(sus) = 30 Vdc (Min) @ IC = 10 mAdc
• High DC Current Gain −
hFE
•
•
•
•
= 125 (Min) @ IC = 0.8 Adc
= 90 (Min) @ IC = 3.0 Adc
Low Collector −Emitter Saturation Voltage −
VCE(sat) = 0.275 Vdc (Max) @ IC = 1.2 Adc
= 0.55 Vdc (Max) @ IC = 3.0 Adc
SOT−223 Surface Mount Packaging
ESD Rating − Human Body Model: Class 1B
− Machine Model: Class B
Pb−Free Package is Available
COLLECTOR 2,4
BASE
1
EMITTER 3
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
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Rating
Symbol
Value
Unit
VCEO
30
Vdc
Collector−Base Voltage
VCB
45
Vdc
Emitter−Base Voltage
VEB
± 6.0
Vdc
Base Current − Continuous
IB
1.0
Adc
Collector Current
IC
3.0
5.0
Adc
PD
3.0
24
1.56
W
mW/_C
W
Collector−Emitter Voltage
− Continuous
− Peak
Total Power Dissipation @ TC = 25_C
Derate above 25_C
Total PD @ TA = 25_C mounted on 1″ sq.
(645 sq. mm) Collector pad on FR−4 bd
material
Total PD @ TA = 25_C mounted on 0.012″
sq. (7.6 sq. mm) Collector pad on FR−4 bd
material
Operating and Storage Junction
Temperature Range
TJ, Tstg
0.72
W
– 55 to
+ 150
_C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
SOT−223
CASE 318E
STYLE 1
MARKING DIAGRAM
AYW
9435R G
G
1
A
= Assembly Location
Y
= Year
W
= Work Week
9435R = Device Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Package
Shipping †
NSB9435T1
SOT−223
1000/Tape & Reel
NSB9435T1G
SOT−223
(Pb−Free)
1000/Tape & Reel
Device
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Preferred devices are recommended choices for future use
and best overall value.
© Semiconductor Components Industries, LLC, 2006
April, 2006 − Rev. 5
1
Publication Order Number:
NSB9435T1/D
NSB9435T1
THERMAL CHARACTERISTICS
Characteristic
Symbol
Thermal Resistance
Junction−to−Case
Junction−to−Ambient on 1″ sq.(645 sq. mm) Collector pad on FR−4 board material
Junction−to−Ambient on 0.012″ sq. (7.6 sq. mm) Collector pad on FR−4 board material
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 5 s
Value
Unit
_C/W
RqJC
RqJA
RqJA
42
80
174
TL
260
_C
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
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Characteristics
Symbol
Min
Typ
Max
30
−
−
6.0
−
−
−
−
−
−
20
200
−
−
700
−
−
−
0.155
−
−
0.210
0.275
0.550
−
−
1.25
−
−
1.10
125
110
90
220
−
−
−
−
−
7.5
10
12.5
−
100
150
−
135
−
−
110
−
Unit
OFF CHARACTERISTICS
Collector−Emitter Sustaining Voltage
(IC = 10 mAdc, IB = 0 Adc)
VCEO(sus)
Emitter−Base Voltage
(IE = 50 mAdc, IC = 0 Adc)
VEBO
Collector Cutoff Current
(VCE = 25 Vdc)
(VCE = 25 Vdc, TJ = 125°C)
ICER
Emitter Cutoff Current
(VBE = 5.0 Vdc)
IEBO
Vdc
Vdc
mAdc
mAdc
ON CHARACTERISTICS (Note 1)
Collector−Emitter Saturation Voltage
(IC = 0.8 Adc, IB = 20 mAdc)
(IC = 1.2 Adc, IB = 20 mAdc)
(IC = 3.0 Adc, IB = 0.3 Adc)
VCE(sat)
Base−Emitter Saturation Voltage
(IC = 3.0 Adc, IB = 0.3 Adc)
VBE(sat)
Base−Emitter On Voltage
(IC = 1.2 Adc, VCE = 4.0 Vdc)
VBE(on)
DC Current Gain
(IC = 0.8 Adc, VCE = 1.0 Vdc)
(IC = 1.2 Adc, VCE = 1.0 Vdc)
(IC = 3.0 Adc, VCE = 1.0 Vdc)
hFE
Resistor
R1
Vdc
Vdc
Vdc
−
kW
DYNAMIC CHARACTERISTICS
Output Capacitance
(VCB = 10 Vdc, IE = 0 Adc, f = 1.0 MHz)
Cob
Input Capacitance
(VEB = 8.0 Vdc)
Cib
Current−Gain − Bandwidth Product (Note 2)
(IC = 500 mA, VCE = 10 V, Ftest = 1.0 MHz)
fT
1. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%.
2. fT = |hFE| S ftest
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2
pF
pF
MHz
NSB9435T1
1000
0.25
hFE, DC CURRENT GAIN
VCE(sat), COLLECTOR−EMITTER
SATURATION VOLTAGE (V)
0.3
IC = 3.0 A
0.2
0.15
TA = 150°C
25°C
100
0.1
1.2 A
0.8 A
0.05
0.5 A
0.25 A
0
0.001
0.01
−55°C
VCE = 1.0 V
10
0.1
0.1
1
IB, BASE CURRENT (mA)
10
IC, COLLECTOR CURRENT (A)
Figure 1. Collector Saturation Region
Figure 2. DC Current Gain
1000
10
TA = 150°C
V, VOLTAGE (V)
hFE, DC CURRENT GAIN
1
25°C
100
−55°C
VBE(sat)
1
VCE(sat)
0.1
VCE = 4.0 V
IC/IB = 10
10
0.01
0.1
1
10
1.0E−01
IC, COLLECTOR CURRENT (A)
1.0E+00
1.0E+01
IC, COLLECTOR CURRENT (A)
Figure 3. DC Current Gain
Figure 4. “ON” Voltages
1.0E+00
1.2
VBE(sat)
V, VOLTAGE (V)
V, VOLTAGE (V)
1
VCE(sat)
1.0E−01
−55°C
0.8
25°C
0.6
TA = 155°C
0.4
0.2
IC/IB = 50
1.0E−02
0
1.0E−01
1.0E+00
1.0E+01
0.1
IC, COLLECTOR CURRENT (A)
1
IC, COLLECTOR CURRENT (A)
Figure 5. “ON” Voltages
Figure 6. VBE(on) Voltage
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3
10
NSB9435T1
10
IC, COLLECTOR CURRENT (A)
Cob, OUTPUT CAPACITANCE (pF)
1000
100
10
f = 1 MHz
TA = 25°C
1
0.5 ms
5.0 ms
1.0
100 ms
0.1
0.01
BONDING WIRE LIMIT
THERMAL LIMIT (Single Pulse)
SECONDARY BREAKDOWN LIMIT
0.001
0.1
1
10
100
0.1
Figure 7. Output Capacitance
PD, POWER DISSIPATION (WATTS)
TC
2.0
1.0
TA
0
75
100
100
There are two limitations on the power handling ability of
a transistor: average junction temperature and secondary
breakdown. Safe operating area curves indicate IC − VCE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figure 8 is based on T J(pk) = 150_C; TC is
variable depending on conditions. Secondary breakdown
pulse limits are valid for duty cycles to 10% provided TJ(pk)
v 150_C. T J(pk) may be calculated from the data in
Figure 10. At high case temperatures, thermal limitations
will reduce the power that can be handled to values less than
the limitations imposed by secondary breakdown.
3.0
50
10
Figure 8. Active Region Safe Operating Area
4.0
25
1.0
VCE, COLLECTOR−EMITTER VOLTAGE (VOLTS)
VR, REVERSE VOLTAGE (V)
125
150
T, TEMPERATURE (°C)
r(t), EFFECTIVE TRANSIENT THERMAL
RESISTANCE (NORMALIZED)
Figure 9. Power Derating
1.0
D = 0.5
0.1
0.01
0.2
0.1
0.05
0.02
0.01
RqJA(t) = r(t) qJA
qJA = 174°C/W
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) − TA = P(pk) qJA(t)
SINGLE PULSE
0.001
P(pk)
t1
t2
DUTY CYCLE, D = t1/t2
0.0001
0.0001
0.001
0.01
0.1
1.0
t, TIME (seconds)
Figure 10. Thermal Response
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4
10
100
1000
NSB9435T1
PACKAGE DIMENSIONS
SOT−223 (TO−261)
CASE 318E−04
ISSUE L
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
D
b1
4
HE
1
2
3
E
b
e1
e
0.08 (0003)
C
q
A
A1
DIM
A
A1
b
b1
c
D
E
e
e1
L1
HE
q
STYLE 1:
PIN 1.
2.
3.
4.
L1
MIN
1.50
0.02
0.60
2.90
0.24
6.30
3.30
2.20
0.85
1.50
6.70
0°
MILLIMETERS
NOM
MAX
1.63
1.75
0.06
0.10
0.75
0.89
3.06
3.20
0.29
0.35
6.50
6.70
3.50
3.70
2.30
2.40
0.94
1.05
1.75
2.00
7.00
7.30
10°
−
MIN
0.060
0.001
0.024
0.115
0.009
0.249
0.130
0.087
0.033
0.060
0.264
0°
INCHES
NOM
0.064
0.002
0.030
0.121
0.012
0.256
0.138
0.091
0.037
0.069
0.276
−
MAX
0.068
0.004
0.035
0.126
0.014
0.263
0.145
0.094
0.041
0.078
0.287
10°
BASE
COLLECTOR
EMITTER
COLLECTOR
SOLDERING FOOTPRINT*
3.8
0.15
2.0
0.079
2.3
0.091
2.3
0.091
6.3
0.248
2.0
0.079
1.5
0.059
SCALE 6:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
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NSB9435T1/D
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