EN27C512 EN27C512 512KBIT EPROM (64K x 8) FEATURES • Latch-Up Immunity to 100mA • Fast Read Access Time : -45, -55, -70, and -90ns from -1V to VCC + 1V • Single 5V Power Supply • Two-Line Control ( OE & CE ) • Programming Voltage +12.75V • Standard Product Identification Code • QuikRiteTM Programming Algorithm • JEDEC Standard Pinout • Typical programming time 20µs • 28-pin PDIP • Low Power CMOS Operation • 32-pin PLCC • 1µA Standby (Typical) • 28-pin TSOP (Type 1) • 30mA Operation (Max.) • Commercial and Industrial Temperature Ranges • CMOS- and TTL-Compatible I/O • High-Reliability CMOS Technology GENERAL DESCRIPTION The EN27C512 is a low-power 512Kbit, 5V-only one-time-programmable (OTP) read-only memory (EPROM). Organized into 64K words with 8 bits per word, it features QuikRiteTM singleaddress location programming, typically at 20µs per byte. Any byte can be accessed in less than 45ns, eliminating the need for WAIT states in high-performance microprocessor systems. The EN27C512 has separate Output Enable ( OE ) and Chip Enable ( CE ) controls which eliminate bus contention issues. FIGURE 1. PDIP Pin Name A0-A15 Function Addresses DQ0-DQ7 Outputs CE OE Chip Enable NC No Connect Output Enable 4800 Great America Parkway Ste 202 Santa Clara, CA. 95054 1 Tel: 408-235-8680 Fax: 408-235-8685 EN27C512 FIGURE 2. TSOP FIGURE 3. PLCC 4800 Great America Parkway Ste 202 Santa Clara, CA. 95054 2 Tel: 408-235-8680 Fax: 408-235-8685 EN27C512 FIGURE 4. BLOCK DIAGRAM FUNCTIONAL DESCRIPTION THE QUIKRITE TM PROGRAMMING OF THE EN27C512 When the EN27C512 is delivered, the chip has all 512K bits in the “ONE”, or HIGH state. “ZEROs” are loaded into the EN27C512 through the procedure of programming. The programming mode is entered when 12.75 ± 0.25V is applied to the OE /VPP pin and CE is at VIL. For programming, the data to be programmed is applied with 8 bits in parallel to the data pins. TM The QUIKRITE programming flowchart in Figure 5 shows Eon’s interactive programming algorithm. The interactive algorithm reduces programming time by using 20 µs to 100 µs programming pulses and giving each address only as many pulses as is necessary in order to reliably program the data. After each pulse is applied to a given address, the data in that address is verified. If the data is not verified, additional pulses are given until it is verified or until the maximum number of pulses is reached. This process is repeated while sequencing through each address of the EN27C512. This part of the programming algorithm is done at VCC = 6.25V to assure that each EPROM bit is programmed to a sufficiently high threshold voltage. This ensures that all bits have sufficient margin. After the final address is completed, the entire EPROM memory is read at VCC = 5.25 ± 0.25V to verify the entire memory. 4800 Great America Parkway Ste 202 Santa Clara, CA. 95054 3 Tel: 408-235-8680 Fax: 408-235-8685 EN27C512 PROGRAM INHIBIT MODE Programming of multiple EN27C512 in parallel with different data is also easily accomplished by using the Program Inhibit Mode. Except for CE , all like inputs of the parallel EN27C512 may be common. A TTL low-level program pulse applied to an EN27C512 CE input with OE /VPP = 12.75 ± 0.25V will program that EN27C512. A high-level CE input inhibits the other EN27C512 from being programmed. PROGRAM VERIFY MODE Verification should be performed on the programmed bits to determining that they were correctly programmed. The verification should be performed with OE /VPP and CE at VIL. Data should be verified at tDV after the falling edge of CE . AUTO PRODUCT IDENTIFICATION The Auto Product Identification mode allows the reading out of a binary code from an EPROM that will identify its manufacturer and type. This mode is intended for use by programming equipment for the purpose of automatically matching the device to be programmed with its corresponding programming algorithm. This mode is functional in the 25°C ± 5°C ambient temperature range that is required when programming the EN27C512. To activate this mode, the programming equipment must force 12.0 V ± 0.5V on address line A9 of the EN27C512. Two identifier bytes may then be sequenced from the device outputs by toggling address line A0 from VIL to VIH, when A1 = VIH. All other address lines must be held at VIL during Auto Product Identification mode. Byte 0 (A0 = VIL) represents the manufacturer code, and byte 1 (A0 = VIH), the device code. For the EN27C512, these two identifiers bytes are given in the Mode Select Table. All identifiers for manufacturer and device codes will possess odd parity, with the MSB (DQ7) defined as the parity bit. When A1 = V IL, the EN27C512 will read out the binary code of 7F, continuation code, to signify the unavailability of manufacturer ID codes. 4800 Great America Parkway Ste 202 Santa Clara, CA. 95054 4 Tel: 408-235-8680 Fax: 408-235-8685 EN27C512 READ MODE The EN27C512 has two control functions, both of which must be logically satisfied in order to obtain data at the outputs. Chip Enable ( CE ) is the power control and should be used for device selection. Output Enable ( OE ) is the output control and should be used to gate data to the output pins, independent of device selection. Assuming that addresses are stable, address access time (tACC) is equal to the delay from CE to output (tCE) . Data is available at the outputs (tOE) after the falling edge of OE , assuming the CE has been LOW and addresses have been stable for at least tACC - tOE. STANDBY MODE The EN27C512 has CMOS standby mode which reduces the maximum V CC current to 20µA. It is placed in CMOS standby when CE is at VCC ± 0.3 V. The EN27C512 also has a TTLstandby mode which reduces the maximum V CC current to 1.0 mA. It is placed in TTLstandby when CE is at VIH. When in standby mode, the outputs are in a high-impedance state, independent of the OE input. TWO-LINE OUTPUT CONTROL FUNCTION To accommodate multiple memory connections, a two-line control function is provided to allow for: 1. Low memory power dissipation, 2. Assurance that output bus contention will not occur. It is recommended that CE be decoded and used as the primary device-selection function, while OE be made a common connection to all devices in the array and connected to the READ line from the system control bus. This assures that all deselected memory devices are in their lowpower standby mode and that the output pins are only active when data is desired from a particular memory device. SYSTEM CONSIDERATIONS During the switch between active and standby conditions, transient current peaks are produced on the rising and falling edges of Chip Enable. The magnitude of these transient current peaks is dependent on the output capacitance loading of the device. At a minimum, a 0.1µF ceramic capacitor (high frequency, low inherent inductance) should be used on each device between VCC and VSS to minimize transient effects. In addition, to overcome the voltage drop caused by the inductive effects of the printed circuit board traces on EPROM arrays, a 4.7µF bulk electrolytic capacitor should be used between VCC and VSS for each eight devices. The location of the capacitor should be close to where the power supply is connected to the array. 4800 Great America Parkway Ste 202 Santa Clara, CA. 95054 5 Tel: 408-235-8680 Fax: 408-235-8685 EN27C512 MODE SELECT TAB OE /VPP VIL X VIH X X X High Z VIH X X High Z VCC ± 0.3V X X X High Z VIL VPP X X DIN Program Verify VIL X DOUT VIH VIL Vp p X Program Inhibit X X High Z VIL VIL VIL VH(1) Mode CE Read VIL Output Disable VIL Standby (TTL) Standby (CMOS) Program (4) Manufacturer Code Device Code (3) (3) VIL A0 VIL A9 X (1) VIH VH Output DOUT 1C 83 NOTES: 1) VH = 12.0V ± 0.5V 2) X = Either VIH or VIL 3) For Manufacturer Code and Device Code, A1 = V IH When A1 = V IL, both codes will read 7F 4) See DC Programming Characteristics for V PP voltage during programming EON’S STANDARD PRODUCT IDENTIFICATION CODE Hex Data Pins Code Manufacturer Device Type Continuation A0 0 1 0 1 A1 1 1 0 0 4800 Great America Parkway Ste 202 Santa Clara, CA. 95054 DQ7 0 1 0 0 DQ6 0 0 1 1 DQ5 0 0 1 1 6 DQ4 1 0 1 1 DQ3 1 0 1 1 DQ2 1 0 1 1 DQ1 0 1 1 1 DQ0 0 1 1 1 1C 83 7F 7F Tel: 408-235-8680 Fax: 408-235-8685 EN27C512 FIGURE 5. QUIKRITETM PROGRAMMING FLOW CHART NOTE 1: Either 100µs or 20µs pulse. 4800 Great America Parkway Ste 202 Santa Clara, CA. 95054 7 Tel: 408-235-8680 Fax: 408-235-8685 EN27C512 ABSOLUTE MAXIMUM RATINGS Storage Temperature -65àC to +125àC Ambient Temperature with Power Applied -40àC to +85àC Voltage with Respect to V SS All pins except A9, V PP, VCC A9, VPP VCC -0.6V to VCC + 0.5V -0.6V to +13.5V -0.6V to +7.0V OPERATING RANGES Commercial (C) Case Temperature(Tc) 0àC to +70àC Industrial (I) Case Temperature(Tc) -40àC to +85àC +4.50V to +5.5V Supply READ Voltages (Functionality is guaranteed between these limits) Stresses above those shown above may cause permanent damage to the device. This is a stress rating only and operation above these specifications for extended periods may affect device reliability. Operation outside the "OPERATING RANGES" shown above voids any and all warranty provisions. DC CHARACTERISTICS FOR READ OPERATION Symbol Parameter Min. VOH Output High Voltage 2.4 VOL Output Low Voltage VIH Input High Voltage 2.0 VIL Input Low Voltage ILI Input Leakage Current ILO Output Leakage Current ICC3 Max. Unit Conditions V IOH = -0.4mA 0.45 V IOL = 2.1mA VCC +0.5 V -0.3 0.8 V -5 5 µA VIN = 0 to 5.5V -10 10 µA VOUT = 0 to 5.5V VCC Power -Down Current 10 µA ICC2 VCC Standby Current 1.0 mA ICC1 VCC Active Current 30 mA CE = VCC ± 0.3V CE = VIH CE = VIL, f=5MHz, IOUT = 0mA IPP VPP Supply Current Read 100 µA CE = OE = VIL, VPP = 5.5V CAPACITANCE Symbol CIN COUT CVPP Parameter Input Capacitance Output Capacitance VPP Capacitance 4800 Great America Parkway Ste 202 Santa Clara, CA. 95054 Typ. 8 8 18 Max. 12 12 25 Unit pF pF pF 8 Conditions VIN = 0V VOUT = 0V VPP = 0V Tel: 408-235-8680 Fax: 408-235-8685 EN27C512 AC CHARACTERISTICS FOR READ OPERATION -45 Min Max EN27C512 -55 -70 Min Max Min Max Parameter Condition tACC (3) Address to Output Delay CE = OE = VIL 45 55 70 90 Unit ns tCE (2) CE to Output Delay OE = VIL 45 55 70 90 ns tOE (2, 3) OE to Output Delay OE = VIL 25 25 30 35 ns tDF (4, 5) OE or CE High to Output Float, whichever occurred first 20 20 25 25 ns tOH Output Hold from Address, CE or OE , whichever occurred first 0 0 0 Min -90 Max Symbol 0 FIGURE 6. AC WAVEFORMS FOR READ OPERATION ADDRESS ADDRESS VALID CE tCE tOE OE tDF tACC OUTPUT 4800 Great America Parkway Ste 202 Santa Clara, CA. 95054 tOH HIGH Z OUTPUT VALID 9 Tel: 408-235-8680 Fax: 408-235-8685 ns EN27C512 FIGURE 7. OUTPUT TEST WAVEFORMS AND MEASUREMENTS 45 and 55 devices: 3.0V AC DRIVING LEVELS AC MEASUREMENT LEVEL 1.5V Output Test Load 1.3V 0.0V (1N914) tR, tF < 5 ns (10% to 90%) 3.3K OUTPUT PIN 70 and 90 devices: 2.4V AC DRIVING LEVELS 0.45V 2.0 0.8 CL AC MEASUREMENT LEVEL Note: CL = 100pF including jig capacitance, except for the -45 and -55 devices, where CL = 30pF. tR, tF < 20 ns (10% to 90%) DC PROGRAMMING CHARACTERISTICS Symbol ILI Parameter Input Load Current VIL VIH VOL VOH Input Low Level Input High Level Output Low Voltage Output High Voltage ICC2 VCC Supply Current (Program and Verify) IPP2 VID VPP Supply Current A9 Product Identification Voltage 4800 Great America Parkway Ste 202 Santa Clara, CA. 95054 Test Conditions VIN = VIL, VIH Min. -0.5 0.7 VCC IOL = 2.1 mA IOH = -400 µA 11.5 Units µA 0.8 VCC + 0.5 0.45 V V V V 40 mA 10 12.5 mA V 2.4 CE = PGM = VIL, 10 Limits Max 5.0 Tel: 408-235-8680 Fax: 408-235-8685 EN27C512 FIGURE 8. PROGRAMMING WAVEFORMS 4800 Great America Parkway Ste 202 Santa Clara, CA. 95054 11 Tel: 408-235-8680 Fax: 408-235-8685 EN27C512 SWITCHING PROGRAMMING CHARACTERISTICS (TA = + 25° C ± 5°C) PARAMETER SYMBOL STANDARD PARAMETER DESCRIPTION tAS tOES tOEH tDS tAH tDH tDFP tPW Address Setup Time tVCS tDV Data Valid from CE tVR OE /VPP Hold Time Min. 2 Max Units µs OE /VPP Setup Time 2 µs OE /VPP Hold Time 2 µs Data Setup Time 2 µs Address Hold Time 0 µs Data Hold Time 2 Output Enable to Output Float Delay 0 130 PGM Program Pulse Width 20 105 Vcc Setup Time 2 µs ns µs µs 150 2 ns µs ORDERING INFORMATION EN27C512 45 P I TEMPERATURE RANGE (Blank) = Commercial ( 0àC to +70àC) I = Industrial ( -40àC to +85àC) PACKAGE P = 28 Plastic DIP J = 32 Plastic PLCC T = 28 Plastic TSOP SPEED 45 = 45ns 55 = 55ns 70 = 70ns 90 = 90ns BASE PART NUMBER EN = EON Silicon Devices 27 = EPROM C = CMOS 512 = 64K x 8 4800 Great America Parkway Ste 202 Santa Clara, CA. 95054 12 Tel: 408-235-8680 Fax: 408-235-8685