MC10LVEP16, MC100LVEP16 2.5V / 3.3VECL Differential Receiver/Driver Description MARKING DIAGRAMS* 8 8 1 SOIC−8 D SUFFIX CASE 751 8 1 TSSOP−8 DT SUFFIX CASE 948R • 240 ps Propagation Delay • Maximum Frequency > 4 GHz Typical • PECL Mode Operating Range: VCC = 2.375 V to 3.8 V 1 KVP16 ALYW G 1 8 HU16 ALYWG G 1 KU16 ALYWG G 5Y MG G with VEE = 0 V NECL Mode Operating Range: VCC = 0 V with VEE = −2.375 V to −3.8 V VBB Output 8 HVP16 ALYW G 8 1 Features • http://onsemi.com 1 • • Open Input Default State • LVDS Input Compatible • Pb−Free Packages are Available 4 4L MG G The MC10/100LVEP16 is a world class differential receiver/driver. The device is functionally equivalent to the EL16, EP16 and LVEL16 devices. With output transition times significantly faster than the EL16 and LVEL16, the LVEP16 is ideally suited for interfacing with high frequency and low voltage (2.5 V) sources. Single−ended CLK input operation is limited to a VCC w 3.0 V in PECL mode, or VEE v −3.0 V in NECL mode. The VBB pin, an internally generated voltage supply, is available to this device only. For single−ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open. The 100 Series contains temperature compensation. 1 4 DFN8 MN SUFFIX CASE 506AA H = MC10 A = Assembly Location K = MC100 L = Wafer Lot 5Y = MC10 Y = Year 4L = MC100 W = Work Week M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet. © Semiconductor Components Industries, LLC, 2006 December, 2006 − Rev. 10 1 Publication Order Number: MC10LVEP16/D MC10LVEP16, MC100LVEP16 Table 1. PIN DESCRIPTION NC D D VBB 1 8 2 7 3 6 4 5 VCC Pin Q Q VEE Figure 1. 8−Lead Pinout (Top View) and Logic Diagram Function D*, D** ECL Data Inputs Q, Q ECL Data Outputs VBB Ref. Voltage Output VCC Positive Supply VEE Negative Supply NC No Connect EP Exposed pad must be connected to a sufficient thermal conduit. Electrically connect to the most negative supply or leave floating open. * Pins will default LOW when left open. **Pins will default to VCC/2 when left open. Table 2. ATTRIBUTES Characteristics Value Internal Input Pulldown Resistor 75 kW Internal Input Pullup Resistor ESD Protection 37.5 kW Human Body Model Machine Model Charged Device Model Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Flammability Rating Oxygen Index: 28 to 34 > 4 kV > 200 V > 2 kV Level 1 UL 94 V−0 @ 0.125 in Transistor Count 167 Devices Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. http://onsemi.com 2 MC10LVEP16, MC100LVEP16 Table 3. MAXIMUM RATINGS Rating Unit VCC Symbol PECL Mode Power Supply Parameter VEE = 0 V Condition 1 6 V VEE NECL Mode Power Supply VCC = 0 V −6 V VI PECL Mode Input Voltage NECL Mode Input Voltage VEE = 0 V VCC = 0 V 6 −6 V V Iout Output Current Continuous Surge 50 100 mA mA IBB VBB Sink/Source ± 0.5 mA TA Operating Temperature Range −40 to +85 °C Tstg Storage Temperature Range −65 to +150 °C qJA Thermal Resistance (Junction−to−Ambient) 0 lfpm 500 lfpm SOIC−8 SOIC−8 190 130 °C/W °C/W qJC Thermal Resistance (Junction−to−Case) Standard Board SOIC−8 41 to 44 °C/W qJA Thermal Resistance (Junction−to−Ambient) 0 lfpm 500 lfpm TSSOP−8 TSSOP−8 185 140 °C/W °C/W qJC Thermal Resistance (Junction−to−Case) Standard Board TSSOP−8 41 to 44 °C/W qJA Thermal Resistance (Junction−to−Ambient) 0 lfpm 500 lfpm DFN8 DFN8 129 84 °C/W °C/W Tsol Wave Solder <2 to 3 sec @ 248°C <2 to 3 sec @ 260°C 265 265 °C Pb Pb−Free Condition 2 VI v VCC VI w VEE Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. http://onsemi.com 3 MC10LVEP16, MC100LVEP16 Table 4. 10EP DC CHARACTERISTICS, PECL VCC = 2.5 V, VEE = 0 V (Note 2) −40°C Symbol Characteristic 25°C 85°C Min Typ Max Min Typ Max Min Typ Max Unit 17 22 27 17 22 27 17 22 28 mA IEE Power Supply Current VOH Output HIGH Voltage (Note 3) 1365 1490 1615 1430 1555 1680 1490 1615 1740 mV VOL Output LOW Voltage (Note 3) 565 740 865 630 805 930 690 865 990 mV VIHCMR Input HIGH Voltage Common Mode Range (Differential Configuration) (Notes 4, 5) 1.2 2.5 1.2 2.5 1.2 2.5 V IIH Input HIGH Current 150 mA IIL Input LOW Current 150 D D 0.5 −150 150 0.5 −150 0.5 −150 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 2. Input and output parameters vary 1:1 with VCC. VEE can vary +0.125 V to −1.3 V. 3. All loading with 50 W to VCC − 2.0 V. 4. Do not use VBB at VCC < 3.0 V. Single ended input CLK pin operation is limited to VCC 3.0 V in PECL mode. 5. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Table 5. 10EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 6) −40°C Symbol Characteristic 25°C 85°C Min Typ Max Min Typ Max Min Typ Max Unit 17 22 27 17 22 27 17 22 28 mA IEE Power Supply Current VOH Output HIGH Voltage (Note 7) 2165 2290 2415 2230 2355 2480 2290 2415 2540 mV VOL Output LOW Voltage (Note 7) 1365 1540 1665 1430 1605 1730 1490 1665 1790 mV VIH Input HIGH Voltage (Single Ended) 2090 2415 2155 2480 2215 2540 mV VIL Input LOW Voltage (Single Ended) 1365 1690 1430 1755 1490 1815 mV VBB Output Voltage Reference (Note 8) 1790 1990 1855 2055 1915 2115 mV VIHCMR Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 9) 1.2 3.3 1.2 3.3 1.2 3.3 V IIH Input HIGH Current 150 mA IIL Input LOW Current 1890 150 D D 0.5 −150 1955 150 0.5 −150 0.5 −150 2015 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 6. Input and output parameters vary 1:1 with VCC. VEE can vary +0.925 V to −0.5 V. 7. All loading with 50 W to VCC − 2.0 V. 8. Single ended input CLK pin operation is limited to VCC 3.0 V in PECL mode. 9. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. http://onsemi.com 4 MC10LVEP16, MC100LVEP16 Table 6. 10EP DC CHARACTERISTICS, NECL VCC = 0 V, VEE = −3.8 V to −2.375 V (Note 10) −40°C Symbol Characteristic 25°C 85°C Min Typ Max Min Typ Max Min Typ Max Unit 17 22 27 17 22 27 17 22 28 mA IEE Power Supply Current VOH Output HIGH Voltage (Note 11) −1135 −1010 −885 −1070 −945 −820 −1010 −885 −760 mV VOL Output LOW Voltage (Note 11) −1935 −1760 −1635 −1870 −1695 −1570 −1810 −1635 −1510 mV VIH Input HIGH Voltage (Single Ended) −1210 −885 −1145 −820 −1085 −760 mV VIL Input LOW Voltage (Single Ended) −1935 −1610 −1870 −1545 −1810 −1485 mV VBB Output Voltage Reference (Note 12) −1510 −1310 −1445 −1245 −1385 −1185 mV VIHCMR Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 13) 0.0 V IIH Input HIGH Current 150 mA IIL Input LOW Current −1410 VEE+1.2 0.0 −1345 VEE+1.2 0.0 150 D D 0.5 −150 −1285 VEE+1.2 150 0.5 −150 0.5 −150 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 10. Input and output parameters vary 1:1 with VCC. 11. All loading with 50 W to VCC − 2.0 V. 12. Single ended input CLK pin operation is limited to VEE −3.0 V in NECL mode. 13. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Table 7. 100EP DC CHARACTERISTICS, PECL VCC = 2.5 V, VEE = 0 V (Note 14) −40°C Symbol Characteristic 25°C 85°C Min Typ Max Min Typ Max Min Typ Max Unit 19 24 29 22 28 34 24 30 36 mA Output HIGH Voltage (Note 15) 1355 1480 1605 1355 1480 1605 1355 1480 1605 mV VOL Output LOW Voltage (Note 15) 555 730 900 555 730 900 555 730 900 mV VIHCMR Input HIGH Voltage Common Mode Range (Differential Configuration) (Notes 16, 17) 1.2 3.3 1.2 3.3 1.2 3.3 V IIH Input HIGH Current 150 mA IIL Input LOW Current IEE Power Supply Current VOH 150 D D 0.5 −150 150 0.5 −150 0.5 −150 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 14. Input and output parameters vary 1:1 with VCC. VEE can vary +0.125 V to −1.3 V. 15. All loading with 50 W to VCC − 2.0 V. 16. Do not use VBB at VCC < 3.0 V. Single ended input CLK pin operation is limited to VCC 3.0 V in PECL mode. 17. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. http://onsemi.com 5 MC10LVEP16, MC100LVEP16 Table 8. 100EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 18) −40°C Symbol Characteristic 25°C 85°C Min Typ Max Min Typ Max Min Typ Max Unit 19 24 29 22 28 34 24 30 36 mA IEE Power Supply Current VOH Output HIGH Voltage (Note 19) 2155 2280 2405 2155 2280 2405 2155 2280 2405 mV VOL Output LOW Voltage (Note 19) 1355 1530 1700 1355 1530 1700 1355 1530 1700 mV VIH Input HIGH Voltage (Single Ended) 2135 2420 2135 2420 2135 2420 mV VIL Input LOW Voltage (Single Ended) 1355 1700 1355 1700 1355 1700 mV VBB Output Voltage Reference (Note 20) 1775 1975 1775 1975 1775 1975 mV VIHCMR Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 21) 1.2 3.3 1.2 3.3 1.2 3.3 V IIH Input HIGH Current 150 mA IIL Input LOW Current 1875 1875 150 D D 1875 150 0.5 −150 0.5 −150 0.5 −150 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 18. Input and output parameters vary 1:1 with VCC. VEE can vary +0.925 V to −0.5 V. 19. All loading with 50 W to VCC − 2.0 V. 20. Single ended input CLK pin operation is limited to VCC 3.0 V in PECL mode. 21. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Table 9. 100EP DC CHARACTERISTICS, NECL VCC = 0 V, VEE = −3.8 V to −2.375 V (Note 22) −40°C Symbol Characteristic 25°C 85°C Min Typ Max Min Typ Max Min Typ Max Unit 19 24 29 22 28 34 24 30 36 mA Output HIGH Voltage (Note 23) −1145 −1020 −895 −1145 −1020 −895 −1145 −1020 −895 mV VOL Output LOW Voltage (Note 23) −1945 −1770 −1600 −1945 −1770 −1600 −1945 −1770 −1600 mV VIH Input HIGH Voltage (Single Ended) −1165 −880 −1165 −880 −1165 −880 mV VIL Input LOW Voltage (Single Ended) −1945 −1600 −1945 −1600 −1945 −1600 mV VBB Output Voltage Reference (Note 24) −1525 −1325 −1525 −1325 −1525 −1325 mV VIHCMR Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 25) 0.0 V IIH Input HIGH Current 150 mA IIL Input LOW Current IEE Power Supply Current VOH −1425 VEE+1.2 0.0 150 D D 0.5 −150 −1425 VEE+1.2 0.0 150 0.5 −150 −1425 VEE+1.2 0.5 −150 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 22. Input and output parameters vary 1:1 with VCC. 23. All loading with 50 W to VCC − 2.0 V. 24. Single ended input CLK pin operation is limited to VEE −3.0 V in NECL mode. 25. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. http://onsemi.com 6 MC10LVEP16, MC100LVEP16 Table 10. AC CHARACTERISTICS VCC = 0 V; VEE = −3.8 V to −2.375 V or VCC = 2.375 V to 3.8 V; VEE = 0 V (Note 26) −40°C Symbol Min Characteristic fmax Maximum Frequency (See Figure 2. Fmax/JITTER) tPLH, tPHL Propagation Delay to Output Differential tSKEW Duty Cycle Skew (Note 27) tJITTER CLOCK Random Jitter (RMS) @ v 1.0 GHz @ v 1.5 GHz @ v 2.0 GHz @ v 2.5 GHz @ v 3.0 GHz @ v 3.5 GHz VPP Input Voltage Swing (Differential Configuration) tr tf Output Rise/Fall Times (20% − 80%) Typ 25°C Max Min >4 150 Q, Q Typ 85°C Max Min >4 220 300 5.0 170 Typ Max >4 240 320 20 5.0 0.134 0.077 0.115 0.117 0.122 0.123 0.2 0.2 0.2 0.2 0.2 0.2 150 800 1200 70 120 170 190 Unit GHz 260 330 ps 20 5.0 20 ps 0.147 0.104 0.141 0.132 0.143 0.145 0.3 0.3 0.3 0.3 0.3 0.3 0.166 0.145 0.153 0.156 0.177 0.202 0.3 0.3 0.3 0.3 0.3 0.3 150 800 1200 150 800 1200 mV 80 130 180 100 150 200 ps ps 900 9 800 8 700 7 600 6 500 5 400 4 300 3 ÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉ ÉÉ 200 2 100 0 0 1000 2000 3000 4000 FREQUENCY (MHz) Figure 2. Fmax/Jitter http://onsemi.com 7 JITTEROUT ps (RMS) VOUTpp (mV) NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 26. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC − 2.0 V. 27. Skew is measured between outputs under identical transitions. Duty cycle skew is defined only for differential operation when the delays are measured from the cross point of the inputs to the cross point of the outputs. (JITTER) 5000 1 6000 MC10LVEP16, MC100LVEP16 Zo = 50 W Q D Receiver Device Driver Device Q D Zo = 50 W 50 W 50 W VTT VTT = VCC − 2.0 V Figure 3. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D − Termination of ECL Logic Devices.) ORDERING INFORMATION Package Shipping† SOIC−8 98 Units / Rail MC10LVEP16DG SOIC−8 (Pb−Free) 98 Units / Rail MC10LVEP16DR2 SOIC−8 2500 / Tape & Reel MC10LVEP16DR2G SOIC−8 (Pb−Free) 2500 / Tape & Reel MC10LVEP16DT TSSOP−8 100 Units / Rail MC10LVEP16DTG TSSOP−8 (Pb−Free) 100 Units / Rail MC10LVEP16DTR2 TSSOP−8 2500 / Tape & Reel MC10LVEP16DTR2G TSSOP−8 (Pb−Free) 2500 / Tape & Reel MC10LVEP16MNR4 DFN8 1000 / Tape & Reel DFN8 (Pb−Free) 1000 / Tape & Reel SOIC−8 98 Units / Rail MC100LVEP16DG SOIC−8 (Pb−Free) 98 Units / Rail MC100LVEP16DR2 SOIC−8 2500 / Tape & Reel MC100LVEP16DR2G SOIC−8 (Pb−Free) 2500 / Tape & Reel MC100LVEP16DT TSSOP−8 100 Units / Rail MC100LVEP16DTG TSSOP−8 (Pb−Free) 100 Units / Rail MC100LVEP16DTR2 TSSOP−8 2500 / Tape & Reel MC100LVEP16DTR2G TSSOP−8 (Pb−Free) 2500 / Tape & Reel MC100LVEP16MNR4 DFN8 1000 / Tape & Reel DFN8 (Pb−Free) 1000 / Tape & Reel Device MC10LVEP16D MC10LVEP16MNR4G MC100LVEP16D MC100LVEP16MNR4G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 8 MC10LVEP16, MC100LVEP16 Resource Reference of Application Notes AN1405/D − ECL Clock Distribution Techniques AN1406/D − Designing with PECL (ECL at +5.0 V) AN1503/D − ECLinPSt I/O SPiCE Modeling Kit AN1504/D − Metastability and the ECLinPS Family AN1568/D − Interfacing Between LVDS and ECL AN1672/D − The ECL Translator Guide AND8001/D − Odd Number Counters Design AND8002/D − Marking and Date Codes AND8020/D − Termination of ECL Logic Devices AND8066/D − Interfacing with ECLinPS AND8090/D − AC Characteristics of ECL Devices http://onsemi.com 9 MC10LVEP16, MC100LVEP16 PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE AH −X− NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. A 8 5 S B 1 0.25 (0.010) M Y M 4 −Y− K G C N DIM A B C D G H J K M N S X 45 _ SEATING PLANE −Z− H 0.10 (0.004) D 0.25 (0.010) M Z Y S X M J S SOLDERING FOOTPRINT* 1.52 0.060 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 10 MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 _ 8 _ 0.010 0.020 0.228 0.244 MC10LVEP16, MC100LVEP16 PACKAGE DIMENSIONS TSSOP−8 DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948R−02 ISSUE A 8x 0.15 (0.006) T U 0.10 (0.004) S 2X L/2 L 8 5 1 PIN 1 IDENT 0.15 (0.006) T U K REF S M T U V S 0.25 (0.010) B −U− 4 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 6. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−. S M A −V− F DETAIL E C 0.10 (0.004) −T− SEATING PLANE D −W− G DETAIL E http://onsemi.com 11 DIM A B C D F G K L M MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 0.80 1.10 0.05 0.15 0.40 0.70 0.65 BSC 0.25 0.40 4.90 BSC 0_ 6_ INCHES MIN MAX 0.114 0.122 0.114 0.122 0.031 0.043 0.002 0.006 0.016 0.028 0.026 BSC 0.010 0.016 0.193 BSC 0_ 6_ MC10LVEP16, MC100LVEP16 PACKAGE DIMENSIONS DFN8 CASE 506AA−01 ISSUE D D NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994 . 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 MM FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. A B PIN ONE REFERENCE 2X 0.10 C 2X ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ 0.10 C TOP VIEW 0.08 C SEATING PLANE MILLIMETERS MIN MAX 0.80 1.00 0.00 0.05 0.20 REF 0.20 0.30 2.00 BSC 1.10 1.30 2.00 BSC 0.70 0.90 0.50 BSC 0.20 −−− 0.25 0.35 A 0.10 C 8X DIM A A1 A3 b D D2 E E2 e K L E (A3) SIDE VIEW A1 C D2 e e/2 4 1 8X L E2 K 8 5 8X b 0.10 C A B 0.05 C NOTE 3 BOTTOM VIEW ECLinPS is a trademark of Semiconductor Components INdustries, LLC (SCILLC). ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 http://onsemi.com 12 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative MC10LVEP16/D