FINTEK F75909 Smbus level shifter Datasheet

F75909
.
F75909
SMBus Level Shifter
Release Date: Dec, 2011
Version: V0.11P
Dec, 2011
V0.11P
F75909
F75909 Datasheet Revision History
Version
Data Brief
Date
2011/10
Page
-
V0.10P
2011/11
-
V0.11P
V0.12P
2011/12
2011/12
--
Revision History
Data Brief
Made Clarification and Correction
Add Application Circuit
Add Electrical Characteristics
Update Block Diagram / Application Circuit
Please note that all data and specifications are subject to change without notice. All the trade marks of products
and companies mentioned in this data sheet belong to their respective owners.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Fintek for any damages resulting from
such improper use or sales.
Dec, 2011
V0.11P
F75909
Table of Content
1
General Description ............................................................................... 1
2
Feature List ...................................................................................... 1
3
Block Diagram .................................................................................... 2
4
Pin Configuration ................................................................................. 2
5
Pin Description ................................................................................... 3
7
Electrical Characteristics ........................................................................... 3
8
Ordering Information .............................................................................. 5
9
Top Marking Specification .......................................................................... 5
10
Package Spec. ................................................................................... 6
11
Application Circuit ................................................................................. 7
Dec, 2011
V0.11P
F75909
1 General Description
2
2
The F75909 is a I C-bus/SMBus level shifter that translating signal voltage level of standard I C-bus or
SMBus. Port L allows a operating voltage range from 1.0 V to [VCC(H) -1.0 V]. The operating voltage of Port
H is range from 3.0 V to 5.5 V. When F75909 is disabled, both port L and port H I/O pins are highimpedance.
The bus port H are compliant with SMBus I/O levels, while port L uses a current sensing mechanism to
detect the input or output LOW signal which prevents bus lock-up. Port L uses a 1 mA current source for
pullpull-down driver. This results in a LOW on the port L accommodating smaller voltage
swings. The output pull-down on the port L internal buffer LOW is set for approximately 0.2 V, while the
input threshold of the internal buffer is set about 50 mV lower than that of the output voltage LOW. When
the port L I/O is driven LOW internally, the LOW is not recognized as a LOW by the input. This prevents a
lock-up condition from occurring. The output pull-down on the port H drives a hard LOW and the input level
2
2
is set at 0.3 of SMBus or I C-bus voltage level which enables port H to connect to any other I C-bus devices
or buffer.
The F75909 is not enabled unless VCC(L) is above 0.8 V and VCC(H) is above 2.5 V. The enable (EN) pin
can also be used to turn the drivers on and off under system control. Caution should be observed to only
change the state of the EN pin when the bus is idle.
2 Feature List





Voltage level shifting from L-Port (1V to Vcc(H) -1.0V)
No external pull-up resistors required on Port L
Open-drain I/O
Lock-up free operation
High impedance bus pin when Power-off.
1
Dec, 2011
V0.12P
F75909
3
Block Diagram
PWR_L
Vdd_switch
PWR_H
PWR_L
PWR_H
Pulse
Generator
4
Vdd_switch
Pulse
Generator
Pin Configuration
VCC(H) H1 H2 EN
F75909
MSOP-8
VCC(L) L1 L2 GND
Pin Configuration of F75909
2
Dec, 2011
V0.12P
F75909
5
Pin Description
IN
- input pin with schmitt trigger.
OUT
- Open-drain output pin
P
-Power.
4.1. Pin Description
7
Pin No.
Pin Name
Type
Description
1
VCC (L)
P
2
L1
Analog
Port L1 (lower voltage side)
3
L2
Analog
Port L2 (lower voltage side)
4
GND
Ground
Ground
5
EN
IN
6
H2
Analog
Port H1 (I/O signal input Side)
7
H1
Analog
Port H2 (I/O signal input Side)
8
VCC (H)
P
Port L power supply
Enable input
Port H power supply
Electrical Characteristics
Limiting Values
In accordance with the Absolute Maximum Rating System
Symbol
Parameter
Conditions
Vcc(H)
Supply voltage port High side
Vcc(L)
Supply voltage port Low side
VI/O
Voltage on an input/output pin
Port low side, enable pin (EN)
Port high side;
IO
output current
Ptot
Total power dissipation
Tstg
Storage temperature
Tamb
Ambient temperature
Operating in free air
Min
-0.5
-0.5
-0.5
-0.5
Max
+5.5
+5.5
+3.6
+5
16
-55
0
145
70
Unit
V
V
V
V
mA
mW
℃
℃
Static Characteristics
GND=0V; Tamb=-40℃ to +85℃; unless otherwise specified.
Symbol
Parameter
Conditions
Supplies
Vcc(H)
Supply voltage port High side
Vcc(L)
Supply voltage port Low side
Icc(L)
Supply current port Low side
All port low side static
High
All port low side static
Low
3
Min
2.5
1
Typ*1
Max
Unit
3.6
Vcc(B)
V
V
mA
mA
Dec, 2011
V0.12P
F75909
Icc(H)
Supply current port High side
Input and output of port Low side (L1 to L2)
VIH
High-level input voltage
VIL
Low-level input voltage
IIH
Input leakage current
IIL
Low-level input current
ILOH
output High leakage current
CiO
Input/output capacitance
Input and output of port High side (H1 to H2)
VIH
High-level input voltage
VIL
Low-level input voltage
IIH
Input leakage current
IIL
Low-level input current
ILOH
output High leakage current
CiO
Input/output capacitance
All port High side static
High
mA
Port Low side
0.7 Vcc(L)
Vcc(L)
V
Port Low side
VI=Vcc(L)
-0.5
0.3 Vcc(L)
V
uA
mA
uA
pF
1
VO=1.1V
15
5
Port H
Port H
VI=3.6V
VI=0.2V
VO=3.6V
0.7 Vcc(H)
5
-0.5
0.3 Vcc(H)
1
1
120
5
V
V
uA
uA
uA
pF
Enable
VIH
Low-level input voltage
VIL
High-level input voltage
IIH
Low-level input current
IIL
Input leakage current
Ci
Input capacitance
*1 Typical values with Vcc(A)=1.1V, Vcc(B)=3.3V
0.7 Vcc(L)
Vcc(H)
0.3 Vcc(L)
-0.5
1
1
VI=3.6V or 0V
4
V
V
uA
uA
pF
Dynamic Characteristics
Symbol
Parameter
Conditions
Vcc(A) = 1.1V ; Vcc(B) = 3.3V
tPLH
Low to High propagation delay
Port H to port L
tPHL
High to Low propagation delay
Port H to port L
tTLH
Low to High output transition time Port L
Min
Typ
Max
Unit
*1
*1
*1
1.2
4.9
2.3
ns
ns
ns
tTHL
High to Low output transition time Port L
*1
1.5
ns
tPLH
tPLH2
Low to High propagation delay
Low to High propagation delay 2
*1
*1
4.8
ns
ns
*1
*1*2
*1
3.8
2.4
3.9
ns
2.7
ns
2.7
ns
*1
*1
*1
1
4.4
2
ns
ns
ns
tPHL
tTLH
tTHL
Port L to port H
Port L to port H; measured
from the 50% of initial
Low on port L to 1.5V
rising on port H
High to Low propagation delay
Port L to port H
Low to High propagation delay
Port H
High to Low output transition time Port H
tsu
Set-up time
th
Hold time
EN High before Start
condition
En High after Stop
condition
Vcc(A) = 1.9V ; Vcc(B) = 5.0V
tPLH
Low to High propagation delay
Port H to port L
tPHL
High to Low propagation delay
Port H to port L
tTLH
Low to High output transition time Port L
ns
tTHL
High to Low output transition time Port L
*1
2
ns
tPLH
Low to High propagation delay
*1
2.5
ns
Port L to port H
4
Dec, 2011
V0.12P
F75909
tPLH2
Low to High propagation delay 2
tPHL
tTLH
tTHL
Port L to port H; measured
from the 50% of initial
Low on port L to 1.5V
rising on port H
High to Low propagation delay
Port L to port H
Low to High propagation delay
Port H
High to Low output transition time Port H
tsu
Set-up time
*1
*1
*1*2
*1
ns
1.8
2.5
2.7
EN High before Start
condition
th
Hold time
En High after Stop
condition
*1 Load capacitance = 50 pF; load resistance on port B =1.35 kΩ.
*2 Value is determined by RC time constant of bus line.
8
ns
ns
ns
Ordering Information
Part Number
F75909M
9
ns
Package Type
MSOP-8
Production Flow
Commercial, 0C to +70C
Top Marking Specification
The version identification is shown as the bold red characters. Please refer to below for detail:
MSOP-8
st
909MX
XXXXX
1 Line: Device Name + IC Version (X)
nd
2 Line: Assembly Code (X)+Date code(XXX)+Trace Code(X)
: Pin 1 Identifier
5
Dec, 2011
V0.12P
F75909
10 Package Spec.
MSOP-8 Package
6
Dec, 2011
V0.12P
F75909
11 Application Circuit
7
Dec 2011
V0.12P
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