LTC3545/LTC3545-1 Triple 800mA Synchronous Step-Down Regulator–2.25MHz FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTION Three 800mA Outputs High Efficiency: Up to 95% 2.25V to 5.5V Input Voltage Range Low Ripple (<20mVP-P) Burst Mode® Operation IQ: 58μA 2.25MHz Constant Frequency Operation or Synchronizable to External 1MHz to 3MHz Clock Power Good Indicators Ease Supply Sequencing 0.6V Reference Allows Low Output Voltages Current Mode Operation/Excellent Transient Response Low Profile 16-Lead 3mm × 3mm QFN Package APPLICATIONS ■ ■ ■ ■ ■ The LTC ®3545/LTC3545-1 are triple, high efficiency, monolithic synchronous buck regulators using a constant frequency, current mode architecture. The regulators operate independently with separate run pins. The 2.25V to 5.5V input voltage range makes the LTC3545/LTC3545-1 well suited for single Li-Ion battery-powered applications. Low ripple pulse skip mode or high efficiency Burst Mode operation is externally selectable. PWM pulse skip mode operation provides very low output ripple voltage while Burst Mode operation increases efficiency at low output loads. Switching frequency is internally set to 2.25MHz, or the switching frequency can be synchronized to an external 1MHz to 3MHz clock. Power good indicators easily allow power on sequencing between the three regulators. Smart Phones Wireless and DSL Modems Digital Still Cameras Portable Instruments Point of Load Regulation L, LT, LTC, LTM and Burst Mode are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 6580258, 5481178, 6127815, 6498466, 6611131. The internal synchronous switches increase efficiency and eliminate external Schottky diodes. Low output voltages are supported with the 0.6V feedback reference voltage. The LTC3545-1 replaces the SYNC/MODE function with a third PGOOD pin and forces Burst Mode operation. TYPICAL APPLICATION High Efficiency Triple Step-Down Converter with Power Sequencing Efficiency and Loss vs Load Current VIN 2.25V TO 5.5V GNDA R8 500k 100 C5 10μF PGND R7 500k VIN PVIN SW2 C7 20pF PGOOD1 RUN2 RUN3 VOUT1 1.8V R4 226k C1 10μF R1 511k LTC3545 R2 255k L3 1.5μH SW1 SW3 VFB1 VFB3 GNDA R3 226k C2 10μF 0.1 70 60 50 0.01 40 30 0.001 20 SYNC/MODE C6 20pF VOUT2 1.2V VFB2 PGOOD2 L1 1.5μH 80 L2 1.5μH PGND C8 20pF R6 200k VIN = 2.5V VIN = 3.6V VIN = 4.2V 10 VOUT3 1.5V C3 10μF R5 301k 3545 TA01 LOSS (W) RUN1 1 90 EFFICIENCY (%) C4 10μF 0 0.0001 0.01 0.1 0.001 LOAD CURRENT (A) TA = 25°C VOUT = 2V Burst Mode OPERATION fOSC = 2.25MHz SINGLE CHANNEL 0.0001 1 3545 TA01b 35451fb 1 LTC3545/LTC3545-1 ABSOLUTE MAXIMUM RATINGS (Note 1) Input Supply Voltage .................................... –0.3V to 6V RUNx, PGOODx............................. –0.3V to (VIN + 0.3V) VFBx, SYNC/MODE ........................ –0.3V to (VIN + 0.3V) SWx .............................................. –0.3V to (VIN + 0.3V) P-Switch Source Current (DC) (Note 8) ...................1.1A N-Channel Sink Current (DC) (Note 8) .....................1.1A Peak SW Sink and Source Current (Note 8) .............1.3A Operating Junction Temperature Range (Note 2) ............................................. –40°C to 125°C Storage Temperature Range................... –65°C to 125°C PIN CONFIGURATION LTC3545 LTC3545-1 12 VFB2 SW1 1 PGOOD1 2 11 VFB3 PGOOD1 2 10 RUN3 7 8 SW2 PVIN SW3 10 RUN3 PGOOD2 4 UD PACKAGE 16-LEAD (3mm s 3mm) PLASTIC QFN 9 5 6 7 8 SW3 6 SYNC/MODE PVIN 5 PGND 9 11 VFB3 17 RUN2 3 SW2 PGOOD2 4 12 VFB2 PGND 17 VFB1 16 15 14 13 SW1 1 RUN2 3 VIN GNDA VFB1 RUN1 VIN GNDA 16 15 14 13 RUN1 TOP VIEW TOP VIEW PGOOD3 UD PACKAGE 16-LEAD (3mm s 3mm) PLASTIC QFN TJMAX = 125°C, θJA = 55°C/W EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB TJMAX = 125°C, θJA = 55°C/W EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3545EUD#PBF LTC3545EUD#TRPBF LCSR 16-Lead (3mm × 3mm) Plastic QFN –40°C to 125°C LTC3545IUD#PBF LTC3545IUD#TRPBF LCSR 16-Lead (3mm × 3mm) Plastic QFN –40°C to 125°C LTC3545EUD-1#PBF LTC3545EUD-1#TRPBF LDDP 16-Lead (3mm × 3mm) Plastic QFN –40°C to 125°C LTC3545IUD-1#PBF LTC3545IUD-1#TRPBF LDDP 16-Lead (3mm × 3mm) Plastic QFN –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = PVIN = 3.6V unless otherwise noted. (Note 2) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS General Characteristics VIN Input Voltage Range VFBx Regulated Feedback Voltage (Note 5) ΔVFBx Reference Voltage Line Regulation (Note 5) ● 2.25 TA = 25°C 0°C ≤ TA ≤ 85°C LTC3545IUD; –40°C < TA < 125°C ● ● 0.592 0.588 0.588 VIN = 2.25V to 5.5V ● 5.5 V 0.6 0.6 0.6 0.608 0.612 0.612 V V V 0.08 0.15 %/V 35451fb 2 LTC3545/LTC3545-1 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = PVIN = 3.6V unless otherwise noted. (Note 3) SYMBOL PARAMETER VLOADREG Output Voltage Load Regulation (Notes 5, 6) IFBx Feedback Pin Leakage (Note 5) IS Input DC Bias Current (All Regulators Enabled) Pulse Skip (Active Mode) Burst Mode Operation (All Regulators Sleeping) Shutdown (RUNX = 0V) CONDITIONS MIN ILOAD = 0A, 2.25MHz VFBx = 0.5V VFBx = 0.7V 1.8 ● 1 RUNx Input High Voltage ● 1 RUNx Input Low Voltage ● Oscillator Frequency fSYNC Synchronization Frequency VRUN(HIGH) VRUN(LOW) IRUNx RUN Leakage Current ILSWx SWx Leakage ISYNC MAX 0.5 ● fOSC TYP LTC3545 Only UNITS % 80 nA 680 58 0.1 750 70 2.0 μA μA μA 2.25 2.7 MHz 3 MHz V 0.3 V ±0.1 ±1 μA VRUNx = 0V, VSWx = 0V or 5.5V, VIN = 5.5V ±0.1 ±1 μA SYNC Leakage VRUN = 0V, VSYNC = 0V or 5.5V, VIN = 5.5V ±0.1 ±1 μA TPGOODx Power Good Threshold–Deviation From VFB Steady State (0.6V) VFBx Ramping Up VFBx Ramping Down –7.5 –10 RPGOODx Power Good Pull-Down On-Resistance IPGD = 50mA ● 14 MODE/SYNC Thresholds % % 50 0.93 Ω V Individual Regulator Characteristics (One Regulator Enabled) tSS Soft-Start Period VFBx = 10% to 90% Fullscale IPK Peak Switch Current Limit IQ Input DC Bias Current Pulse Skip (Active Mode) Burst Mode Operation (Sleeping) ILOAD = 0A, 2.25MHz VFBx = 0.5V VFBx = 0.7V 310 31 μA μA RPFET RDS(ON) of P-Channel FET (Note 7) ISWx = 100mA 0.35 Ω RNFET RDS(ON) of N-Channel FET (Note 7) ISWx = –100mA VUVLO Undervoltage Lockout (High VCC to Low) 1 Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3545E/LTC3545E-1 are guaranteed to meet performance specifications from 0°C to 85°C. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LTC3545I/LTC3545I-1 are guaranteed to meet performance specifications over the full –40°C to 125°C operating junction temperature range. Note 3: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formula: TJ = TA + (PD)(68°C/W) This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature 850 1100 μs 1.3 1.6 A Ω 0.35 ● 1.8 2.25 V will exceed 125°C when overtemperature is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. Note 4: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125°C when overtemperature is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. Note 5: The LTC3545/LTC3545-1 are tested in a proprietary test mode that connects VFB to the output of the error amplifier. Note 6: Load regulation is inferred by measuring the regulation loop gain. Note 7: The QFN switch-on resistance is guaranteed by correlation to water level measurements. Note 8: Guaranteed by long-term current density limitations. 35451fb 3 LTC3545/LTC3545-1 TYPICAL PERFORMANCE CHARACTERISTICS VREF vs Temperature at 2.25V, 3.6V, 5.5V Switching Frequency vs Supply Voltage and Temperature 1.2 TA = 25°C VIN = 3.6V UNTESTED CHANNELS OFF PULSE SKIP MODE 0.600 0.595 0.590 0.585 –50 2.25V 3.6V 5.5V 0 50 100 TEMPERATURE (°C) 0.8 2.5 VOUT ERROR (%) 0.605 SWITCHING FREQUENCY (MHz) 1.0 0.610 VREF (V) Load Regulation, All Channels 3.0 0.615 2.0 2 3 4 5 SUPPLY VOLTAGE (V) 0.4 0.2 0 fOSC = –40°C fOSC = 0°C fOSC = 25°C fOSC = 80°C 1.5 150 CHANNEL 1 CHANNEL 2 CHANNEL 3 0.6 –0.2 –0.4 6 200 400 600 LOAD CURRENT (mA) 0 800 3545 G01 3545 G02 Supply Current vs Temperature Burst Mode Operation Efficiency vs Supply Voltage 100 SW 2V/DIV EFFICIENCY (%) 95 VOUT 20mV/DIV IL 100mA/DIV 60 VOUT = 2V TA = 25°C CHANNEL 3, ALL OTHERS OFF fOSC = 2.25MHz ILOAD = 250mA 50 SUPPLY CURRENT (μA) Burst Mode Operation 90 85 VIN = 3.6V VOUT = 1.8V ILOAD = 50mA fOSC = 2.25MHz 1μs/DIV 3545 G03 40 30 20 10 3545 G04 80 2 3 4 5 6 SUPPLY VOLTAGE (V) 0 VFB3 = 0.625V ILOAD = 0mA CHANNEL 3 ONLY –50 0 VIN = 5.5V VIN = 4.5V VIN = 3.5V VIN = 2.5V 50 100 TEMPERATURE (°C) 150 3545 G06 3545 G05 35451fb 4 LTC3545/LTC3545-1 TYPICAL PERFORMANCE CHARACTERISTICS Supply Current vs Temperature, Pulse Skipping Efficiency vs Load Current, Burst Mode Operation 350 EFFICIENCY (%) SUPPLY CURRENT (μA) 400 300 250 200 100 100 90 90 80 80 70 70 60 50 VIN = 2.7V VIN = 3.6V VIN = 4.2V 40 30 VFB3 = 0.625V ILOAD = 0mA CHANNEL 3 ONLY 150 –50 0 VIN = 5.5V VIN = 4.5V VIN = 3.5V VIN = 2.5V 50 100 TEMPERATURE (°C) 150 EFFICIENCY (%) 450 Efficiency vs Load Current, Pulse Skipping Operation 20 10 1 10 100 LOAD CURRENT (mA) 50 VIN = 2.7V VIN = 3.6V VIN = 4.2V 40 30 TA = 25°C VOUT = 1.8V CHANNEL 3, OTHER CHANNELS OFF fOSC = 2.25MHz 0 0.1 60 20 10 1000 0 0.1 TA = 25°C VOUT = 1.8V CHANNEL 3, OTHER CHANNELS OFF fOSC = 2.25MHz 1 10 100 LOAD CURRENT (mA) 1000 3545 G07 3545 G08 Channel 1 Load Step Response 3545 G09 Channel 2 Load Step Response Channel 3 Load Step Response VOUT1 100mV/DIV VOUT2 100mV/DIV VOUT3 100mV/DIV IL 500mA/DIV IL 500mA/DIV IL 500mA/DIV ILOAD 500mA/DIV ILOAD 500mA/DIV ILOAD 500mA/DIV TA = 25°C 10μs/DIV VIN = 3.6V VOUT = 1.2V LOAD STEP 0mA TO 600mA Burst Mode OPERATION 3545 G10 TA = 25°C 10μs/DIV VIN = 3.6V VOUT = 1.5V LOAD STEP 0mA TO 600mA Burst Mode OPERATION 3545 G11 10μs/DIV TA = 25°C VIN = 3.6V VOUT = 1.8V LOAD STEP 0mA TO 600mA Burst Mode OPERATION 3545 G12 35451fb 5 LTC3545/LTC3545-1 TYPICAL PERFORMANCE CHARACTERISTICS Start-Up From Shutdown No Load Start-Up From Shutdown Loaded Load Step Crosstalk VOUT2 2mV/DIV VOUT1 VOUT1 1V/DIV VOUT2 1V/DIV VOUT3 1V/DIV VOUT2 VOUT3 (ALL 1V/DIV) RUNX 5V/DIV VOUT3 2mV/DIV VOUT1 100mV/DIV ILOAD CH1 50mA/DIV ISUPPLY 50mA/DIV ISUPPLY 1A/DIV TA = 25°C 200μs/DIV VIN = 3.6V ILOAD = 600mA, ALL CHANNELS 3545 G13 3545 G14 200μs/DIV TA = 25°C VIN = 3.6V ILOAD = 0, ALL CHANNELS PFET RDS(ON) vs Supply Voltage 3545 G15 TA = 25°C 200μs/DIV VIN = 3.6V 500mA LOAD STEP IN CHANNEL1 CHANNELS 2 AND 3 LOADED AT 400mA EACH PFET RDS(ON) vs Temperature 0.50 0.60 0.45 0.50 0.40 0.35 RDS(ON) (Ω) RDS(ON) (Ω) 0.40 0.30 0.20 0 2 0.25 0.20 0.15 TA = 125°C TA = 80°C TA = 25°C TA = 0°C TA = –40°C 0.10 0.30 0.10 VIN = 2.5V VIN = 3.5V VIN = 5.5V 0.05 0 –40 6 4 3 5 SUPPLY VOLTAGE (V) 10 60 TEMPERATURE (°C) 110 3545 G16 3545 G17 NFET RDS(ON) vs Temperature NFET RDS(ON) vs Supply Voltage 0.50 0.60 0.45 0.50 0.40 0.35 RDS(ON) (Ω) RDS(ON) (Ω) 0.40 0.30 0.20 0 2 4 3 5 SUPPLY VOLTAGE (V) 0.25 0.20 0.15 TA = 125°C TA = 80°C TA = 25°C TA = 0°C TA = –40°C 0.10 0.30 0.10 VIN = 2.5V VIN = 3.5V VIN = 5.5V 0.05 6 3545 G18 0 –40 10 60 TEMPERATURE (°C) 110 3545 G19 35451fb 6 LTC3545/LTC3545-1 PIN FUNCTIONS SW1 (Pin 1): Switch Node Connection to Inductor for Regulator 1. This pin connects to the internal power MOSFET switches. external clock, the part operates in pulse skipping mode with a switching frequency equal to the external clock. PGOOD1 (Pin 2): This open-drain output voltage is pulled to a logic low when VFB1 is below 0.54V (VOUT1 is below 90% of regulated level). PGOOD3 (Pin 9, LTC3545-1 Only): This open-drain output voltage is pulled to a logic low when VFB3 is below 0.54V (VOUT3 is below 90% of regulated level). The LTC3545-1 operates in Burst Mode operation only. RUN2 (Pin 3): Regulator 2 Enable Pin. Apply a voltage greater than VRUN(HIGH) to enable this regulator. RUN3 (Pin 10): Regulator 3 Enable Pin. Apply a voltage greater than VRUN(HIGH) to enable this regulator. PGOOD2 (Pin 4): This open-drain output voltage is pulled to a logic low when VFB2 is below 0.54V (VOUT2 is below 90% of regulated level). VFB3 (Pin 11): Regulator 3 Feedback Pin. This pin receives the feedback voltage from an external resistive divider across the output. SW2 (Pin 5): Switch Node Connection to Inductor for Regulator 2. This pin connects to the internal power MOSFET switches. VFB2 (Pin 12): Regulator 2 Feedback Pin. This pin receives the feedback voltage from an external resistive divider across the output. PGND (Pin 6): Regulators 2 and 3 Power Path Return. VFB1 (Pin 13): Regulator 1 Feedback Pin. This pin receives the feedback voltage from an external resistive divider across the output. PVIN (Pin 7): Power Path Supply Pin for Regulators 2 and 3. This pin must be closely decoupled to PGND, with a 4.7μF or greater ceramic capacitor. SW3 (Pin 8): Switch Node Connection to Inductor for Regulator 3. This pin connects to the internal power MOSFET switches. SYNC/MODE (Pin 9, LTC3545 Only): Mode Select and External Clock Input. When pulled low, part operates in Burst Mode operation. When pulled high, part operates in pulse skipping mode. When driven by a 1MHz to 3MHz RUN1 (Pin 14): Regulator 1 Enable Pin. Apply a voltage greater than VRUN(HIGH) to enable this regulator. VIN (Pin 15): Supply Pin for Internal Reference and Control Circuitry. Power path supply for regulator 1. GNDA (Pin 16): Ground Pin for Internal Reference and Control Circuitry. Power path return for regulator 1. Exposed Pad (Pin 17): GND. Must be soldered to the PCB. 35451fb 7 LTC3545/LTC3545-1 FUNCTIONAL DIAGRAMS RUN3 RUN2 GNDA VIN SYNC/MODE (LTC3545 ONLY) RUN1 SHDN 0.6V REF OSC RUN LOGIC PGOOD3 (LTC3545-1 ONLY) PGOOD1 IBIAS3 SW3 IBIAS100 POWER POWER VFB3 SW1 VFB1 REG3 REG1 PGOOD2 IBIAS2 SW2 POWER VFB2 REG2 PVIN PGND 3545 FD01 35451fb 8 LTC3545/LTC3545-1 FUNCTIONAL DIAGRAMS PGOOD REGULATOR BURST CLAMP + PVIN 0.6V SLOPE COMP – + 50mV – – EA 0.6V SLEEP ITH VSLEEP + – + 10Ω ICOMP + BURST S Q RS LATCH SOFT-START R Q SWITCHING LOGIC AND BLANKING CIRCUIT ANTI SHOOTTHRU SWX + IRCMP PGND – VFBX SHUTDOWN 3545 FD02 0.6V VREF OSC OSC 35451fb 9 LTC3545/LTC3545-1 OPERATION MAIN CONTROL LOOP PULSE SKIPPING/Burst Mode OPERATION The LTC3545/LTC3545-1 use a constant frequency, current mode step-down architecture. Both the main (P-channel MOSFET) and synchronous (N-channel MOSFET) switches are internal. During normal operation, the internal top power MOSFET is turned on each cycle when the oscillator sets the RS latch, and turned off when the current comparator, ICOMP , resets the RS latch. The peak inductor current at which ICOMP resets the RS latch, is controlled by the output of error amplifier EA. When the load current increases, it causes a slight decrease in the feedback voltage FB relative to the 0.6V reference, which in turn, causes the EA amplifier’s output voltage to increase until the average inductor current matches the new load current. While the top MOSFET is off, the bottom MOSFET is turned on until either the inductor current starts to reverse, as indicated by the current reversal comparator, IRCMP , or the beginning of the next clock cycle. At light loads, the inductor current may reach zero or reverse on each pulse. The bottom MOSFET is turned off by the current reversal comparator, IRCMP , and the switch voltage will ring. This is discontinuous mode operation, and is normal behavior for the switching regulator. At very light loads, the LTC3545/LTC3545-1 will automatically begin operating in either pulse skipping or Burst Mode operation depending on the state of the MODE/SYNC pin (LTC3545). In either case the part will begin to skip cycles in order to maintain regulation. In pulse skip mode, the current pulses are smaller and more frequent, giving lower output ripple. In this mode, internal circuitry remains on and the pulses occur more frequently resulting in lower efficiency than in Burst Mode operation at light loads. In Burst Mode operation, the part supplies fewer, larger current pulses, resulting in higher output ripple, but much higher light load efficiency than pulse skip mode. Efficiency is also improved by turning off much of the internal circuitry during the dead time between pulses. 35451fb 10 LTC3545/LTC3545-1 OPERATION SOFT-START Soft-start reduces surge currents on VIN and output overshoot during start-up. Soft-start on the LTC3545/ LTC3545-1 is implemented by internally ramping the reference signal fed to the error amplifier over approximately a 1ms period. Figure 1 shows the behavior of the regulator channels during start-up. Short-Circuit Protection Short-circuit protection is achieved by monitoring the inductor current. When the current exceeds a predetermined level, the main switch is turned off, and the synchronous switch is turned on long enough to allow the current in the inductor to decay below the fault threshold. This prevents a catastrophic inductor current run-away condition, but will still provide current to the output. Output voltage regulation in this condition is not achieved. forces the main switch to remain on for more than one cycle until it reaches 100% duty cycle. The output voltage will then be determined by the input voltage minus the voltage drop across the P-channel MOSFET and the inductor. An important detail to remember is that at low input supply voltages, the RDS(ON) of the P-channel switch increases (see Typical Performance Characteristics). Therefore, the user should calculate the power dissipation when the LTC3545/LTC3545-1 is used at 100% duty cycle with low input voltage (See Thermal Considerations in the Applications Information section). VOUT1 VOUT2 VOUT3 (ALL 1V/DIV) RUNX 2V/DIV DROPOUT OPERATION As the input supply voltage decreases to a value approaching the output voltage, the duty cycle increases toward the maximum on-time. Further reduction of the supply voltage 200μs/DIV TA = 25°C VIN = 3.6V ILOAD = 0mA, ALL CHANNELS 3545 F01 Figure 1. Start-Up from Shutdown, No Load 35451fb 11 LTC3545/LTC3545-1 APPLICATIONS INFORMATION The basic LTC3545/LTC3545-1 application circuit is shown on the first page of this data sheet. External component selection is driven by the load requirement and begins with the selection of L followed by CIN and COUT. Inductor Selection For most applications, the value of the inductor will fall in the range of 1μH to 10μH. Its value is chosen based on the desired ripple current. Large inductor values lower ripple current and small inductor values result in higher ripple currents. Higher VIN or VOUT also increases the ripple current as shown in Equation 1. A reasonable starting point for setting ripple current for an 800mA regulator is ΔIL = 320mA (40% of 800mA). ⎛ V ⎞ ΔIL = VOUT ⎜ 1 – OUT ⎟ VIN ⎠ ( ƒ )(L ) ⎝ 1 Table 1. Representative Surface Mount Inductors PART NUMBER VALUE (μH) DCR (Ω MAX) MAX DC CURRENT (A) Wurth WETPC 744031 1.5 2.5 3.6 0.035 0.045 0.065 1.75 1.45 1.38 3.8 × 3.8 × 1.65 CoilCraft LPS4012 1 1.5 2.2 3.3 0.06 0.07 0.1 0.1 2.5 2.5 2.1 1.5 4.0 × 4.0 × 1.1 Sumida CDH38D11/ SLD 1.4 2.4 3.6 0.055 0.094 0.13 1.8 1.3 1.1 4.0 × 4.0 × 1.2 Sumida CDRH3D16 1.5 2.2 3.3 0.043 0.075 0.11 1.55 1.2 1.1 3.8 × 3.8 × 1.8 W × L × H (mm3) CIN and COUT Selection (1) The DC current rating of the inductor should be at least equal to the maximum load current plus half the ripple current to prevent core saturation. Thus, a 960mA rated inductor should be enough for most applications (800mA + 160mA). For better efficiency, choose a low DCR inductor. Inductor Core Selection Different core materials and shapes will change the size/current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials are small and don’t radiate much energy, but generally cost more than powdered iron core inductors with similar electrical characteristics. The choice of which style inductor to use often depends more on the price vs size requirements and any radiated field/EMI requirements than on what the LTC3545/LTC3545-1 require to operate. Table 1 shows typical surface mount inductors that work well in LTC3545/LTC3545-1 applications. In continuous mode, a worst-case estimate for the input current ripple can be determined by assuming that the source current of the top MOSFET is a square wave of duty cycle VOUT/VIN, and amplitude IOUT(MAX). To prevent large voltage transients, a low ESR input capacitor sized for the maximum RMS current must be used. The maximum RMS capacitor current is given by: IRMS ≅ IOUT(MAX ) VOUT ( VIN – VOUT ) VIN This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT/2. This simple worst-case condition is commonly used for design. Note that the capacitor manufacturer’s ripple current ratings are often based on 2000 hours of life (non-ceramic capacitors). This makes it advisable to further de-rate the capacitor, or choose a capacitor rated at a higher temperature than required. Always consult the manufacturer if there is any question. 35451fb 12 LTC3545/LTC3545-1 APPLICATIONS INFORMATION The selection of COUT is driven by the required effective series resistance (ESR). Typically, once the ESR requirement for COUT has been met, the RMS current rating generally far exceeds the IRIPPLE(P-P) requirement. The output ripple ΔVOUT is determined by: ⎛ ⎞ 1 ΔVOUT ≅ ΔIL ⎜ ESR + 8 • ƒ • COUT ⎟⎠ ⎝ where f = operating frequency, COUT = output capacitance and ΔIL = ripple current in the inductor. For a fixed output voltage, the output ripple is highest at maximum input voltage since ΔIL increases with input voltage. Using Ceramic Input and Output Capacitors Higher value, lower cost, ceramic capacitors are now widely available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator applications. Because the LTC3545/LTC3545-1’s control loop does not depend on the output capacitor’s ESR for stable operation, ceramic capacitors can be used freely to achieve very low output ripple and small circuit size. However, care must be taken when ceramic capacitors are used at the input and the output. When a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, VIN. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN, large enough to damage the part. When choosing the input and output ceramic capacitors, choose the X5R or X7R dielectric formulations. These dielectrics have the best temperature and voltage characteristics of all the ceramics for a given value and size. Output Voltage Programming The output voltage is set by tying VFB to a resistive divider according to the following formula: ⎛ R2 ⎞ VOUT = 0.6 V ⎜ 1+ ⎟ ⎝ R1⎠ The external resistive divider is connected to the output allowing remote voltage sensing as shown in Figure 2. 0.6V ≤ VOUT ≤ 5.5V R2 VFB LTC3545 R1 GND 3545 F02 Figure 2. Setting the LTC3545 Output Voltage Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Efficiency can be expressed as: Efficiency = 100% – (L1 + L2 + L3 + ...) where L1, L2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, two main sources usually account for most of the losses in LTC3545/LTC3545-1 circuits: VIN quiescent current and I2R losses. VIN quiescent current loss dominates the efficiency loss at low load currents, whereas the I2R loss dominates the efficiency loss at medium to high load currents. In a typical efficiency plot, the efficiency curve at very low load currents can be misleading since the actual power lost is of little consequence as illustrated on the front page of the data sheet. 35451fb 13 LTC3545/LTC3545-1 APPLICATIONS INFORMATION 1. The quiescent current is due to two components: the DC bias current as given in the electrical characteristics and the internal main switch and synchronous switch gate charge currents. The gate charge current results from switching the gate capacitance of the internal power MOSFET switches. Each time the gate is switched from high to low to high again, a packet of charge, dQ, moves from PVIN to ground. The resulting dQ/dt is the current out of PVIN that is typically larger than the DC bias current and proportional to frequency. Both the DC bias and gate charge losses are proportional to PVIN and thus their effects will be more pronounced at higher supply voltages. junction temperature of the part if it is not well thermally grounded. If the junction temperature reaches approximately 150°C, the power switches will be turned off and the SW nodes will become high impedance. 2. I2R losses are calculated from the resistances of the internal switches, RSW, and external inductor RL. In continuous mode, the average output current flowing through inductor L is “chopped” between the main switch and the synchronous switch. Thus, the series resistance looking into the SW pin is a function of both top and bottom MOSFET RDS(ON) and the duty cycle (DC) as follows: where PD is the power dissipated by the regulator and θJA is the thermal resistance from the junction of the die to the ambient temperature. RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC) The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Characteristics curves. Thus, to obtain I2R losses, simply add RSW to RL and multiply the result by the square of the average output current. Other losses when in switching operation, including CIN and COUT ESR dissipative losses and inductor core losses, generally account for less than 2% total additional loss. Thermal Considerations The LTC3545/LTC3545-1 requires the package backplane metal to be well soldered to the PC board. This gives the QFN package exceptional thermal properties, making it difficult in normal operation to exceed the maximum junction temperature of the part. In most applications the LTC3545/LTC3545-1 do not dissipate much heat due to their high efficiency. In applications where the LTC3545/ LTC3545-1 are running at high ambient temperature with low supply voltage and high duty cycles, such as in dropout, the heat dissipated may exceed the maximum To prevent the LTC3545/LTC3545-1 from exceeding the maximum junction temperature, the user will need to do some thermal analysis. The goal of the thermal analysis is to determine whether the power dissipated exceeds the maximum junction temperature of the part. The temperature rise is given by: TR = PD • θJA The junction temperature, TJ, is given by: TJ = TA + TR where TA is the ambient temperature. As an example, consider one channel of the LTC3545/ LTC3545-1 in dropout at an input voltage of 2.5V, a load current of 800mA, and an ambient temperature of 85°C. From the typical performance graph of switch resistance, the RDS(ON) of the P-channel switch at 85°C can be estimated as 0.42Ω. Therefore, power dissipated by the channel is: PD = ILOAD2 • RDS(ON) = 0.27W The θJA for the 3mm × 3mm QFN package is 68°C/W. The temperature rise due to this power dissipation is: TR = θJA • PD = 18°C And a junction temperature of: TJ = 85°C + 18°C = 103°C which is below the maximum junction temperature of 125°C. This would not be the case if all three channels were operating at 800mA in dropout. Then TR = 55°C, limiting the allowed ambient temperature in this scenario to less than 70°C. 35451fb 14 LTC3545/LTC3545-1 APPLICATIONS INFORMATION Similar situations can occur when all three channels are operating at maximum loads at high ambient temperature. As an example, consider a channel supplying 800mA at 1.8V output and 85% efficiency. The dissipated power can be calculated using ⎛ 1– E ⎞ Loss = PO ⎜ = 1.4W • 0.17 = 0.25W ⎝ E ⎟⎠ where PO is the output power and E is the efficiency. In this case the temperature rise is 17°C, similar to the dropout scenario described above. Whereas one channel operating at these levels will safely fall within the temperature limitations of the part, three channels operating simultaneously at these levels will place limits on the peak ambient temperature. Note that at higher supply voltages, the junction temperature is lower due to reduced switch resistance RDS(ON). Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to (ΔILOAD • ESR), where ESR is the effective series resistance of COUT. ΔILOAD also begins to charge or discharge COUT, which generates a feedback error signal. The regulator loop then acts to return VOUT to its steady-state value. During this recovery time VOUT can be monitored for overshoot or ringing that would indicate a stability problem. For a detailed explanation of switching control loop theory, see Application Note 76. A second, more severe transient is caused by switching in loads with large (>1μF) supply bypass capacitors. The discharged bypass capacitors are effectively put in parallel with COUT, causing a rapid drop in VOUT. No regulator can deliver enough current to prevent this problem if the load switch resistance is low and it is driven quickly. The only solution is to limit the rise time of the switch drive so that the load rise time is limited to approximately (25 • CLOAD). Thus, a 10μF capacitor charging to 3.3V would require a 250μs rise time, limiting the charging current to about 130mA. Design Example As a design example, consider using the LTC3545/LTC35451 in a portable application with a Li-Ion battery. The battery provides VIN ranging from 2.8V to 4.2V. The demand on one channel at 2.5V is 600mA. Using this channel as an example, first calculate the inductor value for 40% ripple current (240mA in this example) at maximum VIN. Using a form of Equation 1: L1= 2.5V ⎛ 2.5V ⎞ 1– = 1.41µH (2.25MHz )(240mA ) ⎜⎝ 3.6V ⎟⎠ Use the closest standard value of 1.5μH. For low ripple applications, 10μF is a good choice for the output capacitor. A smaller output capacitor will shorten transient response settling time, but also increase the load transient ripple. A value for C5 = 4.7μF should suffice as the source impedance of a Li-Ion battery is very low. C5 and C1 both provide switching current to the output power switches. They should be placed as close a possible to the chip between VIN/GNDA and PVIN/PGND respectively. PVIN and PGND are the supply and return power paths for both channels 2 and 3, so a value of 10μF for C1 is appropriate. The feedback resistors program the output voltage. Minimizing the current in these resistors will maximize efficiency at very light loads, but totals on the order of 200k are a good compromise between efficiency and immunity to any adverse effects of PCB parasitic capacitance on the feedback pins. Choosing 10μA as the feedback current with 0.6V feedback voltage makes R4 = 60k. A close standard 1% resistor is 60.4k. Using: ⎛ 2.5V ⎞ R3 = ⎜ – 1 • R4 = 191.1k ⎝ 0.6 V ⎟⎠ The closest standard 1% resistor is 191k. A 20pF feedforward capacitor is recommended to improve transient response. The component values for the other channels are chosen in a similar fashion. Figure 4 shows the complete schematic for this example, along with the efficiency curve and burst mode ripple at an output current for the 2.5V output. 35451fb 15 LTC3545/LTC3545-1 APPLICATIONS INFORMATION PC Board Layout Checklist When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3545/LTC3545-1. These items are also illustrated graphically in Figures 3 and 4. Figure 3 shows the power path components and traces. In this figure the feedback networks are not shown since they reside on the bottom side of the board. Check the following in your layout: 1. The power traces consisting of the PGND trace, the SW trace, the PVIN trace, the VIN and GNDA traces, should be kept short direct and wide. 2. Does each of the VFBx pins connect directly to the respective feedback resistors? The resistive dividers must be connected between the (+) plate of the cor- responding output filter capacitor (e.g. C2) and GNDA. If the circuit being powered is at such a distance from the part where voltage drops along circuit traces are large, consider a Kelvin connection from the powered circuit back to the resistive dividers. 3. Keep C1 and C5 as close to the part as possible. 4. Keep the switching nodes (SWx) away from the sensitive VFBx nodes. 5. Keep the ground connected plates of the input and output capacitors as close as possible. 6. Care should be taken to provide enough space between unshielded inductors in order to minimize any transformer coupling. VOUT3 (VIA TO FEEDBACK NETWORK) L3 C4 SW3 VIN C1 PVIN PGND C5 GNDA SW1 SW2 C3 C2 L1 L2 VOUT2 (VIA TO FEEDBACK NETWORK) 3545 F03 (VIA TO FEEDBACK NETWORK) VOUT1 Figure 3. Layout Diagram 35451fb 16 LTC3545/LTC3545-1 TYPICAL APPLICATIONS L1 1.5μH C6 20pF R2 511k E2 PGOOD2 C5 4.7μF R1 511k 1 2 E1 PGOOD1 3 4 5 6 7 VIN 2.7V TO 5.5V C1 10μF 10V 8 SW1 LTC3545 PGOOD1 GNDA VIN RUN2 RUN1 PGOOD2 VFB1 SW2 VFB2 PGND VFB3 PVIN RUN3 SW3 SYNC/MODE R3 191k E3 VOUT1 C2 10μF 6.3V 2.5V AT 0.8A E4 GND R4 60.4k 16 15 14 L2 1.5μH 13 12 C7 20pF 11 R5 100k 10 E7 VOUT2 C3 10μF 6.3V 1.2V AT 0.8A E6 GND R6 100k 9 GND L3 1.5μH 17 C8 20pF R7 165k E5 VOUT3 C4 10μF 6.3V 1.5V AT 0.8A E8 GND R8 110k 3545 TA02 Overall Efficiency vs Channel 1 Load Current Burst Mode Ripple 100 VOUT3 AC COUPLED 20mV/DIV OVERALL EFFICIENCY (%) 90 80 70 IL3 250mA/DIV 60 50 40 30 20 10 0 0.1 SW3 2V/DIV TA = 25°C VIN = 3.6V VOUT = 2.5V fOSC = 2.25MHz CHANNEL 2 = 1.2V, ILOAD = 400mA CHANNEL 3 = 1.5V, ILOAD = 400mA 1 10 100 CHANNEL 1 LOAD CURRENT (mA) 1000 TA = 25°C VIN = 3.6V VOUT = 1.5V ILOAD = 50mA fOSC = 2.25MHz 1μs/DIV 3545 TA04 3545 TA03 Figure 4. LTC3545 Low Ripple Burst Mode Operation 35451fb 17 LTC3545/LTC3545-1 TYPICAL APPLICATIONS L1 1.5μH C6 20pF R9 511k E9 PGOOD3 E2 PGOOD2 R2 511k R1 511k 1 2 E1 PGOOD1 3 4 5 6 VIN 2.5V TO 5.5V 7 C1 4.7μF 8 SW1 LTC3545-1 GNDA PGOOD1 VIN RUN1 RUN2 PGOOD2 VFB1 SW2 VFB2 PGND VFB3 PVIN RUN3 SW3 PGOOD3 C2 10μF E3 VOUT1 1.2V AT 0.8A E4 GND R4 100k C5 10μF 16 R3 100k 15 14 L2 1.5μH 13 12 C7 20pF 11 R5 165k C3 10μF 10 R6 110k 9 E7 VOUT2 1.5V AT 0.8A E6 GND GND L3 1.5μH 17 C8 20pF R7 133k C4 10μF E5 VOUT3 1.8V AT 0.8A E8 GND R8 66.5k 3545 TA05 3-Channel Power Sequencing RUN1 VOUT1 VOUT2 VOUT3 PGOOD3 TA = 25°C VIN = 3.6V 400μs/DIV 3545 TA06 Figure 5. LTC3545-1 Three PGOODs and Power Sequencing 35451fb 18 LTC3545/LTC3545-1 PACKAGE DESCRIPTION UD Package 16-Lead Plastic QFN (3mm s 3mm) (Reference LTC DWG # 05-08-1700 Rev A) Exposed Pad Variation AA 0.70 p0.05 3.50 p 0.05 1.65 p 0.05 2.10 p 0.05 (4 SIDES) PACKAGE OUTLINE 0.25 p0.05 0.50 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 3.00 p 0.10 (4 SIDES) BOTTOM VIEW—EXPOSED PAD PIN 1 NOTCH R = 0.20 TYP OR 0.25 s 45o CHAMFER R = 0.115 TYP 0.75 p 0.05 15 16 PIN 1 TOP MARK (NOTE 6) 0.40 p 0.10 1 1.65 p 0.10 (4-SIDES) 2 (UD16 VAR A) QFN 1207 REV A 0.200 REF 0.00 – 0.05 NOTE: 1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-4) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 0.25 p 0.05 0.50 BSC 35451fb Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LTC3545/LTC3545-1 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC3405/LTC3405A 300mA IOUT, 1.5MHz, Synchronous Step-Down DC/DC Converters 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 20μA, ISD < 1μA, ThinSOT™ Package LTC3406/LTC3406B 600mA IOUT, 1.5MHz, Synchronous Step-Down DC/DC Converters 96% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 20μA, ISD < 1μA, ThinSOT Package LTC3407/LTC3407-2 Dual 600mA/800mA IOUT, 1.5MHz/2.25MHz, Synchronous Step-Down DC/DC Converters 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 40μA, ISD < 1μA, 10-Lead MSE, DFN Packages LTC3409 600mA IOUT, 1.7MHz/2.6MHz, Synchronous Step-Down DC/DC Converter 96% Efficiency, VIN: 1.6V to 5.5V, VOUT(MIN) = 0.6V, IQ = 65μA, ISD < 1μA, DFN Package LTC3410/LTC3410B 300mA IOUT, 2.25MHz, Synchronous Step-Down DC/DC Converters 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 26μA, ISD < 1μA, SC70 Package LTC3411 1.25A IOUT, 4MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 60μA, ISD < 1μA, 10-Lead MSE, DFN Packages LTC3412 2.5A IOUT, 4MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 60μA, ISD < 1μA, 16-Lead TSSOPE Package LTC3419 Dual 600mA, 2.25MHz, Synchronous Step-Down DC/DC 96% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 35μA, ISD < 1μA, MS10, 3mm × 3mm DFN Package Converter LTC3441/LTC3442 LTC3443 1.2A IOUT, 2MHz, Synchronous Buck-Boost DC/DC Converters 95% Efficiency, VIN: 2.4V to 5.5V, VOUT(MIN): 2.4V to 5.25V, IQ = 50μA, ISD < 1μA, DFN Package LTC3531/LTC3531-3 LTC3531-3.3 200mA IOUT, 1.5MHz, Synchronous Buck-Boost DC/DC Converters 95% Efficiency, VIN: 1.8V to 5.5V, VOUT(MIN): 2V to 5V, IQ = 16μA, ISD < 1μA, ThinSOT, DFN Packages LTC3532 500mA IOUT, 2MHz, Synchronous Buck-Boost DC/DC Converter 95% Efficiency, VIN: 2.4V to 5.5V, VOUT(MIN): 2.4V to 5.25V, IQ = 35μA, ISD < 1μA, 10-Lead MSE, DFN Packages LTC3544/LTC3544B 300mA, 2 × 200mA, 100mA, 2.25MHz Quad Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 60μA, ISD < 1μA, 3mm × 3mm QFN Package LTC3547 Dual 300mA IOUT, 2.25MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 40μA, ISD < 1μA, 8-Lead DFN Package LTC3548/LTC3548-1 LTC3548-2 Dual 400mA/800mA IOUT, 2.25MHz, Synchronous Step-Down DC/DC Converters 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 40μA, ISD < 1μA, 10-Lead MSE, DFN Packages LTC3561 1.25A IOUT, 4MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 240μA, ISD < 1μA, DFN Package ThinSOT is a Trademark of Linear Technology Corporation. 35451fb 20 Linear Technology Corporation LT 0908 REV B • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2008