Infineon ICE2BS01 Pwm-ff ic Datasheet

Da ta sheet, V2.0, 1 F eb 2002
PWM-FF IC
ICE2AS01/S01G
ICE2BS01/S01G
Off-Line SMPS Current Mode
Controller
P o w e r M a n a g em e n t & S u p p l y
N e v e r
s t o p
t h i n k i n g .
ICE2AS01/G
ICE2BS01/G
Revision History:
2002-02-01
Datasheet
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Subjects (major changes since last revision)
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Edition 2002-02-01
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ICE2AS01/G
ICE2BS01/G
Off-Line SMPS Current Mode Controller
Product Highlights
P-DIP-8-4
• Enhanced Protection Functions all
with Auto Restart
• Lowest Standby Power Dissipation
• Very Accurate Current Limiting
P-DSO-8-3
Features
Description
•
•
•
•
•
This stand alone controller provides several special
enhancements to satisfy the needs for low power standby
and protection features. In standby mode frequency
reduction is used to lower the power consumption and
provide a stable output voltage in this mode. The frequency
reduction is limited to 20kHz / 21.5 kHz (typ.) to avoid
audible noise. In case of failure modes like open loop,
overvoltage or overload due to short circuit the device
switches in Auto Restart Mode which is controlled by the
internal protection unit. By means of the internal precise
peak current limitation the dimension of the transformer and
the secondary diode can be lower which leads to more cost
efficiency.
•
•
•
•
•
•
•
•
Only few external Components required
Input Undervoltage Lockout
67kHz/100kHz fixed Switching Frequency
Max Duty Cycle 72%
Low Power Standby Mode to support
“Blue Angle” Norm
Latched Thermal Shut Down
Overload and Open Loop Protection
Overvoltage Protection during Auto Restart
Adjustable Peak Current Limitation via
External Resistor
Overall Tolerance of Current Limiting < ±5%
Internal Leading Edge Blanking
Soft Start
Soft Switching for Low EMI
Typical Application
+
Snubber
RStart-up
85 ... 270 VAC
Converter
DC Output
-
CVCC
VCC
Feedback
Low Power
StandBy
Power
Management
Gate
SoftS
PWM Controller
Current Mode
Soft-Start Control
CSoft Start
Isense
Precise Low Tolerance
Peak Current Limitation
RSense
FB
Protection Unit
Feedback
GND
ICE2AS01 / ICE2BS01
Type
Ordering Code
Frequency
Package
ICE2AS01
Q67040-S4472
100kHz
P-DIP-8-4
ICE2AS01G
Q67040-S4473
100kHz
P-DSO-8-3
ICE2BS01
Q67040-S4475
67kHz
P-DIP-8-4
ICE2BS01G
Q67040-S4476
67kHz
P-DSO-8-3
Version 2.0
3
1 Feb 2002
ICE2AS01/G
ICE2BS01/G
Table of Contents
Page
1
1.1
1.2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Pin Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
2
Pin Configuration and Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
3
Representative Blockdiagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
4
4.1
4.2
4.2.1
4.2.2
4.3
4.4
4.4.1
4.4.2
4.5
4.5.1
4.5.2
4.6
4.7
4.8
4.8.1
4.8.2
4.8.3
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Improved Current Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
PWM-OP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
PWM-Comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Soft-Start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Oscillator and Frequency Reduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Frequency Reduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Current Limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Leading Edge Blanking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Propagation Delay Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
PWM-Latch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Protection Unit (Auto Restart Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Overload & Open loop with normal load . . . . . . . . . . . . . . . . . . . . . . . . .12
Overvoltage due to open loop with no load . . . . . . . . . . . . . . . . . . . . . . .13
Thermal Shut Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
5
5.1
5.2
5.3
5.3.1
5.3.2
5.3.3
5.3.4
5.3.5
5.3.6
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
Supply Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
Internal Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
Control Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
Protection Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
Current Limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
Driver Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
6
Typical Performance Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .19
7
Outline Dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
Version 2.0
4
1 Feb 2002
ICE2AS01/G
ICE2BS01/G
1
Pin Configuration and Functionality
1.1
Pin Configuration
1.2
SoftS (Soft Start & Auto Restart Control)
This pin combines the function of Soft Start in case of
Start Up and Auto Restart Mode and the controlling of
the Auto Restart Mode in case of an error detection.
Pin
Symbol
Function
1
N.C.
Not connected
2
SoftS
Soft Start & Auto Restart Control
3
FB
Regulation Fedback
4
Isense
Controller Current Sense Input
5
Gate
Driver Output
6
VCC
Controller Supply Voltage
7
GND
Controller Ground
8
N.C.
Not connected
FB (Feedback)
The information about the regulation is provided by the
FB Pin to the internal Protection Unit and to the internal
PWM-Comparator to control the duty cycle.
Isense (Current Sense)
The Current Sense pin senses the voltage developed
on the series resistor inserted in the source of the
external Power Switch. When Isense reaches the
internal threshold of the Current Limit Comparator, the
Driver output is disabled. By this mean the Over
Current Detection is realized.
Furthermore the current information is provided for the
PWM-Comparator to realize the Current Mode.
Package P-DIP-8-4
G-Package P-DSO-8-3
N.C.
1
8
N.C.
SoftS
2
7
GND
FB
Isense
Figure 1
Version 2.0
Pin Functionality
3
6
4
5
Gate (Driver Output)
The current and slew rate capability of this pin are
suited to drive Power MOSFETs.
VCC (Power supply)
This pin is the positiv supply of the IC. The operating
range is between 8.5V and 21V.
To provide overvoltage protection the driver gets
disabled when the voltage becomes higher than 16.5V
during Start up Phase.
VCC
Gate
GND (Ground)
This pin is the ground of the primary side of the SMPS.
Pin Configuration (top view)
5
1 Feb 2002
Version 2.0
FB
CSoft-Start
T1
6
Thermal
Shutdown
C3
C4
C2
Protection Unit
Tj >140°C
4.8V
5.3V
4.0V
C1
G2
G1
GND
ICE2AS01 / ICE2BS01
RFB
6.5V
5.6V
RSoft-Start
6.5V
16.5V
VCC
RStart-up
fnorm
fstandby
Q
Q
fosc
UFB
Error-Latch
R
S
Power-Up
Reset
Standby Unit
G3
13.5V
Power-Down
Reset
8.5V
x3.65
C5
PWM
Comparator
Soft-Start
Comparator
6.5V
5.3V
4.8V
4.0V
Current-Limit
Comparator
G4
Current Limiting
Vcsth
Q
Q
Gate
Driver
D1
10kΩ
100kHz
21.5kHz
67kHz
Frequency in Standby Mode fstandby: 20kHz
ICE2AS01/SO1G
Leading Edge
Blanking
200ns
ICE2BS01/SO1G
R
S
PWM-Latch
0.72
Propagation-Delay
Compensation
Clock
Duty Cycle
max
Oscillator
Frequency in Normal Mode fnorm:
Improved Current Mode
PWM OP
0.8V
0.3V
Soft Start
Voltage
Reference
Internal
Bias
Power Management
Undervoltage
Lockout
Spike
Blanking
5µs
CVCC
CLine
Isense
Gate
Snubber
Optocoupler
RSense
2
SoftS
85 ... 270 VAC
+
Converter
DC Output
VOUT
-
ICE2AS01/G
ICE2BS01/G
Representative Blockdiagram
Representative Blockdiagram
Figure 2
1 Feb 2002
ICE2AS01/G
ICE2BS01/G
Functional Description
3
Functional Description
3.1
Power Management
3.2
M ain L in e (1 00 V -3 80 V )
Improved Current Mode
S o ft-S ta rt C o m p a ra to r
R S tart-U p
P rim ary W in ding
P W M -L a tch
FB
C VC C
R
Q
D rive r
VCC
P W M C o m p a ra to r
Pow er M anagem ent
S
U n de rvolta g e
Q
In te rn a l
L o ckou t
B ias
0 .8V
1 3 .5V
8 .5 V
P o w er-D ow n
6.5 V
R e set
5.3 V
V o lta g e
PW M OP
x3 .6 5
4.8 V
R efe ren ce
4.0 V
P o w er-U p
Ise n se
Im proved
C urrent M ode
R e se t
R
Q
P W M -L atch
Figure 4
6 .5 V
S
R Soft-Sta rt
S o ftS
Q
Current Mode means that the duty cycle is controlled
by the slope of the primary current. This is done by
comparison the FB signal with the amplified current
sense signal.
E rro r-L a tch
S o ft-S ta rt C om p ara tor
C S oft-Start
T1
Current Mode
E rror-D ete ctio n
A m p lified C u rren t S ig n al
Figure 3
Power Management
FB
The Undervoltage Lockout monitors the external
supply voltage VVCC. In case the IC is inactive the
current consumption is max. 55µA. When the SMPS is
plugged to the main line the current through RStart-up
charges the external Capacitor CVCC. When VVCC
exceeds the on-threshold VCCon=13.5V the internal bias
circuit and the voltage reference are switched on. After
it the internal bandgap generates a reference voltage
VREF=6.5V to supply the internal circuits. To avoid
uncontrolled ringing at switch-on a hysteresis is
implemented which means that switch-off is only after
active mode when Vcc falls below 8.5V.
In case of switch-on a Power Up Reset is done by
reseting the internal error-latch in the protection unit.
When VVCC falls below the off-threshold VCCoff=8.5V the
internal reference is switched off and the Power Down
reset let T1 discharging the soft-start capacitor CSoft-Start
at pin SoftS. Thus it is ensured that at every switch-on
the voltage ramp at pin SoftS starts at zero.
Version 2.0
0 .8 V
D rive r
t
T on
t
Figure 5
Pulse Width Modulation
In case the amplified current sense signal exceeds the
FB signal the on-time Ton of the driver is finished by
reseting the PWM-Latch (see Figure 5).
7
1 Feb 2002
ICE2AS01/G
ICE2BS01/G
Functional Description
The primary current is sensed by the series resistor
RSense inserted in the source of the external Power
Switch. By means of Current Mode the regulation of the
secondary voltage is insensitive on line variations. Line
variation causes varition of the increasing current slope
which controls the duty cycle.
The external RSense allows an individual adjustment of
the maximum source current of the external Power
Switch.
V OSC
m a x.
D u ty C yc le
V olta ge R a m p
t
S oft-S tart C o m p ara to r
P W M C o m pa ra to r
0 .8 V
FB
FB
0 .3 V
P W M -La tch
O s cilla to r
G a te D rive r
0.3V
t
C5
G a te D rive r
V O SC
0.8V
1 0 kΩ
x3 .6 5
R1
T2
C1
V1
2 0p F
t
PW M OP
Figure 7
3.2.1
V oltage Ram p
Figure 6
PWM-OP
The input of the PWM-OP is applied over the internal
leading edge blanking to the external sense resistor
RSense connected to pin ISense. RSense converts the
source current into a sense voltage. The sense voltage
is amplified with a gain of 3.65 by PWM OP. The output
of the PWM-OP is connected to the voltage source V1.
The voltage ramp with the superimposed amplified
current singal is fed into the positive inputs of the PWMComparator, C5 and the Soft-Start-Comparator.
Improved Current Mode
To improve the Current Mode during light load
conditions the amplified current ramp of the PWM-OP
is superimposed on a voltage ramp, which is built by
the switch T2, the voltage source V1 and the 1st order
low pass filter composed of R1 and C1 (see Figure 6,
Figure 7). Every time the oscillator shuts down for max.
duty cycle limitation the switch T2 is closed by VOSC.
When the oscillator triggers the Gate Driver T2 is
opened so that the voltage ramp can start (see Figure
7).
In case of light load the amplified current ramp is to
small to ensure a stable regulation. In that case the
Voltage Ramp is a well defined signal for the
comparison with the FB-signal. The duty cycle is then
controlled by the slope of the Voltage Ramp.
By means of the C5 Comparator the Gate Driver is
switched-off until the voltage ramp exceeds 0.3V. It
allows the duty cycle to be reduced continously till 0%
by decreasing VFB below that threshold.
Version 2.0
Light Load Conditions
3.2.2
PWM-Comparator
The PWM-Comparator compares the sensed current
signal of the external Power Switch with the feedback
signal VFB (see Figure 8). VFB is created by an external
optocoupler or external transistor in combination with
the internal pullup resistor RFB and provides the load
information of the feedback circuitry. When the
amplified current signal of the external Power Switch
exceeds the signal VFB the PWM-Comparator switches
off the Gate Driver.
8
1 Feb 2002
ICE2AS01/G
ICE2BS01/G
Functional Description
pullup resistor RSoft-Start. The Soft-Start-Comparator
compares the voltage at pin SoftS at the negative input
with the ramp signal of the PWM-OP at the positive
input. When Soft-Start voltage VSoftS is less than
Feedback voltage VFB the Soft-Start-Comparator limits
the pulse width by reseting the PWM-Latch (see Figure
9). In addition to Start-Up, Soft-Start is also activated at
each restart attempt during Auto Restart. By means of
the above mentioned CSoft-Start the Soft-Start can be
defined by the user. The Soft-Start is finished when
VSoftS exceeds 5.3V. At that time the Protection Unit is
activated by Comparator C4 and senses the FB by
Comparator C3 wether the voltage is below 4.8V which
means that the voltage on the secondary side of the
SMPS is settled. The internal Zener Diode at SoftS with
breaktrough voltage of 5.6V is to prevent the internal
circuit from saturation (see Figure 10).
6 .5 V
S o ft-S ta rt C o m p ara to r
R FB
FB
P W M -L atch
P W M C o m p a rato r
0 .8 V
O p to co u p le r
PW M OP
Ise n se
6 .5 V
x3 .65
R S o ft-S ta rt
Im proved
Current M ode
3.3
E rro r-L a tc h
S o ftS
6 .5 V
5 .3 V
Figure 8
P o w e r-U p R e s e t
5 .6 V
C4
G2
R
Q
S
Q
R
Q
PWM Controlling
4 .8 V
R FB
Soft-Start
FB
C3
G a te
D riv e r
C lo c k
V S oftS
S
Q
P W M -L a tc h
Figure 10
5 .6 V
5 .3 V
The Start-Up time TStart-Up within the converter output
voltage VOUT is settled must be shorter than the SoftStart Phase TSoft-Start (see Figure 11).
T S oft-S tart
G a te D rive r
Activation of Protection Unit
C Soft − Start =
t
T Soft − Start
R Soft − Start × 1, 69
By means of Soft-Start there is an effective
minimization of current and voltage stresses on the
external Power Switch, the clamp circuit and the output
overshoot and prevents saturation of the transformer
during Start-Up.
t
Figure 9
Soft-Start Phase
The Soft-Start is realized by the internal pullup resistor
RSoft-Start and the external Capacitor CSoft-Start (see
Figure 2). The Soft-Start voltage VSoftS is generated by
charging the external capacitor CSoft-Start by the internal
Version 2.0
9
1 Feb 2002
ICE2AS01/G
ICE2BS01/G
Functional Description
V S o ftS
kHz
fnorm
f OSC
5 .3 V
T S oft-S ta rt
V FB
fstandby
t
1,0
1,1
1,2
1,3
1,4
1,6
1,7
1,8
1,9
2
V
VFB
4 .8 V
ICE2BS01
V OUT
t
V O UT
67kHz
100kHz
fstandby:
20kHz
21.5kHz
3.5
T S ta rt-U p
Start Up Phase
3.4
Oscillator and Frequency
Reduction
3.4.1
Oscillator
The oscillator generates a frequency fswitch = 100kHz. A
resistor, a capacitor and a current source and current
sink which determine the frequency are integrated. The
charging and discharging current of the implemented
oscillator capacitor are internally trimmed, in order to
achieve a very accurate switching frequency. The ratio
of controlled charge to discharge current is adjusted to
reach a max. duty cycle limitation of Dmax=0.72.
Current Limiting
3.5.1
Leading Edge Blanking
V S en s e
Frequency Reduction
V c s th
The frequency of the oscillator is depending on the
voltage at pin FB. The dependence is shown in Figure
12. This feature allows a power supply to operate at
lower frequency at light loads thus lowering the
switching losses while maintaining good cross
regulation performance and low output ripple. In case
of low power the power consumption of the whole
SMPS can now be reduced very effective. The minimal
reachable frequency is limited to 20kHz / 21.5 kHz to
avoid audible noise in any case.
Version 2.0
Frequency Dependence
There is a cycle by cycle current limiting realised by the
Current-Limit Comparator to provide an overcurrent
detection. The source current of the external Power
Switch is sensed via an external sense resistor RSense .
By means of RSense the source current is transformed to
a sense voltage VSense. When the voltage VSense
exceeds the internal threshold voltage Vcsth the
Current-Limit-Comparator immediately turns off the
gate drive. To prevent the Current Limiting from
distortions caused by leading edge spikes a Leading
Edge Blanking is integrated at the Current Sense.
Furthermore a Propagation Delay Compensation is
added to support the immedeate shut down of the
Power Switch in case of overcurrent.
t
Figure 11
ICE2AS01
fnorm:
Figure 12
3.4.2
1,5
t L E B = 22 0 ns
t
Figure 13
Leading Edge Blanking
Each time when the external Power Switch is switched
on a leading spike is generated due to the primary-side
capacitances and secondary-side rectifier reverse
10
1 Feb 2002
ICE2AS01/G
ICE2BS01/G
Functional Description
recovery time. To avoid a premature termination of the
switching pulse this spike is blanked out with a time
constant of tLEB = 220ns. During that time the output of
the Current-Limit Comparator cannot switch off the
gate drive.
3.5.2
VOSC
max. Duty Cycle
Propagation Delay Compensation
off time
In case of overcurrent detection the shut down of the
external Power Switch is delayed due to the
propagation delay of the circuit. This delay causes an
overshoot of the peak current Ipeak which depends on
the ratio of dI/dt of the peak current (see Figure 14).
.
S ig n a l2
VSense
Vcsth
S ig n a l1
t P ro pa ga tion D e la y
I S e ns e
I O v ers h oo t2
I p ea k 2
I p ea k 1
I L im it
t
Propagation Delay
Signal1
Signal2
t
Figure 15
I O v e rs ho ot1
Dynamic Voltage Threshold Vcsth
with compensation
without compensation
V
t
1,25
Current Limiting
1,2
VSense
Figure 14
1,3
The overshoot of Signal2 is bigger than of Signal1 due
to the steeper rising waveform.
A propagation delay compensation is integrated to
bound the overshoot dependent on dI/dt of the rising
primary current. That means the propagation delay
time between exceeding the current sense threshold
Vcsth and the switch off of the external Power Switch is
compensated over temperature within a range of at
least
.
0 ≤ RSense
dI
× peak
dt
≤ 1
1,1
1,05
1
0,95
0,9
0
0,2
0,4
0,6
0,8
1
1,2
1,4
dVSense
dt
Figure 16
dVSense
dt
3.6
1,6
1,8
2
V
µs
Overcurrent Shutdown
PWM-Latch
The oscillator clock output applies a set pulse to the
PWM-Latch when initiating the external Power Switch
conduction. After setting the PWM-Latch can be reset
by the PWM-OP, the Soft-Start-Comparator, the
Current-Limit-Comparator, Comparator C3 or the
Error-Latch of the Protection Unit. In case of reseting
the driver is shut down immediately.
So current limiting is now capable in a very accurate
way (see Figure 16).
E.g. Ipeak = 0.5A with RSense = 2 . Without propagation
delay compensation the current sense threshold is set
to a static voltage level Vcsth=1V. A current ramp of
dI/dt = 0.4A/µs, that means dVSense/dt = 0.8V/µs, and a
propagation delay time of i.e. tPropagation Delay =180ns
leads then to an Ipeak overshoot of 12%. By means of
propagation delay compensation the overshoot is only
about 2% (see Figure 15).
The propagation delay compensation is done by
means of a dynamic threshold voltage Vcsth (see Figure
15). In case of a steeper slope the switch off of the
driver is earlier to compensate the delay.
Version 2.0
1,15
3.7
Driver
The driver is a fast totem pole gate drive, which is
designed to avoid cross conduction currents and which
is equipped with a Zener diode Z1 (see Figure 17) in
order to improve the control of the gate attached power
11
1 Feb 2002
ICE2AS01/G
ICE2BS01/G
Functional Description
failure modes are latched by an Error-Latch. Additional
thermal shutdown is latched by the Error-Latch. In case
of those failure modes the Error-Latch is set after a
blanking time of 5µs and the external Power Switch is
shut down. That blanking prevents the Error-Latch from
distortions caused by spikes during operation mode.
transistors as well as to protect them against
undesirable gate overvoltages.
VCC
P W M -La tch
3.8.1
1
Overload & Open loop with normal
load
G a te
Z1
O verload & O pen loop/norm al load
FB
5µ s B la nking
4 .8 V
F ailure
D e tectio n
Figure 17
Gate Driver
t
S oftS
At voltages below the undervoltage lockout threshold
VVCCoff the gate drive is active low.
The driver-stage is optimized to minimize EMI and to
provide high circuit efficiency. This is done by reducing
the switch on slope when reaching the external Power
Switch threshold. This is achieved by a slope control of
the rising edge at the driver’s output (see Figure 18).
5 .3 V
S oft-S tart P h ase
D river
t
T B u rs t1
T R e s tart
V G a te
ca . t = 1 3 0 n s
C L o ad = 1n F
t
VC C
5V
1 3 .5 V
8 .5V
t
Figure 18
Gate Rising Slope
t
Figure 19
Thus the leading switch on spike is minimized. When
the external Power Switch is switched off, the falling
shape of the driver is slowed down when reaching 2V
to prevent an overshoot below ground. Furthermore the
driver circuit is designed to eliminate cross conduction
of the output stage.
3.8
Auto Restart Mode
Figure 19 shows the Auto Restart Mode in case of
overload or open loop with normal load. The detection
of open loop or overload is provided by the Comparator
C3, C4 and the AND-gate G2 (see Figure20).
Protection Unit (Auto Restart Mode)
An overload, open loop and overvoltage detection is
integrated within the Protection Unit. These three
Version 2.0
12
1 Feb 2002
ICE2AS01/G
ICE2BS01/G
Functional Description
3.8.2
Overvoltage due to open loop with
no load
6.5 V
P o w e r U p R e se t
S o ftS
R S oft-S tart
O pen loop & no load conditio n
FB
5 µs B la n kin g
4 .8V
C S oft-S tart
C4
5 .3 V
E rro r-L a tch
F ailure
D ete ction
G2
T1
4 .8V
C3
FB
S o ftS
5 .3V
R FB
4 .0V
6 .5 V
Figure 20
t
S o ft-S ta rt P ha se
O v erv olta g e
D e te ction P ha se
FB-Detection
D rive r
T R es ta rt
The detection is activated by C4 when the voltage at
pin SoftS exceeds 5.3V. Till this time the IC operates in
the Soft-Start Phase. After this phase the comparator
C3 can set the Error-Latch in case of open loop or
overload which leads the feedback voltage VFB to
exceed the threshold of 4.8V. After latching VCC
decreases till 8.5V and inactivates the IC. At this time
the external Soft-Start capacitor is discharged by the
internal transistor T1 due to Power Down Reset. When
the IC is inactive VCC increases till VCCon = 13.5V by
charging the Capacitor CVCC by means of the Start-Up
Resistor RStart-Up. Then the Error-Latch is reset by
Power Up Reset and the external Soft-Start capacitor
CSoft-Start is charged by the internal pullup resistor RSoftStart . During the Soft-Start Phase which ends when the
voltage at pin SoftS exceeds 5.3V the detection of
overload and open loop by C3 and G2 is inactive. In this
way the Start Up Phase is not detected as an overload.
But the Soft-Start Phase must be finished within the
Start Up Phase to force the voltage at pin FB below the
failure detection threshold of 4.8V.
Version 2.0
t
T B urs t2
O ve rvo ltag e D ete ctio n
t
VCC
1 6.5 V
1 3.5 V
8.5 V
t
Figure 21
Auto Restart Mode
Figure 21 shows the Auto Restart Mode for open loop
and no load condition. In case of this failure mode the
converter output voltage increases and also VCC. An
additional protection by the comparators C1, C2 and
the AND-gate G1 is implemented to consider this
failure mode (see Figure 22).
13
1 Feb 2002
ICE2AS01/G
ICE2BS01/G
Functional Description
VCC
6 .5 V
C1
1 6 .5 V
E rro r L a tch
G1
R S o ft-S ta rt
4 .0 V
C2
S o ftS
C S o ft-S ta rt
T1
Figure 22
P o w e r U p R e se t
Overvoltage Detection
The overvoltage detection is provided by Comparator
C1 only in the first time during the Auto Restart Mode
till the Soft-Start voltage exceeds the threshold of the
Comparator C2 at 4.0V and the voltage at pin FB is
above 4.8V. When VCC exceeds 16.5V during the
overvoltage detection phase C1 can set the Error-Latch
and the Burst Phase during Auto Restart Mode is
finished earlier. In that case TBurst2 is shorter than TSoftStart . By means of C2 the normal operation mode is
prevented from overvoltage detection due to varying of
VCC concerning the regulation of the converter output.
When the voltage VSoftS is above 4.0V the overvoltage
detection by C1 is deactivated.
3.8.3
Thermal Shut Down
Thermal Shut Down is latched by the Error-Latch when
junction temperature Tj of the pwm controller is
exceeding an internal threshold of 140°C. In that case
the IC switches in Auto Restart Mode.
Note:
All the values which are mentioned in the
functional description are typical. Please refer
to Electrical Characteristics for min/max limit
values.
Version 2.0
14
1 Feb 2002
ICE2AS01/G
ICE2BS01/G
Electrical Characteristics
4
Electrical Characteristics
4.1
Absolute Maximum Ratings
Note:
Absolute maximum ratings are defined as ratings, which when being exceeded may lead to destruction
of the integrated circuit. For the same reason make sure, that any capacitor that will be connected to pin 6
(VCC) is discharged before assembling the application circuit.
Parameter
Symbol
Limit Values
min.
max.
Unit
Remarks
VCC Supply Voltage
VCC
-0.3
22
V
FB Voltage
VFB
-0.3
6.5
V
SoftS Voltage
VSoftS
-0.3
6.5
V
ISense
ISense
-0.3
3
V
Junction Temperature
Tj
-40
150
°C
Storage Temperature
TS
-50
150
°C
Thermal Resistance
Junction-Ambient
RthJA
-
90
K/W
P-DIP-8-4
Thermal Resistance
Junction-Ambient
RthJA
-
185
K/W
P-DSO-8-3
ESD Capability1)
VESD
-
2
kV
Human Body Model
1)
Controller & CoolMOS
Equivalent to discharging a 100pF capacitor through a 1.5 kΩ series resistor
4.2
Note:
Operating Range
Within the operating range the IC operates as described in the functional description.
Parameter
Symbol
Limit Values
min.
max.
Unit
VCC Supply Voltage
VCC
VCCoff
21
V
Junction Temperature of
Controller
TJCon
-25
130
°C
Version 2.0
15
Remarks
limited due to thermal shut down of
controller
1 Feb 2002
ICE2AS01/G
ICE2BS01/G
Electrical Characteristics
4.3
Note:
4.3.1
Characteristics
The electrical characteristics involve the spread of values guaranteed within the specified supply voltage
and junction temperature range TJ from – 25 °C to 125 °C.Typical values represent the median values,
which are related to 25°C. If not otherwise stated, a supply voltage of VCC = 15 V is assumed.
Supply Section
Parameter
Symbol
Limit Values
min.
typ.
max.
Unit
Test Condition
Start Up Current
IVCC1
-
27
55
µA
VCC=VCCon -0.1V
Supply Current with Inactiv
Gate
IVCC2
-
5.3
7
mA
VSoftS = 0
IFB = 0
Supply Current with Activ Gate
ICE2AS01/G
IVCC3
-
6.5
8
mA
VSoftS = 5V
IFB = 0
CGate = 1nF
Supply Current with Activ Gate
ICE2BS01/G
IVCC3
-
6
7.5
mA
VSoftS = 5V
IFB = 0
CGate = 1nF
VCC Turn-On Threshold
VCC Turn-Off Threshold
VCC Turn-On/Off Hysteresis
VCCon
VCCoff
VCCHY
13
4.5
13.5
8.5
5
14
5.5
V
V
V
4.3.2
Internal Voltage Reference
Parameter
Trimmed Reference Voltage
4.3.3
Symbol
VREF
Limit Values
min.
typ.
max.
6.37
6.50
6.63
Unit
Test Condition
V
measured at pin FB
Unit
Test Condition
Control Section
Parameter
Symbol
Limit Values
min.
typ.
max.
Oscillator Frequency
ICE2AS01/G
fOSC1
93
100
107
kHz
VFB = 4V
Oscillator Frequency
ICE2BS01/G
fOSC3
62
67
72
kHz
VFB = 4V
Reduced Osc. Frequency
ICE2AS01/G
fOSC2
-
21.5
-
kHz
VFB = 1V
Reduced Osc. Frequency
ICE2AS01/G
fOSC4
-
20
-
kHz
VFB = 1V
Version 2.0
16
1 Feb 2002
ICE2AS01/G
ICE2BS01/G
Electrical Characteristics
Frequency Ratio fosc1/fosc2
ICE2AS01/G
4.5
4.65
4.9
Frequency Ratio fosc3/fosc4
ICE2BS01/G
3.18
3.35
3.53
Max Duty Cycle
Dmax
0.67
0.72
0.77
Min Duty Cycle
Dmin
0
-
-
PWM-OP Gain
AV
3.45
3.65
3.85
Max. Level of Voltage Ramp
VMax-Ramp
-
0.85
-
V
VFB Operating Range Min Level VFBmin
0.3
-
-
V
VFB Operating Range Max level VFBmax
-
-
4.6
V
Feedback Resistance
RFB
3.0
3.7
4.9
kΩ
Soft-Start Resistance
RSoft-Start
42
50
62
kΩ
4.3.4
VFB < 0V
Protection Unit
Parameter
Symbol
Limit Values
min.
typ.
max.
Unit
Test Condition
Over Load & Open Loop
Detection Limit
VFB2
4.65
4.8
4.95
V
VSoftS > 5.5V
Activation Limit of Overload &
Open Loop Detection
VSoftS1
5.15
5.3
5.46
V
VFB > 5V
Deactivation Limit of
Overvoltage Detection
VSoftS2
3.88
4.0
4.12
V
VFB > 5V
VCC > 17.5V
Overvoltage Detection Limit
VVCC1
16
16.5
17.2
V
VSoftS < 3.8V
VFB > 5V
Latched Thermal Shutdown
TjSD
130
140
150
°C
guaranteed by design
Spike Blanking
tSpike
-
5
-
µs
4.3.5
Current Limiting
Parameter
Symbol
Limit Values
min.
typ.
max.
Unit
Test Condition
dVsense / dt = 0.6V/µs
Peak Current Limitation (incl.
Propagation Delay Time)
(see Figure 7)
Vcsth
0.95
1.00
1.05
V
Leading Edge Blanking
tLEB
-
220
-
ns
Version 2.0
17
1 Feb 2002
ICE2AS01/G
ICE2BS01/G
Electrical Characteristics
4.3.6
Driver Section
Parameter
GATE Low Voltage
GATE High Voltage
Symbol
VGATE
VGATE
Limit Values
Unit
Test Condition
min.
typ.
max.
-
0.95
1.2
V
VVCC = 5 V
IGate = 5 mA
-
1.0
1.5
V
VVCC = 5 V
IGate = 20 mA
-
0.88
-
V
IGate = 0 A
-
1.6
2.2
V
IGate = 50 mA
-0.2
0.2
-
V
IGate = -50 mA
-
11.5
-
V
VVCC = 20V
CL = 4.7nF
-
10
-
V
VVCC = 11V
CL = 4.7nF
-
7.5
-
V
VVCC = VVCCoff + 0.2V
CL = 4.7nF
GATE Rise Time
tr
-
160
-
ns
VGate = 2V ...9V1)
CL = 4.7nF
GATE Fall Time
tf
-
65
-
ns
VGate = 9V ...2V1)
CL = 4.7nF
GATE Current, Peak,
Rising Edge
IGATE
-0.5
-
-
A
CL = 4.7nF2)
GATE Current, Peak,
Falling Edge
IGATE
-
-
0.7
A
CL = 4.7nF2)
1)
Transient reference value
2)
Design characteristics (not meant for production testing)
Version 2.0
18
1 Feb 2002
ICE2AS01/G
ICE2BS01/G
Typical Performance Characteristics
Typical Performance Characteristics
40
VCC Turn-On Threshold V CCon [V]
13,58
36
34
32
PI-001-190101
Start Up Current I VCC1 [µA]
38
30
28
26
24
22
-25 -15
-5
5
15
25
35
45
55
65
75
85
95
13,56
13,54
13,52
13,50
13,48
13,46
13,44
13,42
-25 -15
105 115 125
PI-004-190101
5
-5
5
Start Up Current IVCC1 vs. Tj
Figure 26
VCC Turn-Off Threshold V VCCoff [V]
5,7
5,4
5,1
4,8
-5
5
15
25
35
45
55
65
75
85
95 105 115 125
65
75
85
95 105 115 125
8,64
8,61
8,58
8,55
8,52
8,49
8,46
8,43
8,40
-25 -15
Figure 27
-5
5
ICE2ASO1
ICE2ASO1G
6,6
6,4
PI-002-190101
6,2
6,0
5,8
ICE2BSO1
ICE2BSO1G
5,6
5,4
5,2
5,0
-25 -15 -5
5
25
35
45
55
65
75
85
95 105 115 125
15 25 35 45 55 65 75 85 95 105 115 125
VCC Turn-Off Threshold VVCCoff vs. Tj
5,10
5,07
5,04
5,01
4,98
4,95
4,92
4,89
4,86
4,83
-25 -15
Junction Temperature [°C]
-5
5
15
25
35
45
55
65
75
85
95 105 115 125
Junction Temperature [°C]
Figure 28
Supply Current IVCC3 vs. Tj
Version 2.0
15
PI-006-190101
VCC Turn-On/Off Hysteresis V CCHY [V]
Supply Current IVCC2 vs. Tj
6,8
Supply Current I VCC3 [mA]
55
Junction Temperature [°C]
7,0
Figure 25
45
VCC Turn-On Threshold VVCCon vs. Tj
Junction Temperature [°C]
Figure 24
35
8,67
PI-003-190101
Supply Current IVCC2 [mA]
6,0
4,5
-25 -15
25
PI-005-190101
Figure 23
15
Junction Temperature [°C]
Junction Temperature [°C]
19
VCC Turn-On/Off HysteresisVVCCHY vs. Tj
1 Feb 2002
ICE2AS01/G
ICE2BS01/G
Typical Performance Characteristics
6,53
6,52
6,51
6,50
6,49
6,48
6,47
6,46
6,45
-25 -15
-5
5
15
25
35
45
55
65
75
85
95 105 115 125
21,8
21,7
21,6
ICE2ASO1
ICE2ASO1G
21,5
21,4
PI-009-190101
Reduced Osc. Frequency OSC2
f
[kHz]
6,54
PI-007-190101
Trimmed Reference Voltage V REF [V]
6,55
21,3
21,2
21,1
21,0
20,9
20,8
-25 -15 -5
Trimmed Reference VREF vs. Tj
Figure 32
[kHz]
OSC4
101,5
ICE2ASO1
ICE2ASO1G
Reduced Osc. Frequency f
100,5
100,0
PI-008-190101
Oscillator Frequency OSC1
f
[kHz]
102,0
101,0
99,5
99,0
98,5
98,0
97,5
97,0
-25 -15 -5
5
15 25 35
45 55 65 75 85 95 105 115 125
20,4
95 105 115 125
ICE2BSO1
ICE2BSO1G
19,8
19,6
19,4
19,2
19,0
-25 -15 -5
5
15 25 35 45 55 65 75 85 95 105 115 125
67,5
66,0
65,5
65,0
64,5
Reduced Osc. Frequency fOSC4 vs. Tj
4,66
4,64
ICE2ASO1
ICE2ASO1G
4,62
PI-010-190101
Frequency Ratio fOSC1/fOSC2
ICE2BSO1
ICE2BSO1G
PI-008a-190101
Oscillator Frequency f OSC3 [kHz]
68,5
4,60
4,58
4,56
4,54
4,52
4,50
-25 -15 -5
15 25 35 45 55 65 75 85 95 105 115 125
Junction Temperature [°C]
5
15
25
35
45
55
65
75
85
95 105 115 125
Junction Temperature [°C]
Oscillator Frequency fOSC3 vs. Tj
Version 2.0
85
20,0
4,68
Figure 31
75
20,2
Figure 33
69,0
5
65
20,6
4,70
64,0
-25 -15 -5
55
20,8
69,5
66,5
45
21,0
70,0
67,0
35
Junction Temperature [°C]
Oscillator Frequency fOSC1 vs. Tj
68,0
25
Reduced Osc. Frequency fOSC2 vs. Tj
Junction Temperature [°C]
Figure 30
15
PI-009a-190101
Figure 29
5
Junction Temperature [°C]
Junction Temperature [°C]
Figure 34
20
Frequency Ratio fOSC1 / fOSC2 vs. Tj
1 Feb 2002
ICE2AS01/G
ICE2BS01/G
Typical Performance Characteristics
4,00
3,41
3,39
3,37
PI-010a-190101
Frequency Ratio fOSC3/fOSC4
3,43
ICE2BSO1
ICE2BSO1G
3,35
3,33
3,31
3,29
3,27
3,25
-25 -15 -5
5
15
25
35
45
55
65
75
85
3,95
3,90
3,85
3,80
3,75
3,70
3,65
3,60
3,55
3,50
-25 -15
95 105 115 125
PI-013-190101
Feedback Resistance R FB [kOhm]
3,45
-5
5
Junction Temperature [°C]
Frequency Ratio fOSC3 / fOSC4 vs. Tj
Figure 38
Soft-Start Resistance R Soft-Start [kOhm]
0,730
0,728
0,724
0,722
PI-011-190101
Max. Duty Cycle
0,726
0,720
0,718
0,716
0,714
0,712
0,710
-25 -15
-5
5
15
25
35
45
55
65
75
85
95 105 115 125
65
75
85
95 105 115 125
54
52
50
48
46
44
42
40
-25 -15
-5
5
15
25
35
45
55
65
75
85
95
105 115 125
Junction Temperature [°C]
Figure 39
4,84
3,68
4,83
Detection Limit V FB2 [V]
4,85
3,67
3,66
3,65
3,64
3,63
3,62
3,61
Soft-Start Resistance RSoft-Start vs. Tj
4,82
4,81
PI-015-190101
Max. Duty Cycle vs. Tj
PI-012-190101
PWM-OP Gain AV
55
56
3,69
4,80
4,79
4,78
4,77
4,76
-5
5
15
25
35
45
55
65
75
85
4,75
-25 -15
95 105 115 125
Junction Temperature [°C]
Figure 37
45
58
3,70
3,60
-25 -15
35
Feedback Resistance RFB vs. Tj
Junction Temperature [°C]
Figure 36
25
PI-014-190101
Figure 35
15
Junction Temperature [°C]
5
15
25
35
45
55
65
75
85
95 105 115 125
Junction Temperature [°C]
PWM-OP Gain AV vs. Tj
Version 2.0
-5
Figure 40
21
Detection Limit VFB2 vs. Tj
1 Feb 2002
ICE2AS01/G
ICE2BS01/G
1,010
5,34
1,008
5,33
5,32
5,31
5,30
5,29
5,28
5,27
5,26
5,25
-25 -15
-5
5
15
25
35
45
55
65
75
85
1,006
1,004
1,002
1,000
0,998
0,996
0,994
0,992
0,990
-25 -15
95 105 115 125
PI-019-190101
Peak Current Limitation V csth [V]
5,35
PI-016-190101
Detection Limit V Soft-Start1 [V]
Typical Performance Characteristics
-5
5
Junction Temperature [°C]
Figure 44
280
4,04
270
Leading Edge Blanking t LEB [ns]
4,05
4,03
4,02
4,01
4,00
3,99
3,98
3,97
3,96
3,95
-25 -15
-5
5
15
25
35
45
55
65
75
45
55
65
75
85
95 105 115 125
85
250
240
230
220
210
200
190
180
-25 -15
95 105 115 125
Peak Current Limitation Vcsth vs. Tj
-5
5
15
25
35
45
55
65
75
85
95 105 115 125
Junction Temperature [°C]
Detection Limit VSoft-Start2 vs. Tj
Figure 45
Leading Edge Blanking VVCC1 vs. Tj
16,80
16,75
16,70
16,65
16,60
16,55
PI-018-190101
Overvoltage Detection Limit V VCC1 [V]
35
260
Junction Temperature [°C]
Figure 42
25
PI-020-190101
Detection Limit VSoft-Start1 vs. Tj
PI-017-190101
Detection Limit V Soft-Start2 [V]
Figure 41
15
Junction Temperature [°C]
16,50
16,45
16,40
16,35
16,30
16,25
16,20
-25 -15
-5
5
15
25
35
45
55
65
75
85
95 105 115 125
Junction Temperature [°C]
Figure 43
Overvoltage Detection Limit VVCC1 vs. Tj
Version 2.0
22
1 Feb 2002
Preliminary Specification
ICE2AS01/G
ICE2BS01/G
Outline Dimension
6
Outline Dimension
P-DSO-8-3
(Plastic Dual Small
Outline)
Figure 46
P-DIP-8-4
(Plastic Dual In-line
Package)
Figure 47
Dimensions in mm
Version 2.0
23
1 Feb 2002
Total Quality Management
Qualität hat für uns eine umfassende
Bedeutung. Wir wollen allen Ihren
Ansprüchen in der bestmöglichen
Weise gerecht werden. Es geht uns also
nicht nur um die Produktqualität –
unsere Anstrengungen gelten
gleichermaßen der Lieferqualität und
Logistik, dem Service und Support
sowie allen sonstigen Beratungs- und
Betreuungsleistungen.
Quality takes on an allencompassing
significance at Semiconductor Group.
For us it means living up to each and
every one of your demands in the best
possible way. So we are not only
concerned with product quality. We
direct our efforts equally at quality of
supply and logistics, service and
support, as well as all the other ways in
which we advise and attend to you.
Dazu gehört eine bestimmte
Geisteshaltung unserer Mitarbeiter.
Total Quality im Denken und Handeln
gegenüber Kollegen, Lieferanten und
Ihnen, unserem Kunden. Unsere
Leitlinie ist jede Aufgabe mit „Null
Fehlern“ zu lösen – in offener
Sichtweise auch über den eigenen
Arbeitsplatz hinaus – und uns ständig
zu verbessern.
Part of this is the very special attitude of
our staff. Total Quality in thought and
deed, towards co-workers, suppliers
and you, our customer. Our guideline is
“do everything with zero defects”, in an
open manner that is demonstrated
beyond your immediate workplace, and
to constantly improve.
Unternehmensweit orientieren wir uns
dabei auch an „top“ (Time Optimized
Processes), um Ihnen durch größere
Schnelligkeit den entscheidenden
Wettbewerbsvorsprung zu verschaffen.
Geben Sie uns die Chance, hohe
Leistung durch umfassende Qualität zu
beweisen.
Wir werden Sie überzeugen.
http://www.infineon.com
Published by Infineon Technologies AG
Throughout the corporation we also
think in terms of Time Optimized
Processes (top), greater speed on our
part to give you that decisive
competitive edge.
Give us the chance to prove the best of
performance through the best of quality
– you will be convinced.