NJU7325 Single-phase DC Brushless Motor Driver IC GENERAL DESCRIPTION PACKAGE OUTLINE The NJU7325 is a dual power amplifier designed for small actuator applications. It incorporates MOS-FET transistor in the output stage which can offer a low saturation output voltage in high current operation. The NJU7325 is available in small and thin surface mount packages MSOP8 (VSP8), MSOP8 (TVSP8) and ESON8-V1, which provides downsizing and thinning in motor applications. NJU7325KV1 (DFN8-V1(ESON8-V1)) NJU7325R (MSOP8(VSP8)) FEATURES • Single Supply • Operating Voltage • Low Operating Current • Low Saturation Output Voltage • CMOS Technology • Package Outline NJU7325RB1 (MSOP8(TVSP8)) VDD=2.4 to 5.5V Vsat=±0.35V @Io=±250mA MSOP8 (VSP8)*, MSOP8 (TVSP8)**, DFN8-V1(ESON8-V1) *MEET JEDEC MO-187-DA, **MEET JEDEC MO-187-DA / THIN TYPE BLOCK DIAGRAM 1 8 Ach - + 2 7 Bch + - 3 6 4 5 -1- NJU7325 ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL Supply Voltage VDD Input Voltage Vid Operating Temperature Topr Storage Temperature Tstg Power Dissipation PD (MSOP8(VSP8/TVSP8)) Power Dissipation PD (DFN8-V1(ESON8-V1)) (Ta=25°C) RATINGS +7 -0.3 to VDD+0.3 -40 to +85 -50 to +150 UNIT V V °C °C 400 mW NOTE Device itself 520 mW (*1)Mounted on 2-Layers Board 1100 mW (*2)Mounted on 4-Layers Board (*1): Mounted on glass epoxy board based on EIA/JEDEC. (101.5×114.5×1.6mm: 2-Layers) (*2): Mounted on glass epoxy board based on EIA/JEDEC. (101.5×114.5×1.6mm: 4-Layers Internal foil area: 99.5×99.5mm) ELECTRICAL CHARACTERISTICS PARAMETER SYMBOL Operating Voltage Range VDD Quiescent Current IDD TEST CONDITION No Load Condition, Voltage Follower, Vo=2.5V, per 1ch (VDD=5V, VSS=0V, f=1kHz, Ta=25°C) MIN. TYP. MAX. UNIT 2.4 5.0 5.5 V - 3.0 4.0 mA Input Offset Voltage VIO -15 +15 mV Input Offset Current IIO 10 pA Input Bias Current IIB 10 pA 12 Input Impedance RIN 10 Ω Input Common Mode VICM 0.4 to 4.0 V Voltage Range Maximum Output Voltage Io= +250mA 4.55 4.65 V VOM Range Io= -250mA 0.35 0.45 V Large Signal Voltage Gain AV 55 dB Common Mode Rejection 53 dB CMRR VICM=0.4 to 4.0V Ratio Supply Voltage Rejection 55 dB PSRR VDD=4.5 to 5.5V Ratio Unity Gain Bandwidth FT CL=10pF, Open Loop 1.5 MHz 1 V/us Slew Rate SR Voltage Follower, RL=16.5Ω (*3): Oscillation margin of NJU7325 will be narrow if the application features light load current and low gain. (ex. Voltage Follower). Maintain the value of stray capacitance at the output terminal with less than 100pF to prevent the oscillation. (*4): Place decoupling-capacitor near Vss and VDD pins. -2- NJU7325 PIN CONFIGURATION • MSOP8 (VSP8/TVSP8) 8 7 6 5 1: 2: 3: 4: 5: 6: 7: 8: 1 2 3 A OUTPUT A - INPUT A+ INPUT VSS B+ INPUT B - INPUT B OUTPUT VDD 4 Surface • DFN8-V1(ESON8-V1) 8 7 6 5 1 2 3 4 1: 2: 3: 4: 5: 6: 7: 8: 1 2 3 Surface 4 8 7 6 A OUTPUT A - INPUT A+ INPUT VSS B+ INPUT B - INPUT B OUTPUT VDD 5 Backside (*5): The PAD in the center part on the back is connected with the internal VDD, therefore it is open or connects to VDD. -3- NJU7325 APPLICATION CIRCUIT M VDD 1 8 Ach - + 2 7 Bch + - 3 6 4 5 VSS [CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. -4-