Rohm BD00GA3WEFJ-E2 1a secondary variable output ldo regulators for local power supply Datasheet

Secondary Variable Output LDO Regulator Series for Local Power Supplies
1A Secondary Variable Output
LDO Regulators for Local Power Supplies
BD00GC0WEFJ
No.10026EAT08
●Description
BD00GC0WEFJ is a LDO regulator with output current 1.0A. The output accuracy is ±1% of output voltage. With
external resistance, it is available to set the output voltage at random (from 1.5V to 13.0V) and also provides output
voltage fixed type without external resistance. It is used for the wide applications of digital appliances. It has package
type: HTSOP-J8. Over current protection (for protecting the IC destruction by output short circuit), circuit current
ON/OFF switch (for setting the circuit 0μA at shutdown mode), and thermal shutdown circuit (for protecting IC from heat
destruction by over load condition) are all built in. It is usable for ceramic capacitor and enables to improve smaller set
and long-life.
●Features
1) Output current 1.0A
2) High accuracy reference voltage circuit
3) Built-in Over Current Protection circuit (OCP)
4) Built-in Thermal Shut Down circuit (TSD)
5) With shut down switch
6) Output voltage variable type (1.5V to 13.0V)
7) Package: HTSOP-J8
●Output voltage differential Line up
Product name
BD00GC0WEFJ
Variable
○
Package
HTSOP-J8
Product name : BD00GC0WEFJ
a b c d
Signal
e
Description
Output voltage (V)
a
00
Variable
Voltage resistance(V)
b
E
F
G
24V
20V
15V
A1
A3
A5
0.1A
0.3A
0.5A
H
I
10V
7V
C0
C5
D0
1.0A
1.5A
2.0A
Output current (A)
c
Shutdown switch
d
e
“W”
Shutdown switch is built in
“ ”
Shutdown switch is not built in
Package
EFJ
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© 2010 ROHM Co., Ltd. All rights reserved.
HTSOP-J8
1/11
2010.04 - Rev.A
Technical Note
BD00GC0WEFJ
●Absolute Maximum Ratings (Ta=25℃)
Parameter
Power supply voltage
EN voltage
Output voltage
Feedback voltage
Power dissipation
HTSOP-J8
Operating Temperature Range
Storage Temperature Range
Junction Temperature
Symbol
Vcc
VEN
VOUT
VFB
Limits
15.0 *1
15.0
15.0
15.0
Unit
V
V
V
V
Pd*2
2110 *2
mW
Topr
Tstg
Tjmax
-25~+85
-55~+150
+150
℃
℃
℃
*1 Not to exceed Pd
*2 Reduced by 16.9mW/℃ for each increase in Ta of 1℃ over 25℃. (when mounted on a board 70mm×70mm×1.6mm glass-epoxy board, two layer)
●Operating conditions (Ta=25℃)
Parameter
Input power supply voltage
EN voltage
Output voltage setting range
Output current
Symbol
Vcc
VEN
Vo
Io
Min.
4.5
0.0
1.5
0.0
Max.
14.0
14.0
13.0
1.0
Unit
V
V
V
A
This product should not be used in a radioactive environment.
●Electrical Characteristics
(Unless otherwise noted, Ta=25℃, EN=3V, Vcc=6V, R1=43kΩ, R2=8.2kΩ)
Parameter
Symbol
Min.
Typ.
Max.
Circuit current at shutdown mode
Isd
0
5
Bias current
Icc
600
900
Line regulation
Reg.I
25
50
Load regulation
Reg Io
25
75
Minimun dropout Voltage
Vco
0.6
0.92
Output reference voltage
VFB
0.792
0.800
0.808
EN Low voltage
VEN (Low)
0
0.8
EN High voltage
VEN (High)
2.4
14.0
EN Bias current
IEN
1
3
9
Unit
μA
μA
mV
mV
V
V
V
V
μA
Conditions
EN=0V, OFF mode
Vcc=( Vo+0.92V )→14.0V
Io=0→1.0A
Vcc=5V,Io=1.0A
Io=0mA
●I/O Equivalent circuits
8pin(VCC) / 1pin(VO)
8pin(Vcc)
2pin(FB)
5pin(EN)
Vcc
2pin(FB)
Vcc
5pin(EN)
1pin(Vo)
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© 2010 ROHM Co., Ltd. All rights reserved.
2/11
2010.04 - Rev.A
Technical Note
BD00GC0WEFJ
●Reference Data (Unless otherwise noted, Ta=25℃, EN=3V, Vcc=6V, R1=43kΩ, R2=8.2kΩ)
EN
2V/div
Vo
Vo
50mV/div
50mV/div
Vcc
2V/div
Io
Io
1A/div
1A/div
Vo
2V/div
10usec/div
Fig.2 Transient Response
(1.0→0A)
Co=1μF
EN
2V/div
2V/div
2V/div
Vcc
Vcc
Vcc
2V/div
2V/div
2V/div
Vo
Vo
Vo
2V/div
2V/div
2V/div
40msec/div
40msec/div
1msec/div
Fig.4 OFF sequence 1
Co=1μF
Fig.6 OFF sequence 2
Co=1μF
Fig.5 Inpurt sequence 2
Co=1μF
5.2
1.0
800
0.8
5.1
5.0
4.9
Icc [uA]
700
Ic c [u A]
Vo [V]
Fig.3 Input sequence 1
Co=1μF
EN
EN
600
500
85
4.8
-25
0
25
50
400
75
0.6
0.4
0.2
-25
0
Ta [℃]
25
50
75
0.0
85
-25
0
Ta [℃]
8.0
5.2
6.0
5.1
25
50
75
85
Ta [℃]
Fig.8 Ta-Icc
Fig.7 Ta-Vo (Io=0mA)
Fig.9 Ta-Isd
(VEN=0V)
5.0
4.0
4.0
Isd [μA]
3.0
Vo [V]
Ien [μA]
1msec/div
10usec/div
Fig.1 Transient Response
(0→1.0A)
Co=1μF
5.0
2.0
4.9
2.0
1.0
4.8
0.0
-25
0
25
50
75
85
0
0.2
0.4
0.6
Ta [℃]
Io [A]
Fig.10 Ta-IEN
Fig.11 Io-Vo
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3/11
0.8
1
0.0
0
3
6
9
12
Vcc [V]
Fig.12 Vcc-Isd
(VEN=0V)
2010.04 - Rev.A
14
Technical Note
BD00GC0WEFJ
●Reference Data
6
6.0
6
5
4
Vo [V]
Vo [V]
Vo 〔V〕
4.0
4
2
3
2
2.0
1
0
0
3
6
9
12
0
0.0
14
100
120
140
160
180
Vcc [V]
Ta [℃]
Fig.13 Vcc-Vo (Io=0mA)
Fig.14 TSD (Io=0mA)
0.7
0
200
0.5
1
1.5
2
2.5
0.8
1
0.8
1
Io 〔A〕
Fig.15 OCP
900
10.00
800
0.6
Safety Area
Icc [μA]
0.5
ESR [Ω]
Vdrop [V]
1.00
]
700
600
0.10
0.4
500
0.3
-25
0
25
50
75
0.01
85
0
0.2
0.4
Ta [℃]
0.6
0.8
400
1
0
0.2
0.4
Io [A]
Fig.17 ESR condencer
Fig.19 ESR コンデンサ
Fig.16 Minimum dropout Voltage 1
(Vcc=5V、Io=-1.0A)
100
0.6
Io [A]
Fig.18 Io-Icc
0.6
0.6
0.5
0.5
0.4
0.4
40
20
0
0.3
1
10
0.3
0.2
0.2
0.1
0.1
0
0
0.1
0
100
0.2
0.4
0.6
0.8
1
0
Io[A]
Frequency[KHz]
周波数 [kHz]
Fig.20 Minimum dropout Voltage 2
(Vcc=4.5V、Ta=25℃)
0.5
0.5
0.5
0.4
0.4
0.4
0.3
Vdrop[V]
0.6
Vdrop[V]
0.6
0.3
0.2
0.2
0.1
0.1
0.1
0
0
0.4
0.6
0.6
0.3
0.2
0.2
0.4
Fig.21 Minimum dropout Voltage 3
(Vcc=6V、Ta=25℃)
0.6
0
0.2
Io[A]
Fig.19 PSRR(Io=0mA)
Vdrop[V]
Vdrop[V]
60
Vdrop[V]
PSRR [dB]
80
0.8
1
0
0.2
0.4
0.6
0.8
Io[A]
Io[A]
Fig.22 Minimum dropout Voltage 4
(Vcc=8V、Ta=25℃)
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© 2010 ROHM Co., Ltd. All rights reserved.
1
0
0
0.2
0.4
0.6
0.8
Io[A]
Fig.23 Minimum dropout Voltage 5
(Vcc=10V、Ta=25℃)
4/11
Fig.24 Minimum dropout Voltage 6
(Vcc=12V、Ta=25℃)
2010.04 - Rev.A
1
Technical Note
BD00GC0WEFJ
●Heat Dissipation Characteristics
◎HTSOP-J8
Measure condition: mounted on a ROHM board, and IC
Power許容損失:Pd
Dissipation :Pd
[W] [W]
4.0
⑤3.76W
Substrate size: 70mm × 70mm × 1.6mm
(Substrate with thermal via)
・Solder the substrate and package reverse exposure heat
radiation part
3.0
④2.11W
2.0
③1.10W
②0.82W
①0.50W
1.0
0
0
25
50
75
100
125
150
周囲温度:Ta [℃]
Ambient Temperature :Ta [℃]
① IC only
θj-a=249.5℃/W
② 1-layer(copper foil are :0mm×0mm)
θj-a=153.2℃/W
③ 2-layer(copper foil are :15mm×15mm)
θj-a=113.6℃/W
④ 2-layer(copper foil are :70mm×70mm)
θj-a=59.2℃/W
⑤ 4-layer(copper foil are :70mm×70mm)
θj-a=33.3℃/W
●About Input-to-output capacitor
It is recommended that a capacitor is placed nearby pin between Input pin and GND, output pin and GND.
A capacitor, between input pin and GND, is valid when the power supply impedance is high or drawing is long. Also as for a
capacitor, between output pin and GND, the greater the capacity, more sustainable the line regulation and it makes improvement
of characteristics by load change. However, please check by mounted on a board for the actual application. Ceramic capacitor
usually has difference, thermal characteristics and series bias characteristics, and moreover capacity decreases gradually by
using conditions.
For more detail, please be sure to inquire the manufacturer, and select the best ceramic capacitor.
Ceramic capacitor capacity- DC bias characteristics
(Characteristics example)
10 Voltage resistance
B1 characteristics
GRM188B11A105KA61D
10
0
10 Voltage resistance
-10
B characteristics
6.3 Voltage resistance
Capacitance Change [%]
B characteristics
-20
-30
10 Voltage resistance
F characteristics
-40
-50
4 Voltage resistance
-60
X6S characteristics
10 Voltage Resistance
F characteristics
-70
-80
-90
-100
0
1
2
3
4
DC Bias Voltage [V]
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© 2010 ROHM Co., Ltd. All rights reserved.
5/11
2010.04 - Rev.A
Technical Note
BD00GC0WEFJ
●Heat Loss
Thermal design should allow operation within the following conditions. Note that the temperatures listed are the allowed
temperature limits, and thermal design should allow sufficient margin from the limits.
1. Ambient temperature Ta can be no higher than 85℃.
2. Chip junction temperature (Tj) can be no higher than 150℃.
Chip junction temperature can be determined as follows:
① Calculation based on ambient temperature (Ta)
Tj=Ta+θj-a×W
<Reference values>
θj-a: HTSOP-J8 153.2℃/W 1-layer substrate (copper foil density 0mm×0mm)
113.6℃/W 2-layer substrate (copper foil density 15mm×15mm)
59.2℃/W 2-layer substrate (copper foil density 70mm×70mm)
4-layer substrate (copper foil density 70mm×70mm)
33.3℃/W
3
Substrate size: 70×70×1.6mm (substrate with thermal via)
Most of the heat loss that occurs in the BD00GC0WEFJ is generated from the output Pch FET. Power loss is determined by
the total Vcc-Vo voltage and output current. Be sure to confirm the system input and output voltage and the output current
conditions in relation to the heat dissipation characteristics of the VIN and Vo in the design. Bearing in mind that heat
dissipation may vary substantially depending on the substrate employed (due to the power package incorporated in the
BD00GC0WEFJ make certain to factor conditions such as substrate size into the thermal design.
Power consumption (W) =
Input voltage (VCC)- Output voltage (Vo) ×Io(Ave)
Example) Where VCC=5.0V, VO=3.3V, Io(Ave) = 0.1A,
Power consumption (W) = 5.0(V)-3.3(V) ×0.1(A)
=0.17(W)
●About equivalent series resistance ESR (ceramic capacitor etc.)
Capacity-Bias characteristics
100
ESR [Ω]
Capacitor usually has ESR(Equivalent Series Resistance), and
operates stable in ESR-OUT range, showed right. Generally, ESR of
ceramic, tantalum and electronic capacitor etc. is different for each,
so please be sure to check a capacitor which is going to use, and use
it inside the stable range, showed right. Then, please evaluate for the
actual application.
10
1
0.1
0.01
0
50
100
150
200
IOUT [mA]
Stable area characteristics
(Characteristics example)
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© 2010 ROHM Co., Ltd. All rights reserved.
6/11
2010.04 - Rev.A
Technical Note
BD00GC0WEFJ
●
Block Diagram
BD00GC0WEFJ
(VO+0.92)~14.0V
GND
VCC
Ceramic ≧ 1μF
Capacitor
OCP
SOFT
1.5V~13.0V
VO
R1
EN
FB
TSD
Ceramic ≧ 1μF
Capacitor
R2
●Pin number ・ Pin name
Pin No.
1
2
3
4
5
6
7
8
Reverse
Pin name
VOUT
FB
GND
N.C.
EN
N.C.
N.C.
VCC
FIN
Pin Function
Output voltage pin
Feedback pin
GND pin
Non Connection
Enable pin
Non Connection
Non Connection
Input voltage pin
Substrate(GND pin)
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7/11
2010.04 - Rev.A
Technical Note
BD00GC0WEFJ
●Evaluation Board Circuit
C7
1
C6
C3
8
C2
R1
C9
2
C5
C4
FB
N.C
7
N.C
6
C1
R2
C10
3
R5
GND
U2
VCC
VOUT
GND
U1
R6
4
C8
R4
SW1
5
N.C.
EN
EN
VOUT
R3
Gate
●Evaluation Board Parts List
Designation
Value
Part No.
Company
Designation
Value
Part No.
Company
R1
R2
R3
R4
R5
R6
C1
C2
C3
43kΩ
8.2kΩ
‐
‐
‐
‐
1uF
‐
‐
MCR01PZPZF4302
MCR01PZPZF8201
‐
‐
‐
‐
CM105B105K16A
‐
‐
ROHM
ROHM
‐
‐
‐
‐
KYOCERA
C4
C5
C6
C7
C8
C9
C10
U1
U2
‐
1uF
‐
CM105B105K16A
‐
KYOCERA
‐
‐
‐
‐
‐
‐
‐
‐
‐
‐
BD00GC0WEFJ
‐
‐
‐
‐
‐
ROHM
‐
●About Board Layout
EN
GND
Cin
VCC (Vi n)
R2
R1
Co
VO
・Input capacitor Cin of VCC (Vin) should be placed very close to VCC(Vin) pin as possible, and used broad wiring pattern.
Output capacitor Co also should be placed close to IC pin as possible. In case connected to inner layer GND plane, please
use several through hole.
・VFB pin has comparatively high impedance, and is apt to be effected by noise, so floating capacity should be minimum as
possible. Please be careful in wiring drawing
・Please take GND pattern space widely, and design layout to be able to increase radiation efficiency.
・For output voltage setting
Output voltage can be set by FB pin voltage(0.800V typ.)and external resistance R1, R2.
VO = VFB×
R1+R2
R2
(The use of resistors with R1+R2=5k to 90k is recommended)
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8/11
2010.04 - Rev.A
Technical Note
BD00GC0WEFJ
●Operation Notes
(1). Absolute maximum ratings
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can
break down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any
over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as
fuses.
(2). Connecting the power supply connector backward
Connecting of the power supply in reverse polarity can damage IC. Take precautions when connecting the power supply
lines. An external direction diode can be added.
(3). Power supply lines
Design PCB layout pattern to provide low impedance GND and supply lines. To obtain a low noise ground and supply line,
separate the ground section and supply lines of the digital and analog blocks. Furthermore, for all power supply terminals to
ICs, connect a capacitor between the power supply and the GND terminal. When applying electrolytic capacitors in the
circuit, not that capacitance characteristic values are reduced at low temperatures.
(4). GND voltage
The potential of GND pin must be minimum potential in all operating conditions.
(5). Thermal design
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.
(6). Inter-pin shorts and mounting errors
Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any
connection error or if pins are shorted together.
(7). Actions in strong electromagnetic field
Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to
malfunction.
(8). ASO
When using the IC, set the output transistor so that it does not exceed absolute maximum ratings or ASO.
(9). Thermal shutdown circuit
The IC incorporates a built-in thermal shutdown circuit (TSD circuit). The thermal shutdown circuit (TSD circuit) is designed
only to shut the IC off to prevent thermal runaway. It is not designed to protect the IC or guarantee its operation. Do not
continue to use the IC after operating this circuit or use the IC in an environment where the operation of this circuit is
assumed.
BD00GC0WEFJ
TSD ON Temperature[℃] (typ.)
175
Hysteresis Temperature [℃]
15
(typ.)
(10). Testing on application boards
When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress.
Always discharge capacitors after each process or step. Always turn the IC’s power supply off before connecting it to or
removing it from a jig or fixture during the inspection process. Ground the IC during assembly steps as an antistatic
measure. Use similar precaution when transporting or storing the IC.
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9/11
2010.04 - Rev.A
Technical Note
BD00GC0WEFJ
(11). Regarding input pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated.
P-N junctions are formed at the intersection of these P layers with the N layers of other elements, creating a parasitic diode or
transistor. For example, the relation between each potential is as follows:
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes can occur inevitable in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Accordingly, methods by which parasitic diodes
operate, such as applying a voltage that is lower than the GND (P substrate) voltage to an input pin, should not be
used.
Resistor
Transistor (NPN)
Pin A
Pin B
C
Pin B
B
E
Pin A
N
P+
N
P+
P
N
N
P substrate
Parasitic element
GND
Parasitic
element
P+
B
N
P+
P
N
C
E
P substrate
Parasitic element
GND
GND
GND
Parasitic
element
Other adjacent elements
(12). Ground Wiring Pattern.
When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns, placing
a single ground point at the ground potential of application so that the pattern wiring resistance and voltage variations
caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the GND
wiring pattern of any external components, either.
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10/11
2010.04 - Rev.A
Technical Note
BD00GC0WEFJ
●Type Designations (Ordering Information)
B D
0
0
G
C
ROHM
Output voltage Voltage
resistance
Part Number 00 : Variable
E:24V
F:20V
G:15V
H:10V
I:7V
0
W
E
J
Package
EFJ :HTSOP-J8
Shutdown switch
“W”:Built in
“ ”:None
Output cuurent
A1:0.1A
A3:0.3A
A5:0.5A
C0:1.0A
C5:1.5A
D0:2.0A
F
-
E
2
Packaging
specifications
E2:Emboss tape reel
HTSOP-J8
<Tape and Reel information>
+6°
4°
−4°
(2.4)
3.9±0.1
6.0±0.2
8 7 6 5
1
1.05±0.2
(3.2)
0.65±0.15
4.9±0.1
(MAX 5.25 include BURR)
Tape
Embossed carrier tape
Quantity
2500pcs
Direction
of feed
E2
The direction is the 1pin of product is at the upper left when you hold
( reel on the left hand and you pull out the tape on the right hand
)
2 3 4
1PIN MARK
+0.05
0.17 -0.03
1.0MAX
0.545
S
0.08±0.08
0.85±0.05
1.27
+0.05
0.42 -0.04
0.08
M
0.08 S
1pin
Reel
(Unit : mm)
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© 2010 ROHM Co., Ltd. All rights reserved.
11/11
Direction of feed
∗ Order quantity needs to be multiple of the minimum quantity.
2010.04 - Rev.A
Notice
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the
consent of ROHM Co.,Ltd.
The content specified herein is subject to change for improvement without notice.
The content specified herein is for the purpose of introducing ROHM's products (hereinafter
"Products"). If you wish to use any such Product, please be sure to refer to the specifications,
which can be obtained from ROHM upon request.
Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document.
However, should you incur any damage arising from any inaccuracy or misprint of such
information, ROHM shall bear no responsibility for such damage.
The technical information specified herein is intended only to show the typical functions of and
examples of application circuits for the Products. ROHM does not grant you, explicitly or
implicitly, any license to use or exercise intellectual property or other rights held by ROHM and
other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the
use of such technical information.
The Products specified in this document are intended to be used with general-use electronic
equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices).
The Products specified in this document are not designed to be radiation tolerant.
While ROHM always makes efforts to enhance the quality and reliability of its Products, a
Product may fail or malfunction for a variety of reasons.
Please be sure to implement in your equipment using the Products safety measures to guard
against the possibility of physical injury, fire or any other damage caused in the event of the
failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM
shall bear no responsibility whatsoever for your use of any Product outside of the prescribed
scope or not in accordance with the instruction manual.
The Products are not designed or manufactured to be used with any equipment, device or
system which requires an extremely high level of reliability the failure or malfunction of which
may result in a direct threat to human life or create a risk of human injury (such as a medical
instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuelcontroller or other safety device). ROHM shall bear no responsibility in any way for use of any
of the Products for the above special purposes. If a Product is intended to be used for any
such special purpose, please contact a ROHM sales representative before purchasing.
If you intend to export or ship overseas any Product or technology specified herein that may
be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to
obtain a license or permit under the Law.
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More detail product informations and catalogs are available, please contact us.
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© 2010 ROHM Co., Ltd. All rights reserved.
R1010A
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