Elantec EL5221CW-T13 Dual 12mhz rail-to-rail input-output buffer Datasheet

Dual 12MHz Rail-to-Rail Input-Output Buffer
Features
General Description
•
•
•
•
The EL5221C is a dual, low power, high voltage rail-to-rail input-output buffer. Operating on supplies ranging from 5V to 15V, while
consuming only 500µA per channel, the EL5221C has a bandwidth of
12MHz (-3dB). The EL5221C also provides rail-to-rail input and output ability, giving the maximum dynamic range at any supply voltage.
Applications
The EL5221C also features fast slewing and settling times, as well as
a high output drive capability of 30mA (sink and source). These features make the EL5221C ideal for use as voltage reference buffers in
Thin Film Transistor Liquid Crystal Displays (TFT-LCD). Other
applications include battery power, portable devices, and anywhere
low power consumption is important.
12MHz -3dB bandwidth
Unity gain buffer
Supply voltage = 4.5V to 16.5V
Low supply current (per buffer) =
500µA
• High slew rate = 10V/µs
• Rail-to-rail operation
•
•
•
•
•
•
•
•
•
•
TFT-LCD drive circuits
Electronics notebooks
Electronics games
Personal communication devices
Personal Digital Assistants (PDA)
Portable instrumentation
Wireless LANs
Office automation
Active filters
ADC/DAC buffer
EL5221C
EL5221C
The EL5221C is available in space-saving SOT23-6 and MSOP-8
packages and operates over a temperature range of -40°C to +85°C.
Connection Diagrams
Ordering Information
Package
Tape & Reel
Outline #
EL5221CW-T7
Part No.
SOT23-6
7”
MDP0038
EL5221CW-T13
SOT23-6
13”
MDP0038
EL5221CY-T7
MSOP-8
7”
MDP0043
EL5221CY-T13
MSOP-8
13”
MDP0043
6 VOUTA
VINA 1
5 VS+
VS- 2
4 VOUTB
VINB 3
SOT23-6
VOUTA 1
8 VS+
7 VOUTB
VINA 3
6 NC
VS- 4
5 VINB
MSOP-8
Note: All information contained in this data sheet has been carefully checked and is believed to be accurate as of the date of publication; however, this data sheet cannot be a “controlled document”. Current revisions, if any, to these
specifications are maintained at the factory and are available upon your request. We recommend checking the revision level before finalization of your design documentation.
© 2000 Elantec Semiconductor, Inc.
November 7, 2000
NC 2
EL5221C
EL5221C
Dual 12MHz Rail-to-Rail Input-Output Buffer
Absolute Maximum Ratings (T
A
= 25°C)
Values beyond absolute maximum ratings can cause the device to be prematurely damaged. Absolute maximum ratings are stress ratings only and
functional device operation is not implied
+18V
Supply Voltage between VS+ and VSInput Voltage
VS- - 0.5V, VS+ +0.5V
Maximum Continuous Output Current
30mA
Maximum Die Temperature
Storage Temperature
Operating Temperature
Power Dissipation
ESD Voltage
+125°C
-65°C to +150°C
-40°C to +85°C
See Curves
2kV
Important Note:
All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the
specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Characteristics
VS+ = +5V, VS- = -5V, RL = 10kΩ and CL = 10pF to 0V, TA = 25°C unless otherwise specified.
Parameter
Description
Condition
Min
Typ
Max
12
Unit
Input Characteristics
VOS
Input Offset Voltage
VCM = 0V
2
TCVOS
Average Offset Voltage Drift
[1]
5
VCM = 0V
2
IB
Input Bias Current
RIN
Input Impedance
CIN
Input Capacitance
AV
Voltage Gain
50
1
0.995
nA
GΩ
1.35
-4.5V ≤ VOUT ≤ 4.5V
mV
µV/°C
pF
1.005
V/V
-4.85
V
Output Characteristics
VOL
Output Swing Low
IL = -5mA
VOH
Output Swing High
IL = 5mA
ISC
Short Circuit Current
Short to GND
-4.92
4.85
4.92
V
±120
mA
Power Supply Performance
PSRR
Power Supply Rejection Ratio
VS is moved from ±2.25V to ±7.75V
IS
Supply Current (Per Buffer)
No Load
60
80
500
dB
750
µA
Dynamic Performance
SR
Slew Rate [2]
-4.0V ≤ VOUT ≤ 4.0V, 20% to 80%
tS
Settling to +0.1%
VO=2V Step
500
ns
BW
-3dB Bandwidth
RL = 10kΩ, CL = 10pF
12
MHz
CS
Channel Separation
f = 5MHz
75
dB
1. Measured over the operating temperature range
2. Slew rate is measured on rising and falling edges
2
7
10
V/µs
Electrical Characteristics
VS+ = +5V, VS- = 0V, RL = 10kΩ and CL = 10pF to 2.5V, TA = 25°C unless otherwise specified.
Parameter
Description
Condition
Min
Typ
Max
10
Unit
Input Characteristics
VOS
Input Offset Voltage
VCM = 2.5V
2
TCVOS
Average Offset Voltage Drift
[1]
5
VCM = 2.5V
IB
Input Bias Current
RIN
Input Impedance
CIN
Input Capacitance
AV
Voltage Gain
2
50
1
0.995
nA
GΩ
1.35
0.5 ≤ VOUT ≤ 4.5V
mV
µV/°C
pF
1.005
V/V
150
mV
Output Characteristics
VOL
Output Swing Low
IL = -5mA
VOH
Output Swing High
IL = 5mA
ISC
Short Circuit Current
Short to GND
80
4.85
4.92
V
±120
mA
Power Supply Performance
PSRR
Power Supply Rejection Ratio
VS is moved from 4.5V to 15.5V
IS
Supply Current (Per Buffer)
No Load
60
80
500
dB
750
µA
Dynamic Performance
SR
Slew Rate [2]
1V ≤ VOUT ≤4V, 20% to 80%
tS
Settling to +0.1%
VO = 2V Step
500
ns
BW
-3dB Bandwidth
RL = 10 kΩ, CL = 10pF
12
MHz
CS
Channel Separation
f = 5MHz
75
dB
1. Measured over the operating temperature range
2. Slew rate is measured on rising and falling edges
3
7
10
V/µs
EL5221C
EL5221C
Dual 12MHz Rail-to-Rail Input-Output Buffer
EL5221C
EL5221C
Dual 12MHz Rail-to-Rail Input-Output Buffer
Electrical Characteristics
VS+ = +15V, VS- = 0V, RL = 10kΩ and CL = 10pF to 7.5V, TA = 25°C unless otherwise specified.
Parameter
Description
Condition
Min
Typ
Max
14
Unit
Input Characteristics
VOS
Input Offset Voltage
VCM = 7.5V
2
TCVOS
Average Offset Voltage Drift
[1]
5
VCM = 7.5V
IB
Input Bias Current
RIN
Input Impedance
CIN
Input Capacitance
AV
Voltage Gain
2
50
1
0.995
nA
GΩ
1.35
0.5 ≤ VOUT ≤ 14.5V
mV
µV/°C
pF
1.005
V/V
150
mV
Output Characteristics
VOL
Output Swing Low
IL = -5mA
VOH
Output Swing High
IL = 5mA
ISC
Short Circuit Current
Short to GND
80
14.85
14.92
V
±120
mA
Power Supply Performance
PSRR
Power Supply Rejection Ratio
VS is moved from 4.5V to 15.5V
IS
Supply Current (Per Buffer)
No Load
60
80
500
dB
750
µA
Dynamic Performance
SR
Slew Rate [2]
1V ≤ VOUT ≤14V, 20% to 80%
tS
Settling to +0.1%
VO = 2V Step
500
ns
BW
-3dB Bandwidth
RL = 10 kΩ, CL = 10pF
12
MHz
CS
Channel Separation
f = 5MHz
75
dB
1. Measured over the operating temperature range
2. Slew rate is measured on rising and falling edges
4
7
10
V/µs
Typical Performance Curves
Input Offset Voltage Distribution
Input Offset Voltage Drift
35
2000
VS=±5V
TA=25°C
Typical
Production
Distribution
1600
VS=±5V
TA=25°C
30
Typical
Production
Distribution
Quantity (Buffers)
Quantity (Buffers)
25
1200
800
20
15
10
400
5
Input Offset Voltage vs Temperature
19
17
15
13
9
11
7
Input Bias Current vs Temperature
10
4
5
2
VS=±5V
Input Bias Current (nA)
Input Offset Voltage (mV)
5
1
12
8
10
4
2
0
-2
-4
-6
-8
-10
-12
6
Input Offset Voltage, TCVOS (µ V/°C)
Input Offset Voltage (mV)
0
-5
-10
-50
0
50
Temperature (°C)
100
VS=±5V
0
-2
-4
-50
150
0
50
100
150
Temperature (°C)
Output Low Voltage vs Temperature
Output High Voltage vs Temperature
-4.91
4.97
-4.92
VS=±5V
IOUT=5mA
4.96
Output Low Voltage (V)
Output High Voltage (V)
3
0
0
4.95
4.94
VS=±5V
IOUT=-5mA
-4.93
-4.94
-4.95
-4.96
4.93
-50
0
50
100
-4.97
-50
150
Temperature (°C)
5
0
50
Temperature (°C)
100
150
EL5221C
EL5221C
Dual 12MHz Rail-to-Rail Input-Output Buffer
Dual 12MHz Rail-to-Rail Input-Output Buffer
Typical Performance Curves
Slew Rate vs Temperature
Voltage Gain vs Temperature
1.001
13
12.5
VS=±5V
VS=±5V
Slew Rate (V/µ S)
Voltage Gain (V/V)
1.0005
1.0000
12
11.5
11
0.9995
10.5
0.999
-50
0
50
100
10
-50
150
0
50
Temperature (°C)
Supply Current per Channel vs Temperature
Supply Current per Channel vs Supply Voltage
650
VS=±5V
550
Supply Current (µ A)
Supply Current (mA)
150
100
Temperature (°C)
0.55
0.5
0.45
TA=25°C
450
350
0.4
-50
0
50
100
250
150
5
0
Temperature (°C)
20
15
20
0
Magnitude (Normalized) (dB)
10kΩ
-5
10
Supply Voltage (V)
Frequency Response for Various CL
Frequency Response for Various RL
5
Magnitude (Normalized) (dB)
EL5221C
EL5221C
1kΩ
560Ω
CL=10pF
VS=±5V
150Ω
-10
10
RL=10kΩ
VS=±5V
12pF
0
50pF
-10
100pF
-20
1000pF
-15
100k
1M
10M
-30
100k
100M
Frequency (Hz)
1M
10M
Frequency (Hz)
6
100M
Typical Performance Curves
Output Impedance vs Frequency
Maximum Output Swing vs Frequency
200
12
Output Impedance (Ω)
Maximum Output Swing (VP-P)
VS=±5V
TA=25°C
160
120
80
40
10
8
VS=±5V
TA=25°C
RL=10kΩ
CL=12pF
Distortion <1%
6
4
2
0
10k
100k
1M
0
10k
10M
100k
Frequency (Hz)
PSRR vs Frequency
80
Input Voltage Noise Spectral Density vs Frequency
PSRRVoltage Noise (nV√Hz)
PSRR (dB)
10M
600
PSRR+
60
40
VS=±5V
TA=25°C
20
0
100
1k
10k
100k
Frequency (Hz)
1M
100
10
1
100
10M
Total Harmonic Distortion + Noise vs Frequency
1k
10k
1M
100k
Frequency (Hz)
10M
100M
Channel Separation vs Frequency Response
0.010
-60
Dual measured Channel A to B
Quad measured Channel A to D or B to C
Other combinations yield improved rejection.
0.009
0.008
-80
0.007
X-Talk (dB)
THD+ N (%)
1M
Frequency (Hz)
0.006
0.005
VS=±5V
RL=10kΩ
VIN=1VRMS
0.004
0.003
-100
VS=±5V
RL=10kΩ
VIN=220mVRMS
-120
0.002
0.001
1k
10k
Frequency (Hz)
-140
1k
100k
10k
100k
Frequency (Hz)
7
1M
6M
EL5221C
EL5221C
Dual 12MHz Rail-to-Rail Input-Output Buffer
Dual 12MHz Rail-to-Rail Input-Output Buffer
Typical Performance Curves
Small-Signal Overshoot vs Load Capacitance
Settling Time vs Step Size
100
5
3
2
Step Size (V)
60
VS=±5V
RL=10kΩ
CL=12pF
TA=25°C
4
VS=±5V
RL=10kΩ
VIN=±50mV
TA=25°C
80
Overshoot (%)
EL5221C
EL5221C
40
0.1%
1
0
-1
-2
20
0.1%
-3
-4
0
-5
10
100
1000
0
200
Load Capacitance (pF)
Large Signal Transient Response
1V
400
Settling Time (nS)
600
Small Signal Transient Response
50mV
1µ S
VS=±5V
TA=25°C
RL=10kΩ
CL=12pF
8
200ns
VS=±5V
TA=25°C
RL=10kΩ
CL=12pF
800
Pin Descriptions
SOT23-6
MSOP-8
Pin
Name
1
3
VINA
Function
Equivalent Circuit
Buffer A Input
VS+
VSCircuit 1
2
4
VS -
Negative Supply Voltage
3
5
VINB
Buffer B Input
4
7
VOUTB
(Reference Circuit 1)
Buffer B Output
VS+
VSGND
Circuit 2
5
8
VS +
6
1
VOUTA
Positive Supply Voltage
Buffer A Output
(Reference Circuit 2)
9
EL5221C
EL5221C
Dual 12MHz Rail-to-Rail Input-Output Buffer
Dual 12MHz Rail-to-Rail Input-Output Buffer
Applications Information
Product Description
Short Circuit Current Limit
The EL5221C unity gain buffer is fabricated using a
high voltage CMOS process. It exhibits rail-to-rail input
and output capability and has low power consumption
(500µA per buffer). These features make the EL5221C
ideal for a wide range of general-purpose applications.
When driving a load of 10kΩ and 12pF, the EL5221C
has a -3dB bandwidth of 12MHz and exhibits 10V/µS
slew rate.
The EL5221C will limit the short circuit current to
±120mA if the output is directly shorted to the positive
or the negative supply. If an output is shorted indefinitely, the power dissipation could easily increase such
that the device may be damaged. Maximum reliability is
maintained if the output continuous current never
exceeds ±30mA. This limit is set by the design of the
internal metal interconnects.
Operating Voltage, Input, and Output
Output Phase Reversal
The EL5221C is specified with a single nominal supply
voltage from 5V to 15V or a split supply with its total
range from 5V to 15V. Correct operation is guaranteed
for a supply range of 4.5V to 16.5V. Most EL5221C
specifications are stable over both the full supply range
and operating temperatures of -40°C to +85°C. Parameter variations with operating voltage and/or temperature
are shown in the typical performance curves.
The EL5221C is immune to phase reversal as long as the
input voltage is limited from VS- -0.5V to VS+ +0.5V.
Figure 2 shows a photo of the output of the device with
the input voltage driven beyond the supply rails.
Although the device's output will not change phase, the
input's overvoltage should be avoided. If an input voltage exceeds supply voltage by more than 0.6V,
electrostatic protection diodes placed in the input stage
of the device begin to conduct and overvoltage damage
could occur.
The output swings of the EL5221C typically extend to
within 80mV of positive and negative supply rails with
load currents of 5mA. Decreasing load currents will
extend the output voltage range even closer to the supply
rails. Figure 1 shows the input and output waveforms for
the device. Operation is from ±5V supply with a 10kΩ
load connected to GND. The input is a 10VP-P sinusoid.
The output voltage is approximately 9.985VP-P.
5V
1V
10µ S
VS=±2.5V
TA=25°C
VIN=6VP-P
10µ S
5V
Input
1V
VS=±5V
TA=25°C
VIN=10VP-P
Figure 2. Operation with Beyond-the-Rails
Input
Output
EL5221C
EL5221C
Power Dissipation
With the high-output drive capability of the EL5221C
buffer, it is possible to exceed the 125°C 'absolute-maximum junction temperature' under certain load current
conditions. Therefore, it is important to calculate the
maximum junction temperature for the application to
Figure 1. Operation with Rail-to-Rail Input and
Output
10
determine if load conditions need to be modified for the
buffer to remain in the safe operating area.
the device’s power derating curves. To ensure proper
operation, it is important to observe the recommended
derating curves shown in Figure 3 and Figure 4.
The maximum power dissipation allowed in a package is
determined according to:
Package Mounted on a JEDEC JESD51-7 High
Effective Thermal Conductivity Test Board
T JM AX – T A MA X
P D MAX = -------------------------------------------Θ JA
1
870mW
MAX TJ=125°C
0.8
Power Dissipation (W)
where:
TJMAX = Maximum Junction Temperature
TAMAX= Maximum Ambient Temperature
ΘJA = Thermal Resistance of the Package
MS
OP
-8
0.6
435mW
0.4
SO
T23
-6 2
30°
C/W
0.2
PDMAX = Maximum Power Dissipation in the
Package
11
5°
C/
W
0
0
The maximum power dissipation actually produced by
an IC is the total quiescent supply current times the total
power supply voltage, plus the power in the IC due to the
loads, or:
25
50
75 85 100
Ambient Temperature (°C)
125
150
Figure 3. Package Power Dissipation vs
Ambient Temperature
P D MAX = Σi [ V S × I SMA X + ( V S + – V OU T i ) × I L OA D i ]
when sourcing, and
Package Mounted on a JEDEC JESD51-3 Low
Effective Thermal Conductivity Test Board
0.6
P D MA X = Σi [ V S × I SM AX + ( V OU T i – V S - ) × I L OA D i ]
Power Dissipation (W)
when sinking.
where:
i = 1 to 2 for Dual Buffer
VS = Total Supply Voltage
MAX TJ=125°C
486mW
0.5
391mW
0.4
MS
OP
-8
2
SO
T2
3-6
25
6°
C
0.3
0.2
06
°C
/W
/W
0.1
ISMAX = Maximum Supply Current Per Channel
0
VOUTi = Maximum Output Voltage of the
Application
0
25
50
75 85
100
125
150
Ambient Temperature (°C)
ILOADi = Load Current
Figure 4. Package Power Dissipation vs
Ambient Temperature
If we set the two PDMAX equations equal to each other,
we can solve for RLOADi to avoid device overheat. Figure 3 and Figure 4 provide a convenient way to see if the
device will overheat. The maximum safe power dissipation can be found graphically, based on the package type
and the ambient temperature. By using the previous
equation, it is a simple matter to see if PDMAX exceeds
Unused Buffers
It is recommended that any unused buffer have the input
tied to the ground plane.
11
EL5221C
EL5221C
Dual 12MHz Rail-to-Rail Input-Output Buffer
EL5221C
EL5221C
Dual 12MHz Rail-to-Rail Input-Output Buffer
Driving Capacitive Loads
Power Supply Bypassing and Printed Circuit
Board Layout
The EL5221C can drive a wide range of capacitive
loads. As load capacitance increases, however, the -3dB
bandwidth of the device will decrease and the peaking
increase. The buffers drive 10pF loads in parallel with
10kΩ with just 1.5dB of peaking, and 100pF with 6.4dB
of peaking. If less peaking is desired in these applications, a small series resistor (usually between 5Ω and
50Ω) can be placed in series with the output. However,
this will obviously reduce the gain slightly. Another
method of reducing peaking is to add a "snubber" circuit
at the output. A snubber is a shunt load consisting of a
resistor in series with a capacitor. Values of 150Ω and
10nF are typical. The advantage of a snubber is that it
does not draw any DC load current or reduce the gain
The EL5221C can provide gain at high frequency. As
with any high frequency device, good printed circuit
board layout is necessary for optimum performance.
Ground plane construction is highly recommended, lead
lengths should be as short as possible, and the power
supply pins must be well bypassed to reduce the risk of
oscillation. For normal single supply operation, where
the VS - pin is connected to ground, a 0.1µF ceramic
capacitor should be placed from VS+ to pin to VS- pin. A
4.7µF tantalum capacitor should then be connected in
parallel, placed in the region of the buffer. One 4.7µF
capacitor may be used for multiple devices. This same
capacitor combination should be placed at each supply
pin to ground if split supplies are to be used.
12
EL5221C
EL5221C
Dual 12MHz Rail-to-Rail Input-Output Buffer
General Disclaimer
Specifications contained in this data sheet are in effect as of the publication date shown. Elantec, Inc. reserves the right to make changes in the circuitry or specifications contained herein at any time without notice. Elantec, Inc. assumes no responsibility for the use of any circuits described
herein and makes no representations that they are free from patent infringement.
November 7, 2000
WARNING - Life Support Policy
Elantec, Inc. products are not authorized for and should not be used
within Life Support Systems without the specific written consent of
Elantec, Inc. Life Support systems are equipment intended to support or sustain life and whose failure to perform when properly used
in accordance with instructions provided can be reasonably
expected to result in significant personal injury or death. Users contemplating application of Elantec, Inc. Products in Life Support
Systems are requested to contact Elantec, Inc. factory headquarters
to establish suitable terms & conditions for these applications. Elantec, Inc.’s warranty is limited to replacement of defective
components and does not cover injury to persons or property or
other consequential damages.
Elantec Semiconductor, Inc.
675 Trade Zone Blvd.
Milpitas, CA 95035
Telephone: (408) 945-1323
(888) ELANTEC
Fax:
(408) 945-9305
European Office: +44-118-977-6080
Japan Technical Center: +81-45-682-5820
13
Printed in U.S.A.
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