NLX1G97 Configurable Multifunction Gate The NLX1G97 MiniGatet is an advanced high−speed CMOS multifunction gate. The device allows the user to choose logic functions MUX, AND, OR, NAND, NOR, INVERT and BUFFER. The device has Schmitt−trigger inputs, thereby enhancing noise immunity. The NLX1G97 input and output structures provide protection when voltages up to 7.0 V are applied, regardless of the supply voltage. www.onsemi.com MARKING DIAGRAMS Features • • • • • • • High Speed: tPD = 3.3 ns (Typ) @ VCC = 5.0 V Low Power Dissipation: ICC = 1 mA (Maximum) at TA = 25°C Power Down Protection Provided on inputs Balanced Propagation Delays Overvoltage Tolerant (OVT) Input and Output Pins Ultra−Small Packages These are Pb−Free Devices UDFN6 1.0 x 1.0 CASE 517BX XM UDFN6 1.2 x 1.0 CASE 517AA XM UDFN6 1.45 x 1.0 CASE 517AQ XM 1 1 PIN ASSIGNMENTS 1 IN B 1 6 IN C GND 2 5 VCC IN A 3 4 OUT Y F M = Specific Device Code = Date Code ORDERING INFORMATION (Top View) © Semiconductor Components Industries, LLC, 2016 June, 2016 − Rev. 4 See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet. 1 Publication Order Number: NLX1G97/D NLX1G97 IN A OUT Y IN B IN C Figure 1. Function Diagram PIN ASSIGNMENT FUNCTION TABLE* 1 IN B Input Output 2 GND A B C Y 3 IN A L L L L 4 OUT Y L L H L 5 VCC L H L H 6 IN C L H H L H L L L H L H H H H L H H H H H *To select a logic function, please refer to “Logic Configurations section”. www.onsemi.com 2 NLX1G97 LOGIC CONFIGURATIONS VCC B B Y A A 1 6 2 5 3 4 VCC C A Y C Y A 1 6 2 5 3 4 C Y C Figure 2. 2−Input MUX Figure 3. 2−Input AND (When B = “L”) VCC VCC A C A 1 Y A 6 2 5 3 4 B C Y B C Y B Y 6 2 5 3 4 Figure 4. 2−Input OR with Input C Inverted (When B = “H”) C B Y 1 6 2 5 3 4 VCC C C Y Y Figure 6. 2−Input OR (When A =”H”) 1 6 2 5 3 4 C Y Figure 7. Inverter (When A = “L” and B = “H”) VCC B B Y Figure 5. 2−Input AND with Input C Inverted (When A = “L”) VCC B C Y C C 1 Y 1 6 2 5 3 4 Y Figure 8. Buffer (When A = C = “L”) www.onsemi.com 3 NLX1G97 MAXIMUM RATINGS Symbol Value Unit VCC DC Supply Voltage −0.5 to +7.0 V VIN DC Input Voltage −0.5 to +7.0 V DC Output Voltage −0.5 to +7.0 V VIN < GND −50 mA VOUT < GND −50 mA VOUT Parameter IIK DC Input Diode Current IOK DC Output Diode Current IO DC Output Source/Sink Current $50 mA ICC DC Supply Current Per Supply Pin $100 mA IGND DC Ground Current per Ground Pin $100 mA TSTG Storage Temperature Range −65 to +150 °C TL Lead Temperature, 1 mm from Case for 10 Seconds 260 °C TJ Junction Temperature Under Bias 150 °C MSL FR VESD ILATCHUP Moisture Sensitivity Level 1 Flammability Rating Oxygen Index: 28 to 34 ESD Withstand Voltage UL 94 V−0 @ 0.125 in Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) Latchup Performance Above VCC and Below GND at 125°C (Note 5) >2000 >200 N/A V $500 mA Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2 ounce copper trace no air flow. 2. Tested to EIA/JESD22−A114−A. 3. Tested to EIA/JESD22−A115−A. 4. Tested to JESD22−C101−A. 5. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit 1.65 5.5 V VCC Positive DC Supply Voltage VIN Digital Input Voltage 0 5.5 V Output Voltage 0 5.5 V −55 +125 °C 0 0 0 No Limit No LImit No Limit nS/V VOUT TA Operating Free−Air Temperature Dt/DV Input Transition Rise or Fall Rate VCC = 2.5 V $ 0.2 V VCC = 3.3 V $ 0.3 V VCC = 5.0 V $ 0.5 V Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. www.onsemi.com 4 NLX1G97 DC ELECTRICAL CHARACTERISTICS Symbol VT+ VT− VH VOH VOL Parameter Conditions Positive Threshold Voltage Negative Threshold Voltage Hysteresis Voltage Minimum High−Level Output Voltage Maximum Low−Level Output Voltage TA = 255C VCC (V) Min 1.65 0.79 1.16 2.3 1.11 3.0 4.5 5.5 Typ Max TA v +855C TA = −555C to +1255C Min Min Max Max Unit 1.16 1.16 V 1.56 1.56 1.56 1.5 1.87 1.87 1.87 2.16 2.74 2.74 2.74 2.61 3.33 3.33 3.33 1.65 0.35 0.62 0.35 0.35 2.3 0.58 0.87 0.58 0.58 3.0 0.84 1.19 0.84 0.84 4.5 1.41 1.9 1.41 1.41 5.5 1.78 2.29 1.78 1.78 1.65 0.30 0.62 0.30 0.62 0.30 0.62 2.3 0.40 0.8 0.40 0.8 0.40 0.8 3.0 0.53 0.87 0.53 0.87 0.53 0.87 4.5 0.71 1.04 0.71 1.04 0.71 1.04 1.2 0.8 1.2 0.8 1.2 5.5 0.8 1.65 − 5.5 VCC − 0.1 VCC − 0.1 VCC − 0.1 IOH = −4 mA 1.65 1.2 1.2 1.2 IOH = −8 mA 2.3 1.9 1.9 1.9 IOH = −16 mA 3.0 2.4 2.4 2.4 IOH = −24 mA 3.0 2.3 2.3 2.3 IOH = −32 mA 4.5 3.8 3.8 3.8 VIN = VT−MIN or VT+MAX IOH = −50 mA V V V VIN = VT−MIN or VT+MAX VIN = VT−MIN or VT+MAX IOL = 50 mA 1.65 − 5.5 0.1 0.1 0.1 IOL = 4 mA 1.65 0.45 0.45 0.45 IOL = 8 mA 2.3 0.3 0.3 0.3 IOL = 16 mA 3.0 0.4 0.4 0.4 IOL = 24 mA 3.0 0.55 0.55 0.55 IOL = 32 mA 4.5 0.55 0.55 0.55 V VIN = VT−MIN or VT+MAX IIN Input Leakage Current 0 v VIN v 5.5 V 0 to 5.5 $0.1 $1.0 $1.0 mA ICC Quiescent Supply Current VIN = VCC or GND 5.5 1.0 10 10 mA Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. www.onsemi.com 5 NLX1G97 AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns) TA = 255C Typ Max Min Max Min Max Unit 1.65 − 1.95 3.2 8.6 14.4 3.2 14.4 3.2 14.4 ns 2.3 − 2.7 2.0 5.1 8.3 2.0 8.3 2.0 8.3 3.0 − 3.6 1.5 3.9 6.3 1.5 6.3 1.5 6.3 4.5 − 5.5 1.1 3.3 5.1 1.1 5.1 1.1 5.1 Parameter VCC (V) tPLH, tPHL Propagation Delay, Any Input to Output Y (See Test Circuit) Input Capacitance CPD Power Dissipation Capacitance (Note 6) TA = −555C to +1255C Min Symbol CIN TA v +855C Test Condition 5.0 f = 10 MHz 3.5 pF 22 pF 6. CPD is defined as the value of the internal equivalent capacitance which is calculated from the dynamic operating current consumption without load. Average operating current can be obtained by the equation ICC(OPR) = CPD • VCC • fin + ICC. CPD is used to determine the no−load dynamic power consumption: PD = CPD • VCC2 • fin + ICC • VCC. TEST CIRCUIT AND VOLTAGE WAVEFORMS From Output Under Test VLOAD RL Test S1 tPLH/tPHL Open tPLZ/tPZL VLOAD tPHZ/tPZH GND Open GND CL * RL *CL includes probes and jig capacitance. Figure 9. Load Circuit Inputs VCC VI tr/tf VM VLOAD CL RL VD 1.8 V $ 0.15 V VCC v 2 ns VCC/2 2 x VCC 30 pF 1 kW 0.15 V 2.5 V $ 0.2 V VCC v 2 ns VCC/2 2 x VCC 30 pF 500 W 0.15 V 3.3 V $ 0.3 V 3V v 2.5 ns 1.5 V 6V 50 pF 500 W 0.3 V 5.5 V $ 0.5 V VCC v 2.5 ns VCC/2 2 x VCC 50 pF 500 W 0.3 V www.onsemi.com 6 NLX1G97 Timing Input tW Input VI VM 0V VI VM VM tsu 0V Data Input th VM VI VM 0V Figure 10. Voltage Waveforms Pulse Duration Figure 11. Voltage Waveforms Setup and Hold Times VI Input VM VM VM tPHL Output 0V tPHL tPLH Output Output Control VM Output Waveform 1 S1 at VLOAD (Note 7) VOH VOL tPLH VM VM VM VM 0V VM tPZH VOH Output Waveform 2 S1 at GND (Note 8) VOL Figure 12. Voltage Waveforms Propagation Delay Times Inverting and Noninverting Outputs VI VM VLOAD/2 VOL + VD VOL tPHZ VOH VOH − VD [0 V Figure 13. Voltage Waveforms Enable and Disable Times Low− and High−Level Enabling 7. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. 8. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control 9. All input pulses are supplied by generators having the following characteristics: PRR v 10 MHz, ZO = 50 W. 10. The outputs are measured one at a time, with one transition per measurement. 11. All parameters are waveforms are not applicable to all devices. ORDERING INFORMATION Package Shipping† NLX1G97MUTCG UDFN6, 1.2 x 1.0, 0.4P (Pb−Free) 3000 / Tape & Reel NLX1G97AMUTCG (In Development) UDFN6, 1.45 x 1.0, 0.5P (Pb−Free) 3000 / Tape & Reel NLX1G97CMUTCG (In Development) UDFN6, 1.0 x 1.0, 0.35P (Pb−Free) 3000 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 7 NLX1G97 PACKAGE DIMENSIONS UDFN6, 1.2x1.0, 0.4P CASE 517AA−01 ISSUE D EDGE OF PACKAGE PIN ONE REFERENCE 2X 0.10 C L1 ÉÉ ÉÉ E DETAIL A Bottom View (Optional) TOP VIEW 2X EXPOSED Cu 0.10 C (A3) 0.10 C A1 A 10X 0.08 C ÉÉÉ ÉÉÉ A3 DETAIL B Side View (Optional) 5X MILLIMETERS MIN MAX 0.45 0.55 0.00 0.05 0.127 REF 0.15 0.25 1.20 BSC 1.00 BSC 0.40 BSC 0.30 0.40 0.00 0.15 0.40 0.50 MOUNTING FOOTPRINT* 6X C A1 DIM A A1 A3 b D E e L L1 L2 MOLD CMPD SEATING PLANE SIDE VIEW 1 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 mm FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. A B D 6X 0.42 0.22 L 3 L2 6X b 0.10 C A B 0.05 C 6 4 0.40 PITCH e NOTE 3 1.07 DIMENSIONS: MILLIMETERS BOTTOM VIEW *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 8 NLX1G97 PACKAGE DIMENSIONS UDFN6 1.45x1.0, 0.5P CASE 517AQ ISSUE O A B D L L L1 PIN ONE REFERENCE 0.10 C ÉÉÉ ÉÉÉ DETAIL A E OPTIONAL CONSTRUCTIONS DETAIL B MOLD CMPD DETAIL B 0.05 C 6X DIM A A1 A2 b D E e L L1 ÉÉ ÉÉ EXPOSED Cu TOP VIEW 0.10 C NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM THE TERMINAL TIP. OPTIONAL CONSTRUCTIONS A MILLIMETERS MIN MAX 0.45 0.55 0.00 0.05 0.07 REF 0.20 0.30 1.45 BSC 1.00 BSC 0.50 BSC 0.30 0.40 −−− 0.15 MOUNTING FOOTPRINT 0.05 C A1 A2 SIDE VIEW e 6X C 6X SEATING PLANE L 1.24 3 1 DETAIL A 6X 0.53 6 0.30 PACKAGE OUTLINE 4 BOTTOM VIEW 6X 0.50 PITCH DIMENSIONS: MILLIMETERS b 0.10 C A B 0.05 C 1 NOTE 3 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 9 NLX1G97 PACKAGE DIMENSIONS UDFN6 1.0x1.0, 0.35P CASE 517BX ISSUE O PIN ONE REFERENCE NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.20 MM FROM TERMINAL TIP. 4. PACKAGE DIMENSIONS EXCLUSIVE OF BURRS AND MOLD FLASH. A B D ÉÉÉ ÉÉÉ ÉÉÉ E 0.10 C 2X 2X 0.10 C DIM A A1 A3 b D E e L L1 TOP VIEW A3 0.05 C A MILLIMETERS MIN MAX 0.45 0.55 0.00 0.05 0.13 REF 0.12 0.22 1.00 BSC 1.00 BSC 0.35 BSC 0.25 0.35 0.30 0.40 0.05 C SIDE VIEW A1 C RECOMMENDED SOLDERING FOOTPRINT* SEATING PLANE 5X e 5X 0.48 L 6X 0.22 3 1 L1 1.18 6 4 6X BOTTOM VIEW b 0.10 M C A B 0.05 M C 0.53 1 PKG OUTLINE NOTE 3 0.35 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. MiniGate is a trademark of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. 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