TECHNICAL NOTE Motor Driver IC Series for Printers DC Brush Motor Driver for Paper Feed or Carriage Use BA6920FP-Y, BA6219BFP-Y ●Description The BA6920FP-Y and BA6219BFP-Y are full-on drivers for motors with DC brushes. They operate in forward rotation mode, reverse rotation mode, stop (idling) mode, or brake mode, that are selectable according to the input logic (two inputs). The output voltage can be set through the output voltage setting pin. ●Features 1) Large output current. (BA6219BFP-Y) 2) Built-in thermal shutdown circuit 3) The output voltage can be set flexibly through the output voltage setting pin. 4) Built-in standby (stop) circuit. (BA6920FP-Y) ●Applications Devices that use DC brush motors, such as photo printers, scanners, mini printers, and fax machines. ●Absolute maximum ratings Parameter Limit Symbol Unit BA6219BFP-Y BA6920FP-Y VCC1, 2, 24 - V VM, VCC - 36 V Pd *1450 *1450 mW Topr -25~+75 -30~+85 ℃ Applied voltage Power dissipation Operating temperature range Tstg -55~+150 -55~+150 ℃ Output current IOmax 2200** 1000** mA Junction temperature Tjmax 150 150 ℃ Storage temperature range * Reduced by 11.6 mW/°C over 25°C, when mounted on a glass epoxy board (70 mm × 70 mm × 1.6 mm). ** Must not exceed Pd or ASO. 500μs pulses at a duty of 1/100. ●Operating conditions BA6219BFP-Y Parameter Symbol Operating voltage Unit Power supply voltage VCC1,2 8~18 V Symbol Operating voltage Unit VCC 6.5~34 V VM 6.5~34 V BA6920FP-Y Parameter Power supply voltage Ver.B Oct.2005 ●Electrical characteristics BA6219BFP-Y (Unless otherwise specified, Ta=25°C, VCC1=12 V, VCC2=12 V) Parameter Symbol Limit Min. Typ. Max. Unit Conditions Circuit current 1 ICC1 - 1.2 2.5 mA Standby mode (stop) Circuit current 2 ICC2 - 16 35 mA Forward rotation or reverse mode Circuit current 3 ICC3 - 25 60 mA Brake mode High-level input voltage VIH 3.0 - VCC V Low-level input voltage VIL 0 - 1.0 V IVREF 0.6 1.2 2.4 mA RL=60Ω CD1 constant-current value ICD1 0.7 1.5 3.0 mA (IN1, IN2) = (H, L): Current from CD1 to GND CD2 constant-current value (IN1, IN2) = (H, L): Current from CD2 to GND VR bias current ICD2 0.7 1.5 3.0 mA Output leak current IOL - - 1 mA FOUT high output voltage VHF 6.5 - - V (IN1, IN2) = (L, L): Current flowing into VCC2 RL=60Ω VR=6.8V FOUT low output voltage VLF - - 1.2 V RL=60Ω VR=6.8V ROUT high output voltage VHR 6.5 - - V RL=60Ω VR=6.8V ROUT low output voltage VLR - 1.2 V RL=60Ω VR=6.8V BA6920FP-Y (Unless otherwise specified, Ta=25°C, VCC1=12 V, VM=12 V) Parameter Symbol Limit Min. Typ. Max. Unit Conditions Circuit current 1 ICC1 5 8 12 mA Forward rotation or reverse mode Circuit current 2 ICC2 3 5 8 mA Brake mode IST - - 15 μA Standby mode High-level input voltage VIH 3.0 - - V Low-level input voltage VIL - - 0.8 V High-level input current IIH 100 200 300 μA Circuit current during standby mode VIN=3.0V Io = 200 mA: Total voltage of both high and low sides Output saturation voltage VCE - 2.2 3.3 V Power saving off voltage VPS OFF - - 0.8 V Operating mode Power saving on voltage VPS ON 2.0 Standby mode REF bias current IREF - - V 12 35 μA of output transistor VREF=6V,Io=100mA ●I/O Logic table BA6219BFP-Y IN1 IN2 OUT1 OUT2 Mode H L H L Forward rotation L H L H Reverse rotation H H L L Brake L L OPEN(Hi-Z) OPEN(Hi-Z) Stop BA6920FP-Y FIN RIN POWER SAVE OUT1 OUT2 Mode H L L H L Forward rotation L H L L H Reverse rotation H H L L L Brake OPEN OPEN (Hi-Z) (Hi-Z) OPEN OPEN Power saving mode (Hi-Z) (Hi-Z) (Output stop) L L L Don't Care Don't Care H Stop Note: When the POWERSAVE pin is at high level, OUT1 and OUT2 will be open regardless of the FIN or RIN logic. 2/8 ●Reference data 30 -25℃ 1.5 1 75℃ 25℃ 0.5 0 25 -25℃ 20 15 5 12 14 16 18 10 15 Circuit current:Icc2[mA] 12 25℃ -30℃ 9 6 12 14 16 85℃ 3 0 15 20 25 30 7.5 12 9 -30℃ 6 3 35 25℃ 85℃ 10 15 20 25 30 2.4 Output L Voltage:VOL[V -0.9 85℃ 25℃ -1.7 -30℃ -2.1 0.4 0.6 0.8 25℃ -25℃ 6.75 0.5 2 1.4 1.6 25℃ -25℃ 0.8 0.4 1.2 75℃ 1.0 0.8 25℃ 0.6 -30℃ 0.4 0.2 0.0 0 0.5 Output Current:Iout[A] 1 1.5 2 0 0.2 Output Current:Iout[A] 0.4 0.6 0.8 1 Output Current:Iout[A] Fig. 8 Low Output vs Output Current (BA6219BFP-Y) Fig. 7 High Output vs Output Current (BA6920BFP-Y) 1.5 Fig. 6 High Output vs Output Current (BA6219BFP-Y) 75℃ 1.2 1 Output Current:Iout[A] VCC1=VCC2=12V VREF=5V 2.0 1 18 75℃ 7 0 0.0 0.2 16 7.25 35 Fig. 5 Circuit current 2 (Brake) (BA6920FP-Y) -0.5 14 VCC1= VCC2=12V VREF=6.8V Supply Voltage:Vcc[v] -0.1 12 6.5 5 Fig. 4 Circuit current 1 (Forward rotation) (BA6920FP-Y) 0 10 Fig. 3 Circuit current 3 (Brake) (BA6219BFP-Y) FIN=H, RIN=H VCC=VM Supply Voltage:Vcc[v] -1.3 10 Supply Voltage:Vcc[v] Output L Voltage:VOL[V] 10 25℃ 8 0 5 75℃ 20 18 Fig. 2 Circuit current 2 (Reverse rotation) (BA6219BFP-Y) FIN=H, RIN=L VCC=VM -25℃ 30 Supply Voltage :Vcc[v] Fig. 1 Circuit current 1 (Standby) (BA6219BFP-Y) 15 IN1=IN2=H VCC1=VCC2 0 8 Output H Voltage:VOH[V 10 Supply Voltage:Vcc[v] Circuit current:Icc1[mA] 75℃ 25℃ 10 0 8 Output H Voltage:VOH[V] 40 IN1=L, IN2=H VCC1=VCC2 Circuit current:Icc3[mA] IN1=IN2=L VCC1=VCC2 Circuit current :Icc2[mA] Circuit Current:Icc1[mA] 2 Fig. 9 Low Output vs Output Current (BA6920AFP-Y) 3/8 N.C. N.C. N.C. N.C. N.C. N.C (GND) Fig.11 Fig.10 N.C. FIN FIN (GND) N.C. VREF RIN RNF OUT2 N.C. N.C. N.C. N.C. N.C. N.C. OUT2 N.C. CD2 N.C. N.C. VCC2 N.C N.C. N.C. VCC1 GND IN2 N.C. GND FIN FIN (GND) N.C. N.C. OUT1 N.C. GND IN1 N.C. VR. N.C. N.C. CD1 N.C. BA6920FP-Y (GND) BA6219BFP-Y GND OUT1 POWER SAVE FIN VCC VM ●Pin assignment ●Block diagram BA6219BFP-Y BA6920FP-Y ③Current limiting resistor - 1~100μF + ①For preventing upper and lower transistors from turning on simultaneously POWER 0.01~1μF SAVE 5~10Ω ④ VR VCC2 VCC1 ③Current limiting resistor - 1~100μF 0.1μF + VCC1 VM 5~10Ω POWER CD1 LOGIC IN2 OUT1 MOTOR 0.01μF CONTROL IN1 RIN LOGIC FIN OUT2 CD2 TSD ①For preventing upper and lower transistors from turning on simultaneously 0.01~1μF Fig.12 OUT2 TSD 0.1μF GND OUT1 MOTOR 0.01μF CONTROL ZD ②For output oscillation prevention 0.01~0.1μF GND ②For output oscillation prevention 0.01~0.1μF RNF VREF ④ ZD Fig.13 ●Explanation of external components ① Capacitors that prevent upper and lower transistors from turning on simultaneously (Capacitors to connect to CD1 and CD2 pins in the case of BA6219BFP-Y). The rising of the base potential of the transistor at high-level output is delayed to prevent both transistors from turning on simultaneously. Set the capacitance between 0.01μF and 1μF and ensure that a penetration current does not flow during output mode changes, since the transistors do not turn on simultaneously. ② Capacitor for output oscillation prevention The output pin may generate noise or oscillate, depending on the set mounting conditions, such as the power supply circuit, motor characteristics, and PCB pattern artwork. Connect a capacitor with a capacitance value of 0.01μF to 0.1μF to prevent noise oscillation. ③ Resistance for current limiting A resistor used to prevent collector loss and limit the current of output shorting. Although the required resistance varies with the supply voltage, a resistance of approximately 5Ω to 10Ω should be selected. When designing the circuit, pay utmost attention to voltage reduction resulting from a rush current that flows when the driving of the motor starts. ④ Zener diode for output voltage setting Zener diode for high output voltage VR (VREF) setting. The zener voltage can be set almost equal to high output voltage. BA6219BFP-Y PIN No. 2 BA6920FP-Y Pin Name CD1 Function Pin No Pin name Capacitor connection pin for prevention of 5 OUT2 6 RNF upper and lower transistors to turn on simultaneously Function Motor output pin Connection pin for output current detection on the GND pin of the 4 VR High output voltage setting pin 6 IN1 Logic input pin 8 GND 7 GND GND 9 OUT1 8 IN2 Logic input pin 16 VM Motor power supply output block GND Motor output pin 10 VCC1 Power supply pin for small signal block 17 Vcc Power supply pin 11 VCC2 Power supply pin for motor output 18 FIN Logic input pin Capacitor connection pin for prevention of upper and lower transistors to turn on 19 POWER 13 CD2 simultaneously 20 RIN 15 OUT2 Motor output pin 21 VREF 19 GND GND 20 GND GND FIN GND 24 OUT1 Motor output pin FIN GND SAVE Power saving input pin Logic input pin High output voltage setting pin Note: Be sure to connect the heat dissipation fin to the GND pin. Note: Pins 1 to 4, 7, 10 to 14, and 20 to 24 are NC pins. Note: Be sure to connect the heat dissipation fin to the GND pin. Note: Pins 1, 3, 5, 9, 12, 14, 16 to 18, 21 to 18, 21 to 23, and 25 are NC pins. 4/8 ●IC Operation BA6920FP-Y(BA6219BFP-Y) 1) I/O mode of input block FIN (IN1) and RIN (IN2) A pin where control signals are input. Each mode operates as explained below. When the FIN (IN1) is set to high and RIN (IN2) is set to low, the forward rotation mode will be set and a current will flow from OUT1 to OUT2. When the FIN (IN1) is set to low and RIN (IN2) is set to high, the reverse rotation mode will be set and a current will flow from OUT2 to OUT1. When both FIN (IN1) and RIN (IN2) are set to high, the brake mode will be set. At that time, the output transistor on the high side will be turned off to stop the supply of the motor drive current while the output transistor on the low side will be turned on to absorb the motor back EMF to brake the motor. When both FIN (IN1) and RIN (IN2) are set to low, OUT1 and OUT2 will be both open potential and the motor will stop. 2) High output voltage setting function With this function, the output voltage can be set through the high output voltage setting pin in order to control the rotation speed of the motor. If the high output voltage is set to a lower value, the power consumption of the IC will become high. Consider the power dissipation (Pd) of the IC under actual operating conditions, and implement thermal designing with a sufficient margin. VCC1 2-1. BA6219BF-Y (See Fig.14) {High output voltage is expressed by the following equation. VoutH (high output voltage) = VR + {VF(Q5) + VF (Q6) + VF (Q7) - VF (Q2) -VF (Q3) - VF (Q4)} ≒VR +ΔVF Q2 (VF is the base-emitter voltage in the forward direction) Although ΔVF depends on the output current, Vo is almost VR. The maximum value VoutHmax of high output voltage that can be set is as follows. VoutHmax < VCC1 - Vsat (Q1) - VF (Q2) - VF (Q3) - VF (Q4) VCC2 Q1 Q3 Q5 Q4 Q6 Q7 ≒VCC1 - 2.5 V OUT {Relation of VCC1, VCC2, and VR VR VCC1, VCC2, and VR should be set as follows. Fig.14 VR < VCC2 - Vsat (Q3) + VF (Q3) + VF (Q2) - {VF (Q5) + (Q6) + (Q7)} ≒VCC2 - 1 V High output voltage Operating Conditions Pin Voltage Unit VCC1 8 ~ 18 V VCC2 8 ~ 18 V VR Shown above - VR (VREF) voltage 2-2. BA6920FP-Y (See Fig. 16) {High output voltage is expressed by the following equation: VoutH (high output voltage) = Vref voltage + {VF (Q2) + VF( Q3)} - {VF(Q4) + VF (Q5)} Output Voltage Control Range Fig.15 ≒Vref voltage +ΔVF (VF is the base-emitter voltage in the forward direction) Although ΔVF depends on the output current, Vo is almost VR. VCC The VOH is beyond control if the Vref value is higher than the above, and determined by the voltage condition of VCC and VM. For example, when Vref = VCC = VM, VM VOH≒VCC - Vsat (Q1) - VF (Q4) -VF (Q5) Q1 ≒VCC - 1.7 V {Relation of VCC, VM, and VREF Q4 VCC1, VCC2, and VR should be set as follows. VREF < VM - Vsat (Q5) + VF (Q5) + VF (Q4) - {VF (Q2) + (Q3)} ≒ VM - 0.3 V Q2 Q5 Q3 Operating conditions pin OUT Voltage Unit VCC 6.5 ~ 34 V VM 6.5 ~ 34 V VREF Shown above - VREF Fig.16 3 ) Selection of forward or reverse rotation To change the rotation direction of the motor in operation, be sure to brake or open the motor current on time. In the above case, Braking: The braking time or over. The braking time is defined as the time of setting the output low level voltage to the GND potential or below, when the brake operates. Opening: A period of 1 ms or over is recommended. 5/8 ●Power Dissipation Reduction (Common) Pd[W] 2.0 1.5 1.45 1.0 0.5 0 25 75 85 100 50 125 150 Ta[℃] Fig.17 When mounted on a glass epoxy board with a dimension of 70 mm x 70 mm x 1.6 mm. Reduced by 11.6 mW/°C over 25°C. Must not exceed Pd or ASO. ●I/O Circuit Diagram Input (BA6219BFP-Y) Input (BA6920FP-Y) FIN RIN IN1,IN2 13.2kΩ 11kΩ 20kΩ 4.7kΩ 11kΩ 10kΩ 10kΩ 10kΩ 20kΩ 10kΩ GND Fig.18 Output (BA6219BFP-Y) Fig.19 Output (BA6920FP-Y) VCC CD1 VCC2 VM CD2 Q1 Q4 VCC1 Q5 Q2 OUT2 VR OUT1 OUT1 OUT2 Q3 VREF GND RNF GND Fig.20 Fig.21 ●Operation Notes 1) Absolute maximum ratings An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as fuses. 2) Connecting the power supply connector backward Connecting of the power supply in reverse polarity can damage IC. Take precautions when connecting the power supply lines. An external direction diode can be added. 6/8 3) Power supply lines Design PCB layout pattern to provide low impedance GND and supply lines. To obtain a low noise ground and supply line, separate the ground section and supply lines of the digital and analog blocks. Furthermore, for all power supply terminals to ICs, connect a capacitor between the power supply and the GND terminal. When applying electrolytic capacitors in the circuit, note that capacitance characteristic values are reduced at low temperatures. 4) GND voltage 5) Thermal design 6) Inter-pin shorts and mounting errors The potential of GND pin must be minimum potential in all operating conditions. Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions. Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any connection error or if pins are shorted together. 7) Actions in a strong electromagnetic field Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction. 8) ASO 9) Thermal shutdown circuit When using the IC, set the output transistor so that it does not exceed absolute maximum ratings or ASO. The IC incorporates a built-in thermal shutdown circuit (TSD circuit). The thermal shutdown circuit (TSD circuit) is designed only to shut the IC off to prevent thermal runaway. It is not designed to protect the IC or guarantee its operation. Do not continue to use the IC after operating this circuit or use the IC in an environment where the operation of this circuit is assumed. 10) TSD on temperature [°C] (Typ.) Hysteresis temperature [°C] (Typ.) BA6680FS 175 25 BD6761FS 175 35 BD6762FV 175 23 PWM drive Voltage between the output FET drain and source may exceed the absolute maximum ratings due to the fluctuation of VCC at the time of PWM driving. If there is the threat of this problem, it is recommended to take physical countermeasures for safety such as inserting the capacitor between the VCC pin of FET and the detection resistor pin. 11) Testing on application boards When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress. discharge capacitors after each process or step. Always Always turn the IC's power supply off before connecting it to or removing it from a jig or fixture during the inspection process. Ground the IC during assembly steps as an antistatic measure. Use similar precaution when transporting or storing the IC. 12) Regarding input pin of the IC (Fig. 22) This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated. P-N junctions are formed at the intersection of these P layers with the N layers of other elements, creating a parasitic diode or transistor. For example, the relation between each potential is as follows: When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode. When GND > Pin B, the P-N junction operates as a parasitic transistor. Parasitic diodes can occur inevitable in the structure of the IC. The operation of parasitic diodes can result in mutual interference among circuits, operational faults, or physical damage. Accordingly, methods by which parasitic diodes operate, such as applying a voltage that is lower than the GND (P substrate) voltage to an input pin, should not be used. Transistor (NPN) Resistor Pin A Pin B C Pin B B E Pin A N N P+ N P+ P N Parasitic element P+ P substrate Parasitic element GND B N P+ P N C E Parasitic element P substrate Parasitic element GND GND GND Other adjacent elements Fig.22 Example of IC structure 13) Ground Wiring Pattern When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns, placing a single ground point at the ground potential of application so that the pattern wiring resistance and voltage variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the GND wiring pattern of any external components, either. 7/8 ●Selecting a model name when ordering B 6 A 9 2 0 F P - Y E 2 - Part number ROHM model name Package type Taping type E2 = Reel-wound embossed taping HSOP25 <Tape and Reel information> <Dimension> Embossed carrier tape Tape Quantity 13.6 ± 0.2 0.11 0.3Min. 7.8 ± 0.3 1.9 ± 0.1 1 1.95 ± 0.1 13 0.8 2000pcs E2 Direction of feed 14 5.4 ± 0.2 25 2.75 ± 0.1 (Correct direction: 1pin of product should be at the upper left when you hold reel on the left hand, and you pull out the tape on the right hand) 0.25 ± 0.1 0.1 1234 1234 1Pin 1234 1234 Reel 1234 (Unit:mm) 1234 1234 0.36 ± 0.1 Direction of feed ※Orders are available in complete units only. The contents described herein are correct as of October, 2005 The contents described herein are subject to change without notice. For updates of the latest information, please contact and confirm with ROHM CO.,LTD. Any part of this application note must not be duplicated or copied without our permission. Application circuit diagrams and circuit constants contained herein are shown as examples of standard use and operation. Please pay careful attention to the peripheral conditions when designing circuits and deciding upon circuit constants in the set. Any data, including, but not limited to application circuit diagrams and information, described herein are intended only as illustrations of such devices and not as the specifications for such devices. ROHM CO.,LTD. disclaims any warranty that any use of such devices shall be free from infringement of any third party's intellectual property rights or other proprietary rights, and further, assumes no liability of whatsoever nature in the event of any such infringement, or arising from or connected with or related to the use of such devices. Upon the sale of any such devices, other than for buyer's right to use such devices itself, resell or otherwise dispose of the same, implied right or license to practice or commercially exploit any intellectual property rights or other proprietary rights owned or controlled by ROHM CO., LTD. is granted to any such buyer. The products described herein utilize silicon as the main material. The products described herein are not designed to be X ray proof. Published by Application Engineering Group Catalog No.05T333Be '05.10 ROHM C 1000 TSU Appendix Notes No technical content pages of this document may be reproduced in any form or transmitted by any means without prior permission of ROHM CO.,LTD. The contents described herein are subject to change without notice. The specifications for the product described in this document are for reference only. Upon actual use, therefore, please request that specifications to be separately delivered. Application circuit diagrams and circuit constants contained herein are shown as examples of standard use and operation. Please pay careful attention to the peripheral conditions when designing circuits and deciding upon circuit constants in the set. Any data, including, but not limited to application circuit diagrams information, described herein are intended only as illustrations of such devices and not as the specifications for such devices. ROHM CO.,LTD. disclaims any warranty that any use of such devices shall be free from infringement of any third party's intellectual property rights or other proprietary rights, and further, assumes no liability of whatsoever nature in the event of any such infringement, or arising from or connected with or related to the use of such devices. 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ROHM cannot be held responsible for any damages arising from the use of the products under conditions out of the range of the specifications or due to non-compliance with the NOTES specified in this catalog. Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact your nearest sales office. ROHM Customer Support System www.rohm.com Copyright © 2008 ROHM CO.,LTD. THE AMERICAS / EUROPE / ASIA / JAPAN Contact us : webmaster@ rohm.co. jp 21 Saiin Mizosaki-cho, Ukyo-ku, Kyoto 615-8585, Japan TEL : +81-75-311-2121 FAX : +81-75-315-0172 Appendix1-Rev2.0