CL325 3-Channel 25mA Linear LED Driver Features General Description ► ±6% current accuracy @ 4.0 -15V ► 90V standoff voltage ► Separate enable pins for each channel allow for PWM dimming ► Over-temperature protection ► 8-Lead SOIC (w/Heat Slug) package The CL325 is designed to drive 3 strings of LEDs at a constant current of 25mA. Other drivers with currents in the range of 20 - 30mA are available. The drive current is fixed, with a ±6% tolerance over a VOUT range of 4 - 15V. Separate enable pins for each channel allow for PWM dimming, 3-step linear dimming, or individual disconnection of faulty LED strings. Applications ► LCD backlighting ► Indicator lamps Over-temperature protection circuitry shuts down all 3 channels when the nominal die temperature reaches 135°C. Normal operation resumes when the die temperature drops by 30°C. The CL325 is available in the 8-Lead SOIC (w/Heat Slug) package and requires a single ceramic bypass capacitor which may be shared among several drivers. Block Diagram and Typical Application Circuit 6.5 - 90V CIN 100nF 8 7 6 5 VIN OUT1 OUT2 OUT3 REG Host Controller 1 EN1 2 EN2 3 EN3 VDD GND CL325 4 CL325 Pin Configuration Ordering Information Device 8-Lead SOIC (w/Heat Slug) CL325 CL325SG-G OUT3 OUT2 OUT1 VIN -G indicates package is RoHS compliant (‘Green’) Underside plate is ground GND EN3 EN2 EN1 8-Lead SOIC (w/Heat Slug) (SG) Product Marking Absolute Maximum Ratings Parameter Value Supply voltage, VIN -0.5V to +100V CL325 Output voltage, VOUT -0.5V to +100V LLLL Enable voltage, VEN -0.5V to +6.5V Operating temperature(1) Storage temperature YY = Year Sealed WW = Week Sealed L = Lot Number = “Green” Packaging YYWW 8-Lead SOIC (w/Heat Slug) (SG) -40°C -65°C to +150°C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. Note: (1) Maximum junction temperature internally limited. Recommended Operating Conditions (all voltages with respect to GND pin) Sym Parameter Min Typ Max Units VIN Supply voltage 6.5 - 90 V --- VOUT Output voltage 4.0 - 15 V EN = 0 90 V EN = 1 0 - 100 kHz -40 - 119 - 100 - Min Typ Max - 48 - 120 135 150 O --- - 30 - O --- fEN Enable toggling frequency TJ Junction temperature CIN VIN capacitor o Conditions --- C --- nF --- Thermal Characteristics Sym Parameter θJA Thermal resistance, junction to ambient TLIM Over-temperature limit THYS Over-temperature hysteresis 2 Units Conditions O C/W Mounted on JEDEC test PCB (2s 2p) C C CL325 Electrical Characteristics (Over recommended operating conditions. TJ @ 25OC unless otherwise specified.) Sym Parameter IIN VIN supply current IOUT(OFF) Output current, off IOUT(ON) Output current, on Min Typ Max Units Conditions - 220 250 µA EN1-3 = 1 - 2.2 2.3 mA EN1-3 = 0 - 4.0 10 µA ENX = 1 - - 26.5 23.5 25.0 26.5 22.5 25.0 27.5 ENX = 0, VOUT = 0 - 4.0V mA ENX = 0, VOUT = 4.0 - 15V ENX = 0, VOUT = 15 - 90V VEN(ON) Enable voltage, on - - 0.8 V --- VEN(OFF) Enable voltage, off 2.4 - - V --- CEN Enable input capacitance - 5.0 10 pF --- IENL Enable low input current - - 1.0 µA VEN = 0V IENH Enable high input current - - 1.0 µA VEN = 5.0V tON Enable on delay - 2.0 2.4 µs --- tRISE Output current rise time - 1.0 1.2 µs --- tOFF Enable off delay - 440 800 ns --- tFALL Output current fall time - 170 250 ns --- Timing VEN(OFF) EN VEN(ON) tON tOFF tRISE tFALL 90% IOUT(ON) IOUT 10% IOUT(ON) Current (Normalized to 25°C) Temperature Effects 1.05 1.00 0.95 0.90 0.85 0.80 -50 -40 0 25 50 100 120 Junction Temperature (°C) 3 150 CL325 Load Regulation IOUT (normalized to nominal) 1.20 1.00 0.80 0.60 0.40 0.20 scale change 0 0 5 10 15 20 40 60 80 100 VOUT (V) Pin Description Pin # Name Description 1,2,3 EN1, EN2, EN3 4 GND 5,6,7 OUT1, OUT2, OUT3 8 VIN Supply voltage. 6.5V to 90V. Bypass locally with a 100nF capacitor to ground. Underside Plate GND The exposed underside plate is internally connected to the GND pin. The plate may either be left floating or connected to ground. Solder the plate to an exposed copper area on the PCB for heatsinking purposes (see recommended layout). Output enable, active low. Circuit common. Constant current output (sinking). Connect the cathodes of the LEDs to these pins. Recommended PCB Layout 1cm2 exposed copper Underside plate soldered to copper area Exposed copper area may be plated 1cm2 exposed copper 4 CL325 Higher LED Current VLL CIN 100nF 8 VIN REG Host Controller 1 EN1 2 EN2 3 EN3 7 6 5 OUT1 OUT2 OUT3 VDD GND 4 CL325 By paralleling outputs, higher LED currents can be achieved. In addition, linear dimming in 3 discrete steps may be obtained by enabling 1, 2, or 3 outputs. Lowering CL325 Power Dissipation: Separate VIN Supply VLL VIN CIN 100nF 8 7 6 5 VIN OUT1 OUT2 OUT3 REG Host Controller 1 EN1 2 EN2 3 EN3 VDD GND 4 CL325 CL325 power dissipation may be lowered by supplying the CL325 from a voltage source (VIN) that is lower in voltage than the LED supply (VLL). 5 CL325 Lowering CL325 Power Dissipation: Dropping Resistor VLL RDROP CIN 100nF 8 7 6 5 VIN OUT1 OUT2 OUT3 REG Host Controller 1 EN1 2 EN2 3 EN3 RDROP < VLL(MIN) - 6.5V 2.3mA where: RDROP = Dropping resistance VLL(MIN) = minimum supply voltage VDD GND 4 CL325 Lowering CL325 Power Dissipation: Zener Diode VLL ZDROP CIN 100nF 8 7 6 5 VIN OUT1 OUT2 OUT3 REG Host Controller 1 VDD VZ < (VLL(MIN) - 6.5V) EN1 2 EN2 3 EN3 where: VZ = Zener Voltage VLL(MIN) = minimum supply voltage GND 4 CL325 6 CL325 8-Lead SOIC (w/Heat Slug) Package Outline (SG) 4.90x3.90mm body, 1.70mm height (max), 1.27mm pitch D1 D θ1 8 8 Exposed Thermal Pad Zone E E1 Note 1 (Index Area D/2 x E1/2) E2 L 1 1 L2 Gauge Plane θ Seating Plane L1 Top View Bottom View View B A View B h h A A2 Note 1 Seating Plane e A1 b A Side View View A-A Note 1: This chamfer feature is optional. If it is not present, then a Pin 1 identifier must be located in the index area indicated.The Pin 1 identifier may be either a mold, or an embedded metal or marked feature. Symbol MIN Dimension NOM (mm) MAX A 1.25 A1 0.00 A2 1.25 b 0.31 D 4.80 D1 3.30* E 5.80 E1 3.80 E2 e 2.29* - - - - 4.90 - 6.00 3.90 - 1.70 0.15 1.70 0.51 5.00 3.81* 6.20 4.00 2.79* h 0.25 1.27 BSC L L1 L2 0.40 - - 0.50 1.27 θ 0 1.04 0.25 REF BSC O θ1 5O - - 8O 15O JEDEC Registration MS-012, Variation BA, Issue E, Sept. 2005. Dimensions marked with (*) are non-JEDEC dimensions. Drawings not to scale. (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Doc.# DSFP-CL325 NR111207 7