AVAGO HCPL-2630 High cmr, high speed ttl compatible optocoupler Datasheet

6N137, HCNW137, HCNW2601, HCNW2611, HCPL-0600,
HCPL-0601, HCPL-0611, HCPL-0630, HCPL-0631, HCPL-0661,
HCPL-2601, HCPL-2611, HCPL-2630, HCPL-2631, HCPL-4661
High CMR, High Speed TTL Compatible Optocouplers
Data Sheet
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
Description
Features
The 6N137, HCPL-26XX/06XX/4661, HCNW137/26X1 are
optically coupled gates that combine a GaAsP light emitting diode and an integrated high gain photo detector.
An enable input allows the detector to be strobed. The
output of the detector IC is an open collector Schottkyclamped transistor. The internal shield provides a guaranteed common mode transient immunity specification
up to 15,000 V/μs at Vcm=1000V.
x 15 kV/μs minimum Common Mode Rejection (CMR)
at VCM = 1KV for HCNW2611, HCPL-2611, HCPL-4661,
HCPL-0611, HCPL-0661
x High speed: 10 MBd typical
x LSTTL/TTL compatible
x Low input current capability: 5 mA
x Guaranteed ac and dc performance over temperature:
-40°C to +85°C
x Available in 8-Pin DIP, SOIC-8, widebody packages
x Strobable output (single channel products only)
x Safety approval
UL recognized - 3750 V rms for 1 minute and 5000
Vrms* for 1 minute per UL1577 CSA approved
IEC/EN/DIN EN 60747-5-2 approved with
VIORM = 560 V peak for 06xx Option 060
VIORM = 630 V peak for 6N137/26xx Option 060
VIORM = 1414 V peak for HCNW137/26X1
x MIL-PRF-38534 hermetic version available
(HCPL-56XX/66XX)
This unique design provides maximum ac and dc circuit isolation while achieving TTL compatibility. The optocoupler
ac and dc operational parameters are guaranteed from 40°C to +85°C allowing troublefree system performance.
Functional Diagram
6N137, HCPL-2601/2611
HCPL-0600/0601/0611
HCPL-2630/2631/4661
HCPL-0630/0631/0661
NC
1
8
VCC
ANODE
2
7
CATHODE
3
NC
4
SHIELD
ANODE 1
1
8
VCC
VE
CATHODE 1
2
7
VO1
6
VO
CATHODE 2
3
6
VO2
5
GND
ANODE 2
4
5
GND
TRUTH TABLE
(POSITIVE LOGIC)
LED
ON
OFF
ON
OFF
ON
OFF
ENABLE
H
H
L
L
NC
NC
OUTPUT
L
H
H
H
L
H
SHIELD
TRUTH TABLE
(POSITIVE LOGIC)
LED
ON
OFF
OUTPUT
L
H
A 0.1 PF bypass capacitor must be connected between pins 5 and 8.
Applications
x Isolated line receiver
x Computer-peripheral interfaces
x Microprocessor system interfaces
x Digital isolation for A/D, D/A conversion
x Switching power supply
x Instrument input/output isolation
x Ground loop elimination
x Pulse transformer replacement
x Power transistor isolation in motor drives
x Isolation of high speed logic systems
*5000 V rms/1 Minute rating is for HCNW137/26X1 and Option 020
(6N137, HCPL-2601/11/30/31, HCPL-4661) products only.
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.
The 6N137, HCPL-26XX, HCPL-06XX, HCPL-4661, HCNW137,
and HCNW26X1 are suitable for high speed logic interfacing, input/output buffering, as line receivers in environments that conventional line receivers cannot tolerate
and are recommended for use in extremely high ground
or induced noise environments.
Selection Guide
Minimum CMR
8-Pin DIP (300 Mil)
dV/dt
(V/μs)
VCM
(V)
Input
OnCurrent
(mA)
1000
10
5
YES
5,000
1,000
5
YES
Output
Enable
Single
Channel
Package
6N137
Dual
Channel
Package
1,000
YES
HCPL-2630
HCPL-2601
NO
15,000
1,000
YES
50
YES
HCPL-2602
YES
HCPL-2612[1]
1,000
50
YES
HCPL-261A[1]
1,000
50
12.5
HCNW2611
HCPL-0661
HCPL-061A[1]
HCPL-261N[1]
HCPL-063A[1]
HCPL-061N[1]
HCPL-263N[1]
[3]
Notes:
1. Technical data are on separate Avago publications.
2. 15 kV/μs with VCM = 1 kV can be achieved using Avago application circuit.
3. Enable is available for single channel products only, except for HCPL-193X devices.
2
HCNW2601
HCPL-0611
HCPL-263A[1]
NO
NO
Single
and Dual
Channel
Packages
HCPL-0631
HCPL-4661
300
YES
Single
Channel
Package
[1]
1,000
1,000
Hermetic
HCNW137
HCPL-0601
HCPL-2611
3, 500
1,000[2]
Dual
Channel
Package
Widebody
(400 Mil)
HCPL-0630
HCPL-2631
NO
3
Single
Channel
Package
HCPL-0600
NO
10,000
Small-Outline SO-8
HCPL-063N[1]
HCPL-193X[1]
HCPL-56XX[1]
HCPL-66XX[1]
Ordering Information
HCPL-xxxx is UL Recognized with 3750 Vrms for 1 minute per UL1577.
HCNWxxxx is UL Rcognized with 5000 Vrms for 1 minute per UL1577.
Option
Part
Number
6N137
HCPL-2601
HCPL-2611
HCPL-2630
HCPL-2631
HCPL-4661
3
RoHS
Compliant
Non RoHS
Compliant
-000E
No option
-300E
#300
X
X
-500E
#500
X
X
-020E
#020
-320E
#320
-520E
#520
-060E
#060
-560E
-560
-000E
No option
-300E
#300
X
X
-500E
#500
X
X
-020E
#020
-320E
#320
-520E
#520
-060E
#060
-360E
-
-000E
No option
-300E
#300
X
X
-500E
#500
X
X
-020E
#020
Package
Surface
Mount
Gull
Wing
Tape &
Reel
UL 5000 Vrms/
1 Minute
Rating
IEC/EN/DIN
EN 60747-5-2
Quantity
50 per tube
300mil
DIP-8
X
X
X
X
X
X
50 per tube
X
X
1000 per reel
X
50 per tube
X
50 per tube
X
1000 per reel
X
X
50 per tube
X
1000 per reel
50 per tube
300mil
DIP-8
X
X
X
X
X
50 per tube
X
X
1000 per reel
X
50 per tube
X
50 per tube
X
1000 per reel
X
X
50 per tube
X
50 per tube
50 per tube
300mil
DIP-8
-320E
#320
X
X
-520E
#520
X
X
-060E
#060
-360E
#360
X
X
-560E
#560
X
X
-000E
No option
-300E
#300
-500E
#500
-020E
#020
-320E
#320
X
X
-520E
-520
X
X
-000E
No option
-300E
#300
-500E
#500
-020E
#020
-320E
-520E
50 per tube
X
X
1000 per reel
X
50 per tube
X
50 per tube
X
1000 per reel
X
X
50 per tube
X
50 per tube
X
1000 per reel
50 per tube
300mil
DIP-8
X
X
X
X
50 per tube
X
X
1000 per reel
X
50 per tube
X
50 per tube
X
1000 per reel
50 per tube
X
X
X
X
#320
X
X
#520
X
X
300mil
DIP-8
50 per tube
X
X
1000 per reel
X
50 per tube
X
50 per tube
X
1000 per reel
Option
Part
Number
HCPL-0600
HCPL-0601
HCPL-0611
HCPL-0630
HCPL-0631
HCPL-0661
HCNW137
HCNW2601
HCNW2611
RoHS
Compliant
Non RoHS
Compliant
-000E
No option
-500E
#500
-060E
#060
-560E
#560
-000E
No option
No option
#500
Tape &
Reel
UL 5000 Vrms/
1 Minute
Rating
IEC/EN/DIN
EN 60747-5-2
X
X
1500 per reel
X
X
X
100 per tube
X
1500 per reel
X
100 per tube
X
400 mil
DIP-8
Quantity
100 per tube
X
SO-8
-000E
-500E
Gull
Wing
X
#500
#300
Package
SO-8
-500E
-300E
Surface
Mount
X
X
X
X
X
1500 per reel
X
X
X
42 per tube
X
X
42 per tube
X
X
750 per reel
To order, choose a part number from the part number column and combine with the desired option from the option
column to form an order entry. Combination of Option 020 and Option 060 is not available.
Example 1:
HCPL-2611-560E to order product of 300mil DIP Gull Wing Surface Mount package in Tape and Reel packag
ing with IEC/EN/DIN EN 60747-5-2 Safety Approval in RoHS compliant.
Example 2:
HCPL-2630 to order product of 300mil DIP package in tube packaging and non RoHS compliant.
Option datasheets are available. Contact your Avago sales representative or authorized distributor for information.
Notes:
The notation ‘#XXX’ is used for existing products, while (new) products launched since 15th July 2001 and RoHS compliant option will use ‘-XXXE‘.
Schematic
IF
6N137, HCPL-2601/2611
HCPL-0600/0601/0611
HCNW137, HCNW2601/2611
HCPL-2630/2631/4661
HCPL-0630/0631/0661
ICC
1
ICC
8
2+
IO
6
VCC
VO
8
IF1
IO1
+
7
VCC
VO1
VF1
–
2
VF
SHIELD
–
3
SHIELD
IE
5
7
VE
USE OF A 0.1 μF BYPASS CAPACITOR CONNECTED
BETWEEN PINS 5 AND 8 IS RECOMMENDED (SEE NOTE 5).
GND
3
IF2
IO2
–
6
VF2
+
4
SHIELD
4
VO2
5
GND
Package Outline Drawings
8-pin DIP Package** (6N137, HCPL-2601/11/30/31, HCPL-4661)
7.62 ± 0.25
(0.300 ± 0.010)
9.65 ± 0.25
(0.380 ± 0.010)
8
TYPE NUMBER
7
6
5
6.35 ± 0.25
(0.250 ± 0.010)
OPTION CODE*
DATE CODE
A XXXXZ
YYWW RU
1
2
3
4
UL
RECOGNITION
1.78 (0.070) MAX.
1.19 (0.047) MAX.
+ 0.076
0.254 - 0.051
+ 0.003)
(0.010 - 0.002)
5° TYP.
3.56 ± 0.13
(0.140 ± 0.005)
4.70 (0.185) MAX.
0.51 (0.020) MIN.
2.92 (0.115) MIN.
DIMENSIONS IN MILLIMETERS AND (INCHES).
0.65 (0.025) MAX.
1.080 ± 0.320
(0.043 ± 0.013)
*MARKING CODE LETTER FOR OPTION NUMBERS
"L" = OPTION 020
"V" = OPTION 060
OPTION NUMBERS 300 AND 500 NOT MARKED.
2.54 ± 0.25
(0.100 ± 0.010)
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
**JEDEC Registered Data (for 6N137 only).
8-pin DIP Package with Gull Wing Surface Mount Option 300
(6N137, HCPL-2601/11/30/31, HCPL-4661)
LAND PATTERN RECOMMENDATION
9.65 ± 0.25
(0.380 ± 0.010)
8
7
6
1.016 (0.040)
5
6.350 ± 0.25
(0.250 ± 0.010)
1
2
3
10.9 (0.430)
4
1.27 (0.050)
1.19
(0.047)
MAX.
1.780
(0.070)
MAX.
9.65 ± 0.25
(0.380 ± 0.010)
7.62 ± 0.25
(0.300 ± 0.010)
3.56 ± 0.13
(0.140 ± 0.005)
1.080 ± 0.320
(0.043 ± 0.013)
0.635 ± 0.25
(0.025 ± 0.010)
0.635 ± 0.130
2.54
(0.025 ± 0.005)
(0.100)
BSC
DIMENSIONS IN MILLIMETERS (INCHES).
LEAD COPLANARITY = 0.10 mm (0.004 INCHES).
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
5
2.0 (0.080)
+ 0.076
0.254 - 0.051
+ 0.003)
(0.010 - 0.002)
12° NOM.
Small-Outline SO-8 Package (HCPL-0600/01/11/30/31/61)
LAND PATTERN RECOMMENDATION
8
7
6
5
5.994 ± 0.203
(0.236 ± 0.008)
XXX
YWW
3.937 ± 0.127
(0.155 ± 0.005)
7.49 (0.295)
TYPE NUMBER
(LAST 3 DIGITS)
DATE CODE
PIN ONE 1
2
3
4
0.406 ± 0.076
(0.016 ± 0.003)
1.9 (0.075)
1.270 BSC
(0.050)
0.64 (0.025)
* 5.080 ± 0.127
(0.200 ± 0.005)
3.175 ± 0.127
(0.125 ± 0.005)
7°
45° X
0.432
(0.017)
0 ~ 7°
0.228 ± 0.025
(0.009 ± 0.001)
1.524
(0.060)
0.203 ± 0.102
(0.008 ± 0.004)
* TOTAL PACKAGE LENGTH (INCLUSIVE OF MOLD FLASH)
5.207 ± 0.254 (0.205 ± 0.010)
0.305 MIN.
(0.012)
DIMENSIONS IN MILLIMETERS (INCHES).
LEAD COPLANARITY = 0.10 mm (0.004 INCHES) MAX.
NOTE: FLOATING LEAD PROTRUSION IS 0.15 mm (6 mils) MAX.
8-Pin Widebody DIP Package (HCNW137, HCNW2601/11)
11.00 MAX.
(0.433)
11.23 ± 0.15
(0.442 ± 0.006)
8
7
6
9.00 ± 0.15
(0.354 ± 0.006)
5
TYPE NUMBER
A
HCNWXXXX
DATE CODE
YYWW
1
2
3
4
10.16 (0.400)
TYP.
1.55
(0.061)
MAX.
7° TYP.
+ 0.076
0.254 - 0.0051
+ 0.003)
(0.010 - 0.002)
5.10 MAX.
(0.201)
3.10 (0.122)
3.90 (0.154)
0.51 (0.021) MIN.
2.54 (0.100)
TYP.
1.80 ± 0.15
(0.071 ± 0.006)
0.40 (0.016)
0.56 (0.022)
DIMENSIONS IN MILLIMETERS (INCHES).
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
6
8-Pin Widebody DIP Package with Gull Wing Surface Mount Option 300
(HCNW137, HCNW2601/11)
11.23 ± 0.15
(0.442 ± 0.006)
8
7
6
LAND PATTERN RECOMMENDATION
5
9.00 ± 0.15
(0.354 ± 0.006)
1
2
3
13.56
(0.534)
4
2.29
(0.09)
1.3
(0.051)
12.30 ± 0.30
(0.484 ± 0.012)
1.55
(0.061)
MAX.
11.00 MAX.
(0.433)
4.00 MAX.
(0.158)
1.80 ± 0.15
(0.071 ± 0.006)
0.75 ± 0.25
(0.030 ± 0.010)
2.54
(0.100)
BSC
1.00 ± 0.15
(0.039 ± 0.006)
+ 0.076
0.254 - 0.0051
+ 0.003)
(0.010 - 0.002)
DIMENSIONS IN MILLIMETERS (INCHES).
7° NOM.
LEAD COPLANARITY = 0.10 mm (0.004 INCHES).
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
Solder Reflow Temperature Profile
300
PREHEATING RATE 3 °C + 1 °C/–0.5 °C/SEC.
REFLOW HEATING RATE 2.5 °C ± 0.5 °C/SEC.
200
PEAK
TEMP.
245 °C
PEAK
TEMP.
240 °C
TEMPERATURE (°C)
2.5 C ± 0.5 °C/SEC.
30
SEC.
160 °C
150 °C
140 °C
PEAK
TEMP.
230 °C
SOLDERING
TIME
200 °C
30
SEC.
3 °C + 1 °C/–0.5 °C
100
PREHEATING TIME
150 °C, 90 + 30 SEC.
50 SEC.
TIGHT
TYPICAL
LOOSE
ROOM
TEMPERATURE
0
0
50
100
150
TIME (SECONDS)
NOTE: NON-HALIDE FLUX SHOULD BE USED.
7
200
250
Recommended Pb-free IR Profile
tp
Tp
TEMPERATURE
TL
Tsmax
TIME WITHIN 5 °C of ACTUAL
PEAK TEMPERATURE
15 SEC.
* 260 +0/-5 °C
217 °C
150 - 200 °C
RAMP-UP
3 °C/SEC. MAX.
NOTES:
THE TIME FROM 25 °C to PEAK
TEMPERATURE = 8 MINUTES MAX.
Tsmax = 200 °C, Tsmin = 150 °C
RAMP-DOWN
6 °C/SEC. MAX.
Tsmin
NOTE: NON-HALIDE FLUX SHOULD BE USED.
ts
PREHEAT
60 to 180 SEC.
tL
60 to 150 SEC.
* RECOMMENDED PEAK TEMPERATURE FOR
WIDEBODY 400mils PACKAGE IS 245 °C
25
t 25 °C to PEAK
TIME
Regulatory Information
The 6N137, HCPL-26XX/06XX/46XX, and HCNW137/26XX have been approved by the following organizations:
UL
Recognized under UL 1577, Component Recognition
Program, File E55361.
CSA
Approved under CSA Component Acceptance Notice
#5, File CA 88324.
IEC/EN/DIN EN 60747-5-2
Approved under
IEC 60747-5-2:1997 + A1:2002
EN 60747-5-2:2001 + A1:2002
DIN EN 60747-5-2 (VDE 0884 Teil 2):2003-01
(Option 060 and HCNW only)
Insulation and Safety Related Specifications
Parameter
Symbol
8-pin DIP
(300 Mil)
Value
Minimum External
Air Gap (External
Clearance)
L(101)
7.1
4.9
9.6
mm
Measured from input terminals
to output terminals, shortest
distance through air.
Minimum External
Tracking (External
Creepage)
L(102)
7.4
4.8
10.0
mm
Measured from input terminals
to output terminals, shortest
distance path along body.
Minimum Internal
Plastic Gap
(Internal Clearance)
0.08
0.08
1.0
mm
Through insulation distance,
conductor to conductor, usually
the direct distance between the
photoemitter and photodetector
inside the optocoupler cavity.
Minimum Internal
Tracking (Internal
Creepage)
NA
NA
4.0
mm
Measured from input terminals
to output terminals, along
internal cavity.
200
200
200
Volts
DIN IEC 112/VDE 0303 Part 1
IIIa
IIIa
IIIa
Tracking Resistance
(Comparative
Tracking Index)
Isolation Group
CTI
SO-8
Value
Widebody
(400 Mil)
Value
Units
Conditions
Material Group
(DIN VDE 0110, 1/89, Table 1)
Option 300 - surface mount classification is Class A in accordance with CECC 00802.
8
IEC/EN/DIN EN 60747-5-2 Insulation Related Characteristics
(HCPL-06xx Option 060 Only)
Description
Symbol
Installation classification per DIN VDE 0110/1.89, Table 1
for rated mains voltage ≤ 150 V rms
Characteristic
I-IV
for rated mains voltage ≤ 300 V rms
I-III
for rated mains voltage ≤ 600 V rms
I-III
Climatic Classification
55/85/21
Pollution Degree (DIN VDE 0110/1.89)
Maximum Working Insulation Voltage
Units
2
VIORM
567
V peak
Input to Output Test Voltage, Method b*
VIORM x 1.875 = VPR, 100% Production Test with tm = 1 sec,
Partial Discharge < 5 pC
VPR
1063
V peak
Input to Output Test Voltage, Method a*
VIORM x 1.5 = VPR, Type and Sample Test,
tm = 60 sec, Partial Discharge < 5 pC
VPR
851
V peak
VIOTM
6000
V peak
TS
IS,INPUT
PS,OUTPUT
150
150
600
°C
mA
mW
RS
≥109
:
Highest Allowable Overvoltage
(Transient Overvoltage, tini = 10 sec)
Safety Limiting Values
(Maximum values allowed in the event of a failure)
Case Temperature
Input Current**
Output Power**
Insulation Resistance at TS, VIO = 500 V
*Refer to the front of the optocoupler section of the current catalog, under Product Safety Regulations section, IEC/EN/DIN EN 60747-5-2, for a
detailed description.
Note: Isolation characteristics are guaranteed only within the safety maximum ratings which must be ensured by protective circuits in application.
9
IEC/EN/DIN EN 60747-5-2 Insulation Related Characteristics
(HCPL-26xx; 46xx; 6N13x Option 060 Only)
Description
Installation classification per DIN VDE 0110/1.89, Table 1
for rated mains voltage ≤ 300 V rms
for rated mains voltage ≤ 450 V rms
Climatic Classification
Pollution Degree (DIN VDE 0110/1.89)
Maximum Working Insulation Voltage
Input to Output Test Voltage, Method b*
VIORM x 1.875 = VPR, 100% Production Test with tm = 1 sec,
Partial Discharge < 5 pC
Input to Output Test Voltage, Method a*
VIORM x 1.5 = VPR, Type and sample test,
tm = 60 sec, Partial Discharge < 5 pC
Highest Allowable Overvoltage*
(Transient Overvoltage, tini = 10 sec)
Safety Limiting Values
(Maximum values allowed in the event of a failure,
also see Figure 16, Thermal Derating curve.)
Case Temperature
Input Current
Output Power
Insulation Resistance at TS, VIO = 500 V
Symbol
Characteristic
Units
VIORM
I-IV
I-III
55/85/21
2
630
V peak
VPR
1181
V peak
VPR
945
V peak
VIOTM
6000
V peak
TS
IS,INPUT
PS,OUTPUT
RS
175
230
600
≥109
°C
mA
mW
:
*Refer to the front of the optocoupler section of the current catalog, under Product Safety Regulations section, IEC/EN/DIN EN 60747-5-2, for a
detailed description.
Note: Isolation characteristics are guaranteed only within the safety maximum ratings which must be ensured by protective circuits in application.
IEC/EN/DIN EN 60747-5-2 Insulation Related Characteristics (HCNW137/2601/2611 Only)
Description
Installation classification per DIN VDE 0110/1.89, Table 1
for rated mains voltage ≤600 V rms
for rated mains voltage ≤1000 V rms
Climatic Classification (DIN IEC 68 part 1)
Pollution Degree (DIN VDE 0110/1.89)
Maximum Working Insulation Voltage
Input to Output Test Voltage, Method b*
VIORM x 1.875 = VPR, 100% Production Test with tm = 1 sec,
Partial Discharge < 5 pC
Input to Output Test Voltage, Method a*
VIORM x 1.5 = VPR, Type and sample test,
tm = 60 sec, Partial Discharge < 5 pC
Highest Allowable Overvoltage*
(Transient Overvoltage, tini = 10 sec)
Safety Limiting Values
(Maximum values allowed in the event of a failure,
also see Figure 16, Thermal Derating curve.)
Case Temperature
Input Current
Output Power
Insulation Resistance at TS, VIO = 500 V
Symbol
Characteristic
Units
VIORM
I-IV
I-III
55/100/21
2
1414
V peak
VPR
2651
V peak
VPR
2121
V peak
VIOTM
8000
V peak
TS
IS,INPUT
PS,OUTPUT
RS
150
400
700
≥109
°C
mA
mW
:
*Refer to the front of the optocoupler section of the current catalog, under Product Safety Regulations section, IEC/EN/DIN EN 60747-5-2, for a
detailed description.
Note: Isolation characteristics are guaranteed only within the safety maximum ratings which must be ensured by protective circuits in application.
10
Absolute Maximum Ratings* (No Derating Required up to 85°C)
Parameter
Symbol
Package**
Min.
Max.
Units
Storage Temperature
TS
-55
125
°C
Operating Temperature†
TA
-40
85
°C
Average Forward Input Current
IF
Single 8-Pin DIP
Single SO-8
Widebody
20
mA
Dual 8-Pin DIP
Dual SO-8
15
8-Pin DIP, SO-8
5
Widebody
3
Widebody
40
mW
7
V
VCC + 0.5
V
Reverse Input Voltage
VR
Note
2
1, 3
V
1
Input Power Dissipation
PI
Supply Voltage
(1 Minute Maximum)
VCC
Enable Input Voltage (Not to
Exceed VCC by more than
500 mV)
VE
Enable Input Current
IE
5
mA
Output Collector Current
IO
50
mA
1
Output Collector Voltage
VO
7
V
1
Output Collector Power
Dissipation
PO
Single 8-Pin DIP
Single SO-8
Widebody
85
mW
Dual 8-Pin DIP
Dual SO-8
60
Lead Solder Temperature
(Through Hole Parts Only)
Solder Reflow Temperature
Profile (Surface Mount Parts Only)
TLS
Single 8-Pin DIP
Single SO-8
Widebody
1, 4
8-Pin DIP
260°C for 10 sec.,
1.6 mm below seating plane
Widebody
260°C for 10 sec.,
up to seating plane
SO-8 and
Option 300
See Package Outline
Drawings section
*JEDEC Registered Data (for 6N137 only).
**Ratings apply to all devices except otherwise noted in the Package column.
†0°C to 70°C on JEDEC Registration.
Recommended Operating Conditions
Parameter
Input Current, Low Level
[1]
Input Current, High Level
Power Supply Voltage
Symbol
Min.
Max.
Units
IFL*
0
250
μA
IFH**
5
15
mA
VCC
4.5
5.5
V
Low Level Enable Voltage†
VEL
0
0.8
V
High Level Enable Voltage†
VEH
2.0
VCC
V
Operating Temperature
TA
-40
85
°C
5
TTL Loads
4k
:
[1]
Fan Out (at RL = 1 kΩ)
N
Output Pull-up Resistor
RL
330
*The off condition can also be guaranteed by ensuring that VFL ≤0.8 volts.
**The initial switching threshold is 5 mA or less. It is recommended that 6.3 mA to 10 mA be used for best performance and to permit at least a 20%
LED degradation guardband.
†For single channel products only.
11
Electrical Specifications
Over recommended temperature (TA = -40°C to +85°C) unless otherwise specified. All Typicals at VCC = 5 V, TA = 25°C.
All enable test conditions apply to single channel products only. See note 5.
Parameter
Sym.
Package
High Level Output
Current
IOH*
Input Threshold
Current
ITH
Low Level Output
Voltage
High Level Supply
Current
VOL*
ICCH
Min.
Typ.
Max.
Units
Test Conditions
Fig.
Note
All
5.5
100
μA
VCC = 5.5 V, VE = 2.0 V,
VO = 5.5 V, IF = 250 mA
1
1, 6,
19
Single Channel
Widebody
Dual Channel
2.0
5.0
mA
VCC = 5.5 V, VE = 2.0 V,
VO = 0.6 V,
IOL (Sinking) = 13 mA
2, 3
19
0.6
V
VCC = 5.5 V, VE = 2.0 V,
IF = 5 mA,
IOL (Sinking) = 13 mA
2, 3,
4, 5
1, 19
mA
VE = 0.5 V
VE = VCC
Both
Channels
VCC = 5.5 V
IF = 0 mA
7
mA
VE = 0.5 V
VE = VCC
Both
Channels
VCC = 5.5 V
IF = 10 mA
8
2.5
8-Pin DIP
SO-8
Widebody
0.35
Single Channel
7.0
6.5
10
10.0*
13.0*
Dual Channel
9.0
8.5
13
Single Channel
-0.7
-1.6
mA
VCC = 5.5 V, VE = 2.0 V
-0.9
-1.6
mA
VCC = 5.5 V, VE = 0.5 V
0.4
Dual Channel
Low Level Supply
Current
ICCL
High Level Enable
Current
IEH
Low Level Enable
Current
IEL*
High Level Enable
Voltage
VEH
Low Level Enable
Voltage
VEL
Input Forward
Voltage
VF
Input Reverse
Breakdown
Voltage
BVR*
Input Diode
Temperature
Coefficient
DVF /
∆TA
Input Capacitance
CIN
Single Channel
15
21
2.0
8-Pin DIP
SO-8
Widebody
1.4
1.3
1.25
1.2
8-Pin DIP
SO-8
Widebody
5
V
1.5
1.64
0.8
V
1.75*
1.80
1.85
2.05
V
19
TA = 25°C
IF = 10 mA
6, 7
1
TA = 25°C
V
3
IR = 10 μA
1
IR = 100 μA, TA = 25°C
8-Pin DIP
SO-8
Widebody
-1.6
8-Pin DIP
SO-8
Widebody
60
mV/°C
IF = 10 mA
7
1
-1.9
pF
f = 1 MHz, VF = 0 V
70
*JEDEC registered data for the 6N137. The JEDEC Registration specifies 0°C to +70°C. HP specifies -40°C to +85°C.
12
9
1
Switching Specifications (AC)
Over Recommended Temperature (TA = -40°C to +85°C), VCC = 5 V, IF = 7.5 mA unless otherwise specified.
All Typicals at TA = 25°C, VCC = 5 V.
Parameter
Sym.
Propagation Delay
Time to High
Output Level
Propagation Delay
Time to Low
Output Level
Pulse Width
Distortion
Package**
Min.
Typ.
Max.
Units
tPLH
20
48
75*
100
ns
TA = 25°C
tPHL
25
50
75*
100
ns
TA = 25°C
3.5
35
ns
|tPHL - tPLH|
Propagation Delay
Skew
8-Pin DIP
SO-8
Widebody
Test Conditions
RL = 350 :
CL = 15 pF
40
Note
8, 9,
10
1, 10,
19
1, 11,
19
8, 9,
10,
11
40
tPSK
Fig.
ns
13, 19
12, 13,
19
Output Rise
Time (10-90%)
tr
24
ns
12
1, 19
Output Fall
Time (90-10%)
tf
10
ns
12
1, 19
13,
14
14
Propagation Delay
Time of Enable
from VEH to VEL
tELH
Single Channel
30
ns
Propagation Delay
Time of Enable
from VEL to VEH
tEHL
Single Channel
20
ns
RL = 350 :,
CL = 15 pF,
VEL = 0 V, VEH = 3 V
15
*JEDEC registered data for the 6N137.
**Ratings apply to all devices except otherwise noted in the Package column.
Parameter
Sym.
Logic High
Common
Mode
Transient
Immunity
|CMH|
Logic Low
Common
Mode
Transient
Immunity
13
|CML|
Device
6N137
HCPL-2630
HCPL-0600/0630
HCNW137
HCPL-2601/2631
HCPL-0601/0631
HCNW2601
HCPL-2611/4661
HCPL-0611/0661
HCNW2611
6N137
HCPL-2630
HCPL-0600/0630
HCNW137
HCPL-2601/2631
HCPL-0601/0631
HCNW2601
HCPL-2611/4661
HCPL-0611/0661
HCNW2611
Min.
Typ.
Units
1,000
5,000
10,000
10,000
V/μs
Test Conditions
|VCM| = 10 V
|VCM| = 1 kV
10,000 15,000
|VCM| = 1 kV
15,000 25,000
|VCM| = 1 kV
1,000
5,000
10,000
10,000
V/μs
|VCM| = 10 V
|VCM| = 1 kV
10,000 15,000
|VCM| = 1 kV
15,000 25,000
|VCM| = 1 kV
Fig.
Note
VCC = 5 V, IF = 0 mA,
VO(MIN) = 2 V,
RL = 350 :, TA = 25°C
15
1, 16,
18, 19
VCC = 5 V, IF = 7.5 mA,
VO(MAX) = 0.8 V,
RL = 350 :, TA = 25°C
15
1, 17,
18, 19
Package Characteristics
All Typicals at TA = 25°C.
Parameter
Sym.
Package
Input-Output
Insulation
II-O*
Single 8-Pin DIP
Single SO-8
Input-Output
Momentary Withstand Voltage**
VISO
8-Pin DIP, SO-8
Widebody
OPT 020†
Input-Output
Resistance
RI-O
8-Pin DIP, SO-8
Widebody
Input-Output
Capacitance
CI-O
Min.
Typ.
Max.
Units
1
PA
3750
5000
5000
12
10
1011
V rms
0.6
0.5
RH ≤ 50%, t = 1 min,
TA = 25°C
20, 21
20, 22
VI-O = 500 V dc
pF
f = 1 MHz, TA = 25°C
RH ≤ 45%, t = 5 s,
VI-I = 500 V
0.6
II-I
Dual Channel
0.005
PA
Resistance
(Input-Input)
RI-I
Dual Channel
1011
:
Capacitance
(Input-Input)
CI-I
Dual 8-Pin DIP
Dual SO-8
0.03
0.25
pF
Note
20, 21
TA = 25°C
TA = 100°C
Input-Input
Insulation
Leakage Current
Fig.
45% RH, t = 5 s,
VI-O = 3 kV dc, TA = 25°C
:
1012
1013
8-Pin DIP, SO-8
Widebody
Test Conditions
1, 20,
23
1, 20,
23
24
24
f = 1 MHz
24
*JEDEC registered data for the 6N137. The JEDEC Registration specifies 0°C to 70°C. Avago specifies -40°C to 85°C.
**The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. For the continuous voltage rating refer to the IEC/EN/DIN EN 60747-5-2 Insulation Characteristics Table (if applicable), your equipment
level safety specification or Avago Application Note 1074 entitled “Optocoupler Input-Output Endurance Voltage.”
†For 6N137, HCPL-2601/2611/2630/2631/4661 only.
Notes:
1. Each channel.
2. Peaking circuits may produce transient input currents up to 50 mA, 50 ns maximum pulse width, provided average current does not exceed 20 mA.
3. Peaking circuits may produce transient input currents up to 50 mA, 50 ns maximum pulse width, provided average current does not exceed 15 mA.
4. Derate linearly above 80°C free-air temperature at a rate of 2.7 mW/°C for the SOIC-8 package.
5. Bypassing of the power supply line is required, with a 0.1 μF ceramic disc capacitor adjacent to each optocoupler as illustrated in Figure 17. Total
lead length between both ends of the capacitor and the isolator pins should not exceed 20 mm.
6. The JEDEC registration for the 6N137 specifies a maximum IOH of 250 μA. Avago guarantees a maximum IOH of 100 PA.
7. The JEDEC registration for the 6N137 specifies a maximum ICCH of 15 mA. Avago guarantees a maximum ICCH of 10 mA.
8. The JEDEC registration for the 6N137 specifies a maximum ICCL of 18 mA. Avago guarantees a maximum ICCL of 13 mA.
9. The JEDEC registration for the 6N137 specifies a maximum IEL of –2.0 mA. Avago guarantees a maximum IEL of -1.6 mA.
10. The tPLH propagation delay is measured from the 3.75 mA point on the falling edge of the input pulse to the 1.5 V point on the rising edge of the
output pulse.
11. The tPHL propagation delay is measured from the 3.75 mA point on the rising edge of the input pulse to the 1.5 V point on the falling edge of the
output pulse.
12. tPSK is equal to the worst case difference in tPHL and/or tPLH that will be seen between units at any given temperature and specified test conditions.
13. See application section titled “Propagation Delay, Pulse-Width Distortion and Propagation Delay Skew” for more information.
14. The tELH enable propagation delay is measured from the 1.5 V point on the falling edge of the enable input pulse to the 1.5 V point on the rising edge
of the output pulse.
15. The tEHL enable propagation delay is measured from the 1.5 V point on the rising edge of the enable input pulse to the 1.5 V point on the falling edge
of the output pulse.
16. CMH is the maximum tolerable rate of rise of the common mode voltage to assure that the output will remain in a high logic state (i.e., VO > 2.0 V).
17. CML is the maximum tolerable rate of fall of the common mode voltage to assure that the output will remain in a low logic state (i.e., VO < 0.8 V).
18. For sinusoidal voltages, (|dVCM | / dt)max = SfCMVCM(p-p).
19. No external pull up is required for a high logic state on the enable input. If the VE pin is not used, tying VE to VCC will result in improved CMR
performance. For single channel products only.
20. Device considered a two-terminal device: pins 1, 2, 3, and 4 shorted together, and pins 5, 6, 7, and 8 shorted together.
21. In accordance with UL1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 4500 V rms for one second (leakage detection
current limit, II-O ≤ 5 PA). This test is performed before the 100% production test for partial discharge (Method b) shown in the IEC/EN/DIN EN 607475-2 Insulation Characteristics Table, if applicable.
22. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 6000 V rms for one second (leakage detection
current limit, II-O ≤ 5 PA). This test is performed before the 100% production test for partial discharge (Method b) shown in the IEC/EN/DIN EN 607475-2 Insulation Characteristics Table, if applicable.
23. Measured between the LED anode and cathode shorted together and pins 5 through 8 shorted together. For dual channel products only.
24. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together. For dual channel products only
14
10
* FOR SINGLE
CHANNEL
PRODUCTS
ONLY
5
0
-60 -40 -20
0
20
40
4
RL = 350 Ω
3
RL = 1 KΩ
2
RL = 4 KΩ
1
0
80 100
60
5
0
TA – TEMPERATURE – °C
8-PIN DIP, SO-8
6
5
VCC = 5.0 V
VO = 0.6 V
4
RL = 350 Ω
3
RL = 1 KΩ
2
1
RL = 4 KΩ
0
-60 -40 -20
0
20
40
60
80 100
3
4
6
5
Figure 2. Typical output voltage vs. forward input current.
TA – TEMPERATURE – °C
Figure 3. Typical input threshold current vs. temperature.
15
2
IF – FORWARD INPUT CURRENT – mA
ITH – INPUT THRESHOLD CURRENT – mA
ITH – INPUT THRESHOLD CURRENT – mA
Figure 1. Typical high level output current vs.
temperature.
1
WIDEBODY
6
5
VCC = 5.0 V
VO = 0.6 V
4
3
RL = 1 KΩ
RL = 350 Ω
2
1
RL = 4 KΩ
0
-60 -40 -20
0
20
40
WIDEBODY
6
VCC = 5 V
TA = 25 °C
VO – OUTPUT VOLTAGE – V
VCC = 5.5 V
VO = 5.5 V
VE = 2.0 V*
IF = 250 μA
VO – OUTPUT VOLTAGE – V
IOH – HIGH LEVEL OUTPUT CURRENT – μA
8-PIN DIP, SO-8
6
15
60
80 100
TA – TEMPERATURE – °C
VCC = 5 V
TA = 25 °C
5
4
RL = 350 Ω
3
RL = 1 KΩ
2
RL = 4 KΩ
1
0
0
1
2
3
4
5
6
IF – FORWARD INPUT CURRENT – mA
* FOR SINGLE
CHANNEL
PRODUCTS ONLY
0.6
0.5
IO = 16 mA
IO = 12.8 mA
0.4
0.3
0.2
IO = 9.6 mA
IO = 6.4 mA
0.1
0
-60 -40 -20
0
20
40
60
80 100
WIDEBODY
0.8
VCC = 5.5 V
VE = 2.0 V
IF = 5.0 mA
0.7
0.6
0.5
IO = 16 mA
IO = 12.8 mA
0.4
0.3
IO = 9.6 mA
IO = 6.4 mA
0.2
0.1
0
-60 -40 -20
TA – TEMPERATURE – °C
0
20
40
60
80 100
8-PIN DIP, SO-8
10
IF - FORWARD CURRENT - mA
IF – FORWARD CURRENT – mA
100
IF
+
VF
–
1.0
0.1
0.01
0.001
1.1
1.2
1.3
1.4
1.5
1.6
WIDEBODY
TA = 25 oC
100
10
IF
+
VF
-
1.0
0.1
0.01
0.001
1.2
1.3
1.4
1.5
1.6
1.7
VF - FORWARD VOLTAGE - V
VF – FORWARD VOLTAGE – V
8-PIN DIP, SO-8
dVF/dT – FORWARD VOLTAGE
TEMPERATURE COEFFICIENT – mV/°C
dVF/dT – FORWARD VOLTAGE
TEMPERATURE COEFFICIENT – mV/°C
Figure 6. Typical input diode forward characteristic.
-2.4
-2.2
-2.0
-1.8
-1.6
-1.4
-1.2
0.1
1
10
100
IF – PULSE INPUT CURRENT – mA
WIDEBODY
-2.3
-2.2
-2.1
-2.0
-1.9
-1.8
0.1
1
10
100
IF – PULSE INPUT CURRENT – mA
Figure 7. Typical temperature coefficient of forward voltage vs. input current.
16
VCC = 5.0 V
VE = 2.0 V*
VOL = 0.6 V
* FOR SINGLE
CHANNEL
PRODUCTS ONLY
60
IF = 10-15 mA
50
IF = 5.0 mA
40
20
-60 -40 -20
0
20
40
60
80 100
Figure 5. Typical low level output current vs.
temperature.
1000
TA = 25 °C
70
TA – TEMPERATURE – °C
TA – TEMPERATURE – °C
Figure 4. Typical low level output voltage vs. temperature.
1000
IOL – LOW LEVEL OUTPUT CURRENT – mA
0.7
VCC = 5.5 V
VE = 2.0 V*
IF = 5.0 mA
VOL – LOW LEVEL OUTPUT VOLTAGE – V
VOL – LOW LEVEL OUTPUT VOLTAGE – V
8-PIN DIP, SO-8
0.8
PULSE GEN.
Z O = 50 Ω
t f = t r = 5 ns
SINGLE CHANNEL
IF
PULSE GEN.
ZO = 50 Ω
t f = t r = 5 ns
INPUT
MONITORING
NODE
DUAL CHANNEL
+5 V
1
VCC 8
2
7
3
6
0.1μF
BYPASS
OUTPUT VO
MONITORING
NODE
4
GND
1
VCC 8
2
7
3
6
4
5
RL
INPUT
MONITORING
NODE
RL
*CL
RM
RM
IF = 7.50 mA
INPUT
IF
IF = 3.75 mA
t PHL
t PLH
OUTPUT
VO
1.5 V
Figure 8. Test circuit for tPHL and tPLH.
80
tPLH , RL = 4 KΩ
tPHL , RL = 350 Ω
1 KΩ
60
4 KΩ
tPLH , RL = 1 KΩ
40
20
tPLH , RL = 350 Ω
0
-60 -40 -20
tP – PROPAGATION DELAY – ns
tP – PROPAGATION DELAY – ns
105
VCC = 5.0 V
IF = 7.5 mA
20
40
60
VCC = 5.0 V
IF = 7.5 mA
RL = 350Ω
0
RL = 1 kΩ
0
20
40
60
80 100
TA - TEMPERATURE - oC
Figure 11. Typical pulse width distortion vs.
temperature.
17
5
9
7
11
13
15
Figure 10. Typical propagation delay vs. pulse
input current.
tr, tf – RISE, FALL TIME – ns
PWD - PULSE WIDTH DISTORTION - ns
RL = 4 kΩ
-10
-60 -40 -20
tPHL , RL = 350 Ω
1 KΩ
4 KΩ
IF – PULSE INPUT CURRENT – mA
40
10
tPLH , RL = 1 KΩ
45
80 100
Figure 9. Typical propagation delay vs. temperature.
20
tPLH , RL = 350 Ω
60
TA – TEMPERATURE – °C
30
tPLH , RL = 4 KΩ
75
30
0
VCC = 5.0 V
TA = 25°C
90
VCC = 5.0 V
IF = 7.5 mA
tRISE
tFALL
RL = 4 kΩ
300
290
60
RL = 1 kΩ
40
RL = 350 Ω
20
0
-60 -40 -20
0.1μF
BYPASS
CL*
5
*CL IS APPROXIMATELY 15 pF WHICH INCLUDES
PROBE AND STRAY WIRING CAPACITANCE.
100
+5 V
IF
RL = 350 Ω, 1 kΩ, 4 kΩ
0 20 40 60 80 100
TA – TEMPERATURE – °C
Figure 12. Typical rise and fall time vs. temperature.
GND
OUTPUT VO
MONITORING
NODE
PULSE GEN.
Z O = 50 Ω
t f = t r = 5 ns
INPUT VE
MONITORING NODE
+5 V
7.5 mA
IF
3.0 V
VCC 8
1
2
0.1 μF
BYPASS
7
3
RL
*C L
GND
1.5 V
t EHL
OUTPUT VO
MONITORING
NODE
6
4
INPUT
VE
t ELH
OUTPUT
VO
1.5 V
5
*C L IS APPROXIMATELY 15 pF WHICH INCLUDES
PROBE AND STRAY WIRING CAPACITANCE.
tE – ENABLE PROPAGATION DELAY – ns
Figure 13. Test circuit for tEHL and tELH.
120
VCC = 5.0 V
VEH = 3.0 V
VEL = 0 V
90 IF = 7.5 mA
tELH, RL = 4 kΩ
60
tELH, RL = 1 kΩ
30
tELH, RL = 350 Ω
tEHL, RL = 350 Ω, 1 kΩ, 4 kΩ
0
-60 -40 -20 0 20 40 60 80 100
TA – TEMPERATURE – °C
Figure 14. Typical enable propagation delay vs.
temperature.
IF
SINGLE CHANNEL
IF
1
VCC 8
B
A
VFF
2
7
3
6
4
GND
DUAL CHANNEL
B
+5 V
0.1 μF
BYPASS
1
A
RL
2
7
3
6
VFF
5
4
VCM
GND
VCM
+
–
PULSE
GENERATOR
Z O = 50 Ω
VCM (PEAK)
VCM
VO
VO
0V
5V
+5 V
RL
OUTPUT VO
MONITORING
NODE
+
–
PULSE
GENERATOR
Z O = 50 Ω
SWITCH AT A: IF = 0 mA
CMH
VO (MIN.)
SWITCH AT B: IF = 7.5 mA
VO (MAX.)
0.5 V
Figure 15. Test circuit for common mode transient immunity and typical waveforms.
18
VCC 8
CML
5
0.1 μF
BYPASS
OUTPUT VO
MONITORING
NODE
PS (mW)
700
IS (mA)
600
500
400
300
200
100
0
0
25
50
75 100 125 150 175 200
TS – CASE TEMPERATURE – °C
OUTPUT POWER – PS, INPUT CURRENT – IS
OUTPUT POWER – PS, INPUT CURRENT – IS
HCPL-2611 OPTION 060
800
HCNWXXXX
PS (mW)
IS (mA)
800
700
600
500
400
300
200
100
0
0
25
50
75
100 125 150 175
TS – CASE TEMPERATURE – °C
Figure 16. Thermal derating curve, dependence of safety limiting value with case temperature
per IEC/EN/DIN EN 60747-5-2.
GND BUS (BACK)
VCC BUS (FRONT)
NC
ENABLE
0.1μF
NC
OUTPUT
10 mm MAX.
(SEE NOTE 5)
Figure 17. Recommended printed circuit board layout.
19
SINGLE CHANNEL
DEVICE ILLUSTRATED.
SINGLE CHANNEL DEVICE
VCC1 5 V
5V
8
VCC2
390 Ω
470 Ω
IF
2
6
+
D1*
VF
–
GND 1
0.1 μF
BYPASS
3
5
SHIELD
GND 2
VE 7
1
2
*DIODE D1 (1N916 OR EQUIVALENT) IS NOT REQUIRED FOR UNITS WITH OPEN COLLECTOR OUTPUT.
DUAL CHANNEL DEVICE
CHANNEL 1 SHOWN
VCC1 5 V
5V
8
VCC2
390 Ω
470 Ω
IF
1
7
+
D1*
0.1 μF
BYPASS
VF
–
GND 1
2
5
1
Figure 18. Recommended TTL/LSTTL to TTL/LSTTL interface circuit.
20
GND 2
SHIELD
2
Propagation Delay, Pulse-Width Distortion and Propagation
Delay Skew
Propagation delay is a figure of merit which describes
how quickly a logic signal propagates through a system. The propagation delay from low to high (tPLH) is the
amount of time required for an input signal to propagate
to the output, causing the output to change from low to
high. Similarly, the propagation delay from high to low
(tPHL) is the amount of time required for the input signal
to propagate to the output causing the output to change
from high to low (see Figure 8).
Pulse-width distortion (PWD) results when tPLH and tPHL
differ in value. PWD is defined as the difference between tPLH and tPHL and often determines the maximum
data rate capability of a transmission system. PWD can
be expressed in percent by dividing the PWD (in ns) by
the minimum pulse width (in ns) being transmitted. Typically, PWD on the order of 20-30% of the minimum pulse
width is tolerable; the exact figure depends on the particular application (RS232, RS422, T-l, etc.).
Propagation delay skew, tPSK, is an important parameter to
consider in parallel data applications where synchronization of signals on parallel data lines is a concern. If the
parallel data is being sent through a group of optocouplers, differences in propagation delays will cause the
data to arrive at the outputs of the optocouplers at different times. If this difference in propagation delays is large
enough, it will determine the maximum rate at which
parallel data can be sent through the optocouplers.
Propagation delay skew is defined as the difference between the minimum and maximum propagation delays,
either tPLH or tPHL, for any given group of optocouplers
which are operating under the same conditions (i.e., the
same drive current, supply voltage, output load, and operating temperature). As illustrated in Figure 19, if the in-
puts of a group of optocouplers are switched either ON
or OFF at the same time, tPSK is the difference between
the shortest propagation delay, either tPLH or tPHL, and the
longest propagation delay, either tPLH or tPHL.
As mentioned earlier, tPSK can determine the maximum
parallel data transmission rate. Figure 20 is the timing
diagram of a typical parallel data application with both
the clock and the data lines being sent through optocouplers. The figure shows data and clock signals at the
inputs and outputs of the optocouplers. To obtain the
maximum data transmission rate, both edges of the
clock signal are being used to clock the data; if only one
edge were used, the clock signal would need to be twice
as fast.
Propagation delay skew represents the uncertainty of
where an edge might be after being sent through an
optocoupler. Figure 20 shows that there will be uncertainty in both the data and the clock lines. It is important
that these two areas of uncertainty not overlap, otherwise the clock signal might arrive before all of the data
outputs have settled, or some of the data outputs may
start to change before the clock signal has arrived. From
these considerations, the absolute minimum pulse width
that can be sent through optocouplers in a parallel application is twice tPSK. A cautious design should use a slightly
longer pulse width to ensure that any additional uncertainty in the rest of the circuit does not cause a problem.
The tPSK specified optocouplers offer the advantages of
guaranteed specifications for propagation delays, pulsewidth distortion and propagation delay skew over the
recommended temperature, input current, and power
supply ranges.
DATA
IF
INPUTS
50%
CLOCK
1.5 V
VO
IF
DATA
50%
OUTPUTS
VO
1.5 V
CLOCK
t PSK
Figure 19. Illustration of propagation delay skew - tPSK.
21
t PSK
t PSK
Figure 20. Parallel data transmission example.
For product information and a complete list of distributors, please go to our website:
www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries.
Data subject to change. Copyright © 2005-2010 Avago Technologies Limited. All rights reserved. Obsoletes AV02-0170EN
AV02-0940EN - March 29, 2010
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