Maxim MAX5418META 256-tap, nonvolatile, i2c-interface, digital potentiometer Datasheet

19-3185; Rev 3; 3/09
256-Tap, Nonvolatile, I2C-Interface,
Digital Potentiometers
Features
♦ Power-On Recall of Wiper Position from
Nonvolatile Memory
♦ Tiny 3mm x 3mm 8-Pin TDFN Package
♦ 35ppm/°C End-to-End Resistance Temperature
Coefficient
♦ 5ppm/°C Ratiometric Temperature Coefficient
♦ 50kΩ/100kΩ/200kΩ Resistor Values
♦ Fast I2C-Compatible Serial Interface
♦ 500nA (typ) Static Supply Current
♦ Single-Supply Operation: +2.7V to +5.25V
♦ 256 Tap Positions
♦ ±0.5 LSB DNL in Voltage-Divider Mode
♦ ±0.5 LSB INL in Voltage-Divider Mode
Functional Diagram
H
VDD
GND
8-BIT
SHIFT
REGISTER
8
8-BIT 8
LATCH
256256
POSITION
DECODER
W
L
SDA
SCL
Applications
Mechanical Potentiometer Replacement
Low-Drift Programmable-Gain Amplifiers
Volume Control
Liquid-Crystal Display (LCD) Contrast Control
I2C
INTERFACE
A0
POR
8-BIT
NV
MEMORY
MAX5417
MAX5418
MAX5419
Ordering Information/Selector Guide
PART
MAX5417LETA
2
TEMP RANGE
I C ADDRESS
R (kΩ)
-40°C to +85°C
010100A0
50
8 TDFN-EP**
PIN-PACKAGE
TOP MARK
AIB
ALS
MAX5417META*
-40°C to +85°C
010101A0
50
8 TDFN-EP**
MAX5417NETA*
-40°C to +85°C
010110A0
50
8 TDFN-EP**
ALT
MAX5417PETA*
MAX5418LETA
-40°C to +85°C
-40°C to +85°C
010111A0
010100A0
50
100
8 TDFN-EP**
8 TDFN-EP**
ALU
AIC
MAX5418META*
-40°C to +85°C
010101A0
100
8 TDFN-EP**
ALV
MAX5418NETA*
-40°C to +85°C
010110A0
100
8 TDFN-EP**
ALW
MAX5418PETA*
MAX5419LETA
-40°C to +85°C
-40°C to +85°C
010111A0
010100A0
100
200
8 TDFN-EP**
8 TDFN-EP**
ALX
AID
MAX5419META*
-40°C to +85°C
010101A0
200
8 TDFN-EP**
ALY
MAX5419NETA*
-40°C to +85°C
010110A0
200
8 TDFN-EP**
ALZ
MAX5419PETA*
-40°C to +85°C
*Future product—contact factory for availability.
**Exposed pad.
010111A0
200
8 TDFN-EP**
AMA
Pin Configuration appears at end of data sheet.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1
MAX5417/MAX5418/MAX5419
General Description
The MAX5417/MAX5418/MAX5419 nonvolatile, lineartaper, digital potentiometers perform the function of a
mechanical potentiometer by replacing the mechanics
with a simple 2-wire digital interface, allowing communication with multiple devices. Each device performs the
same function as a discrete potentiometer or variable
resistor and has 256 tap points.
The devices feature an internal, nonvolatile EEPROM
used to store the wiper position for initialization during
power-up. The fast-mode I2C-compatible serial interface
allows communication at data rates up to 400kbps, minimizing board space and reducing interconnection complexity in many applications. Each device is available with
one of four factory-preset addresses (see the Selector
Guide) and features an address input for a total of eight
unique address combinations.
The MAX5417/MAX5418/MAX5419 provide three nominal resistance values: 50kΩ (MAX5417), 100kΩ
(MAX5418), or 200kΩ (MAX5419). The nominal resistor
temperature coefficient is 35ppm/°C end-to-end, and
only 5ppm/°C ratiometric. This makes the devices ideal
for applications requiring a low-temperature-coefficient
variable resistor, such as low-drift, programmable gainamplifier circuit configurations.
The MAX5417/MAX5418/MAX5419 are available in a
3mm x 3mm 8-pin TDFN package, and are specified
over the extended -40°C to +85°C temperature range.
MAX5417/MAX5418/MAX5419
256-Tap, Nonvolatile, I2C-Interface,
Digital Potentiometers
ABSOLUTE MAXIMUM RATINGS
VDD to GND ...........................................................-0.3V to +6.0V
All Other Pins to GND.................................-0.3V to (VDD + 0.3V)
Maximum Continuous Current into H, L, and W
MAX5417......................................................................±1.3mA
MAX5418......................................................................±0.6mA
MAX5419......................................................................±0.3mA
Continuous Power Dissipation (TA = +70°C)
8-Pin TDFN (derate 24.4mW/°C above +70°C) .........1951mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = +2.7V to +5.25V, H = VDD, L = GND, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VDD = +5V, TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DC PERFORMANCE (VOLTAGE-DIVIDER MODE)
Resolution
256
Taps
Integral Nonlinearity
INL
(Note 1)
±0.5
LSB
Differential Nonlinearity
DNL
(Note 1)
±0.5
LSB
End-to-End Temperature
Coefficient
TCR
35
ppm/°C
5
ppm/°C
MAX5417_, 50Ω
MAX5418_, 100kΩ
MAX5419_, 200kΩ
-0.6
-0.3
-0.15
LSB
MAX5417_, 50kΩ
0.6
MAX5418_, 100kΩ
MAX5419_, 200kΩ
0.3
0.15
Ratiometric Temperature
Coefficient
Full-Scale Error
Zero-Scale Error
LSB
DC PERFORMANCE (VARIABLE-RESISTOR MODE)
Integral Nonlinearity
(Note 2)
INL
VDD = 3V
±3
VDD = 5V
±1.5
VDD = 3V, MAX5417_, 50kΩ,
guaranteed monotonic
Differential Nonlinearity
(Note 2)
DNL
-1
LSB
+2
VDD = 3V, MAX5418_, 100kΩ
±1
MAX5419_, 200kΩ
±1
VDD = 5V
±1
LSB
DC PERFORMANCE (RESISTOR CHARACTERISTICS)
Wiper Resistance
RW
Wiper Capacitance
CW
End-to-End Resistance
2
RHL
VDD = 3V to 5.25V (Note 3)
325
675
10
pF
MAX5417_
37.5
50
62.5
MAX5418_
75
100
125
MAX5419_
150
200
250
_______________________________________________________________________________________
Ω
kΩ
256-Tap, Nonvolatile, I2C-Interface,
Digital Potentiometers
(VDD = +2.7V to +5.25V, H = VDD, L = GND, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VDD = +5V, TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DIGITAL INPUTS
Input High Voltage (Note 4)
VIH
VDD = 3.4V to 5.25V
VDD < 3.4V
2.4
V
0.7 x VDD
Input Low Voltage
VIL
VDD = 2.7V to 5.25V (Note 4)
0.8
Low-Level Output Voltage
VOL
3mA sink current
0.4
V
±1
µA
Input Leakage Current
ILEAK
Input Capacitance
5
V
pF
DYNAMIC CHARACTERISTICS
MAX5417_
Wiper -3dB Bandwidth (Note 5)
100
MAX5418_
50
MAX5419_
25
kHz
NONVOLATILE MEMORY
Data Retention
Endurance
TA = +85°C
50
TA = +25°C
200,000
TA = +85°C
50,000
Years
Stores
POWER SUPPLY
Power-Supply Voltage
VDD
Standby Current
IDD
Programming Current
2.70
5.25
V
Digital inputs = VDD or GND,
TA = +25°C
0.5
1
µA
During nonvolatile write;
digital inputs = VDD or GND (Note 6)
200
400
µA
TIMING CHARACTERISTICS
(VDD = +2.7V to +5.25V, H = VDD, L = GND, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VDD = +5V, TA =
+25°C. See Figures 1 and 2.) (Note 7)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
ANALOG SECTION
MAX5417_
Wiper Settling Time (Note 8)
tIL
500
MAX5418_
600
MAX5419_
1000
ns
DIGITAL SECTION
SCL Clock Frequency
fSCL
400
kHz
Setup Time for START Condition
tSU-STA
0.6
µs
Hold Time for START Condition
tHD-STA
0.6
µs
CLK High Time
tHIGH
0.6
µs
CLK Low Time
tLOW
1.3
µs
_______________________________________________________________________________________
3
MAX5417/MAX5418/MAX5419
ELECTRICAL CHARACTERISTICS (continued)
MAX5417/MAX5418/MAX5419
256-Tap, Nonvolatile, I2C-Interface,
Digital Potentiometers
TIMING CHARACTERISTICS (continued)
(VDD = +2.7V to +5.25V, H = VDD, L = GND, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VDD = +5V, TA =
+25°C. See Figures 1 and 2.) (Note 7)
PARAMETER
SYMBOL
CONDITIONS
MIN
Data Setup Time
tSU-DAT
100
Data Hold Time
tHD-DAT
0
TYP
MAX
UNITS
0.9
µs
ns
ns
SDA, SCL Rise Time
tR
300
SDA, SCL Fall Time
tF
300
Setup Time for STOP Condition
tSU-STO
Bus Free Time Between STOP
and START Condition
tBUF
Minimum power-up rate = 0.2V/ms
Pulse Width of Spike Suppressed
tSP
Maximum Capacitive Load for
Each Bus Line
CB
(Note 9)
Write NV Register Busy Time
tBUSY
(Note 10)
ns
0.6
µs
1.3
µs
50
400
ns
pF
12
ms
Note 1: The DNL and INL are measured with the potentiometer configured as a voltage-divider with H = VDD and L = GND. The
wiper terminal is unloaded and measured with a high-input-impedance voltmeter.
Note 2: The DNL and INL are measured with the potentiometer configured as a variable resistor. H is unconnected and L = GND.
For the 5V condition, the wiper terminal is driven with a source current of 80µA for the 50kΩ configuration, 40µA for the
100kΩ configuration, and 20µA for the 200kΩ configuration. For the 3V condition, the wiper terminal is driven with a source
current of 40µA for the 50kΩ configuration, 20µA for the 100kΩ configuration, and 10µA for the 200kΩ configuration.
Note 3: The wiper resistance is measured using the source currents given in Note 2. For operation to VDD = 2.7V, see Wiper
Resistance vs. Temperature in the Typical Operating Characteristics.
Note 4: The device draws higher supply current when the digital inputs are driven with voltages between (VDD - 0.5V) and (GND +
0.5V). See Supply Current vs. Digital Input Voltage in the Typical Operating Characteristics.
Note 5: Wiper at midscale with a 10pF load (DC measurement). L = GND; an AC source is applied to H; and the W output is measured. A 3dB bandwidth occurs when the AC W/H value is 3dB lower than the DC W/H value.
Note 6: The programming current operates only during power-up and NV writes.
Note 7: SCL clock period includes rise and fall times tR and tF. All digital input signals are specified with tR = tF = 2ns and timed
from a voltage level of (VIL + VIH) / 2.
Note 8: Wiper settling time is the worst-case 0% to 50% rise time measured between consecutive wiper positions. H = VDD,
L = GND, and the wiper terminal is unloaded and measured with a 10pF oscilloscope probe (see the Typical Operating
Characteristics for the tap-to-tap switching transient).
Note 9: An appropriate bus pullup resistance must be selected depending on board capacitance. Refer to the document linked to
this web address: www.semiconductors.philips.com/acrobat/literature/9398/39340011.pdf.
Note 10: The idle time begins from the initiation of the stop pulse.
4
_______________________________________________________________________________________
256-Tap, Nonvolatile, I2C-Interface,
Digital Potentiometers
INL vs. TAP POSITION
0.05
0
-0.05
-0.10
0.10
0.05
0
-0.05
-0.10
-0.15
-0.15
-0.20
-0.20
-0.25
32
64
96
500
400
300
200
100
-0.25
0
128 160 192 224 256
0
32
TAP POSITION
64
96
128 160 192 224 256
0
32
64
TAP POSITION
96
128 160 192 224 256
TAP POSITION
END-TO-END RESISTANCE % CHANGE
vs. TEMPERATURE
WIPER TRANSIENT AT POWER-ON
MAX5417 toc04
W
1V/div
CL = 10pF
TAP = 128
H = VDD
MAX5417 toc05
1.0
END-TO-END RESISTANCE % CHANGE
VDD
2V/div
0.8
0.6
0.4
0.2
0
-0.2
-0.4
-0.6
-0.8
-1.0
4µs/div
-40
-15
10
35
85
60
TEMPERATURE (°C)
STANDBY SUPPLY CURRENT
vs. TEMPERATURE
WIPER RESISTANCE vs. TEMPERATURE
700
600
RESISTANCE (Ω)
0.8
0.6
0.4
0.2
MAX5417 toc07
1.0
MAX5417 toc06
0
VDD = 2.7V
ISRC = 50µA
600
RESISTANCE (Ω)
RESISTANCE INL (LSB)
0.15
0.10
STANDBY SUPPLY CURRENT (µA)
RESISTANCE DNL (LSB)
0.15
VOLTAGE-DIVIDER MODE
0.20
700
MAX5417 toc02
MAX5417 toc01
VOLTAGE-DIVIDER MODE
0.20
WIPER RESISTANCE vs. TAP POSITION
0.25
MAX5417 toc03
DNL vs. TAP POSITION
0.25
VDD = 2.7V
500
400
VDD = 3.0V
300
VDD = 4.5V
200
VDD = 5.25V
100
0
0
-40
-15
10
35
TEMPERATURE (°C)
60
85
-40
-15
10
35
60
85
TEMPERATURE (°C)
_______________________________________________________________________________________
5
MAX5417/MAX5418/MAX5419
Typical Operating Characteristics
(VDD = +5V, TA = +25°C, unless otherwise noted.)
Typical Operating Characteristics (continued)
(VDD = +5V, TA = +25°C, unless otherwise noted.)
INL vs. TAP POSITION
(MAX5417)
THD+N RESPONSE
10
400
1:1 RATIO
20Hz TO 20kHz BANDPASS
THD+N (%)
1
300
0.1
200
0.01
100
0.001
VARIABLE-RESISTOR MODE
VDD = 2.7V
ISRC = 50µA
2.5
RESISTANCE INL (LSB)
500
3.0
MAX5417 toc09
100
MAX5417 toc08
600
2.0
MAX5417 toc10
SUPPLY CURRENT
vs. DIGITAL INPUT VOLTAGE
SUPPLY CURRENT (µA)
1.5
1.0
0.5
0
-0.5
0.0001
0
1
2
3
5
4
-1.0
10
DIGITAL INPUT VOLTAGE (V)
100
1k
10k
100k
96
1.00
VARIABLE-RESISTOR MODE
VDD = 2.7V
ISRC = 10µA
0.75
0.50
INL (LSB)
1.0
INL (LSB)
64
128 160 192 224 256
INL vs. TAP POSITION
(MAX5419)
MAX5417 toc11
VARIABLE-RESISTOR MODE
VDD = 2.7V
ISRC = 20µA
1.5
32
TAP POSITION
INL vs. TAP POSITION
(MAX5418)
2.0
0
FREQUENCY (Hz)
0.5
MAX5417 toc12
0
0.25
0
-0.25
0
-0.50
-0.5
-0.75
-1.00
32
64
96
0
128 160 192 224 256
32
64
96
128 160 192 224 256
TAP POSITION
TAP POSITION
DNL vs. TAP POSITION
(MAX5417)
DNL vs. TAP POSITION
(MAX5418)
0.5
VARIABLE-RESISTOR MODE
0.4
0.3
MAX5417 toc13
0
VARIABLE-RESISTOR MODE
VDD = 2.7V
ISRC = 20µA
0.2
0.3
MAX5417 toc14
-1.0
0.1
0.2
DNL (LSB)
DNL (LSB)
MAX5417/MAX5418/MAX5419
256-Tap, Nonvolatile, I2C-Interface,
Digital Potentiometers
0.1
0
0
-0.1
-0.1
-0.2
-0.2
-0.3
0
32
64
96
128 160 192 224 256
TAP POSITION
6
-0.3
0
32
64
96
128 160 192 224 256
TAP POSITION
_______________________________________________________________________________________
256-Tap, Nonvolatile, I2C-Interface,
Digital Potentiometers
MIDSCALE WIPER RESPONSE vs. FREQUENCY
(MAX5417)
-5
-0.1
-0.2
CL = 10pF
-10
-15
CL = 50pF
-20
-25
-0.3
32
64
96
CL = 10pF
-10
-15
CL = 50pF
-20
-30
1
128 160 192 224 256
MAX5418
TAP = 128
-5
-25
-30
TAP POSITION
10
100
1000
1
FREQUENCY (kHz)
MIDSCALE WIPER RESPONSE vs. FREQUENCY
(MAX5419)
10
100
1000
FREQUENCY (kHz)
TAP-TO-TAP SWITCHING TRANSIENT
(MAX5417)
MAX5417 toc19
0
MAX5417 toc18
0
0
WIPER RESPONSE (dB)
WIPER RESPONSE (dB)
0
-5
MAX5419
TAP = 128
-10
WIPER RESPONSE (dB)
DNL (LSB)
0.1
MAX5417
TAP = 128
MAX5417 toc16
VARIABLE-RESISTOR MODE
VDD = 2.7V
ISRC = 10µA
0.2
0
MAX5417 toc15
0.3
MIDSCALE WIPER RESPONSE vs. FREQUENCY
(MAX5418)
MAX5417 toc17
DNL vs. TAP POSITION
(MAX5419)
CL = 10pF
SDA
2V/div
-15
-20
CL = 50pF
-25
MAX5417
CL = 10pF
FROM TAP 127
TO TAP 128
H = VDD
-30
-35
-40
W
10mV/div
-45
1
10
100
1000
1µs/div
FREQUENCY (kHz)
TAP-TO-TAP SWITCHING TRANSIENT
(MAX5418)
TAP-TO-TAP SWITCHING TRANSIENT
(MAX5419)
MAX5417 toc20
MAX5417 toc21
SDA
2V/div
SDA
2V/div
W
10mV/div
W
10mV/div
MAX5418
CL = 10pF
FROM TAP 127
TO TAP 128
H = VDD
1µs/div
MAX5419
CL = 10pF
FROM TAP 127
TO TAP 128
H = VDD
1µs/div
_______________________________________________________________________________________
7
MAX5417/MAX5418/MAX5419
Typical Operating Characteristics (continued)
(VDD = +5V, TA = +25°C, unless otherwise noted.)
256-Tap, Nonvolatile, I2C-Interface,
Digital Potentiometers
MAX5417/MAX5418/MAX5419
Pin Description
PIN
NAME
FUNCTION
1
VDD
Power-Supply Input. 2.7V to 5.25V voltage range. Bypass with a 0.1µF capacitor from VDD to GND.
2
SCL
I2C-Interface Clock Input
3
SDA
I2C-Interface Data Input
4
A0
5
GND
Address Input. Sets the A0 bit in the device ID address.
6
L
Low Terminal
7
W
Wiper Terminal
8
H
High Terminal
—
EP
Exposed Pad. Internally connected to GND. Connect to a large ground plane to maximize thermal
performance. Not intended as an electrical point.
Ground
tR
tF
SDA
tSU-DAT
tHD-DAT
tLOW
tBUF
tHD-STA
tSU-STA
tSU-STO
SCL
tHIGH
tHD-STA
tF
tR
S
Sr
A
P
S
PARAMETERS ARE MEASURED FROM 30% TO 70%.
Figure 1. I2C Serial-Interface Timing Diagram
Detailed Description
VDD
IOL = 3mA
VOUT
SDA
400pF
IOH = 0mA
Figure 2. Load Circuit
8
The MAX5417/MAX5418/MAX5419 contain a resistor
array with 255 resistive elements. The MAX5417 has a
total end-to-end resistance of 50kΩ, the MAX5418 has
an end-to-end resistance of 100kΩ, and the MAX5419
has an end-to-end resistance of 200kΩ. The
MAX5417/MAX5418/MAX5419 allow access to the high,
low, and wiper terminals for a standard voltage-divider
configuration. H, L, and W can be connected in any
desired configuration as long as their voltages fall
between GND and VDD.
A simple 2-wire I2C-compatible serial interface moves
the wiper among the 256 tap points. A nonvolatile memory stores the wiper position and recalls the stored wiper
position in the nonvolatile memory upon power-up. The
nonvolatile memory is guaranteed for 50 years for wiper
data retention and up to 200,000 wiper store cycles.
_______________________________________________________________________________________
256-Tap, Nonvolatile, I2C-Interface,
Digital Potentiometers
Digital Interface
The MAX5417/MAX5418/MAX5419 feature an internal,
nonvolatile EEPROM that stores the wiper state for initialization during power-up. The shift register decodes
the control and address bits, routing the data to the
proper memory registers. Data can be written to a
volatile memory register, immediately updating the
wiper position, or data can be written to a nonvolatile
register for storage.
The volatile register retains data as long as the device
is powered. Once power is removed, the volatile register is cleared. The nonvolatile register retains data even
after power is removed. Upon power-up, the power-on
reset circuitry controls the transfer of data from the nonvolatile register to the volatile register.
Start and Stop Conditions
Both SCL and SDA remain high when the interface is
not busy. A master signals the beginning of a transmission with a START condition by transitioning SDA from
high to low while SCL is high. When the master has finished communicating with the slave, it issues a STOP
condition by transitioning the SDA from low to high
while SCL is high. The bus is then free for another
transmission (Figure 3).
SDA
Bit Transfer
One data bit is transferred during each clock pulse.
The data on the SDA line must remain stable while SCL
is high (Figure 5).
SCL
S
P
START
CONDITION
STOP
CONDITION
Figure 3. Start and Stop Conditions
SDA
0
1
0
1
MSB
0*
0*
A0
NOP/W
ACK
LSB
SCL
*See the Ordering Information/Selector Guide section for other address options.
Figure 4. Slave Address
SMBus is a trademark of Intel Corporation.
_______________________________________________________________________________________
9
MAX5417/MAX5418/MAX5419
Serial Addressing
The MAX5417/MAX5418/MAX5419 operate as a slave
that receives data through an I2C- and SMBus™-compatible 2-wire interface. The interface uses a serial data
access (SDA) line and a serial clock line (SCL) to
achieve communication between master(s) and
slave(s). A master, typically a microcontroller, initiates
all data transfers to the MAX5417/MAX5418/MAX5419,
and generates the SCL clock that synchronizes the
data transfer (Figure 1).
The MAX5417/MAX5418/MAX5419 SDA line operates
as both an input and an open-drain output. A pullup
resistor, typically 4.7kΩ, is required on the SDA bus.
The MAX5417/MAX5418/MAX5419 SCL operates only
as an input. A pullup resistor, typically 4.7kΩ, is
required on the SCL bus if there are multiple masters
on the 2-wire interface, or if the master in a single-master system has an open-drain SCL output.
Each transmission consists of a START (S) condition
(Figure 3) sent by a master, followed by the
MAX5417/MAX5418/MAX5419 7-bit slave address plus
the 8th bit (Figure 4), 1 command byte (Figure 7) and 1
data byte, and finally a STOP (P) condition (Figure 3).
Analog Circuitry
The MAX5417/MAX5418/MAX5419 consist of a resistor
array with 255 resistive elements; 256 tap points are
accessible to the wiper, W, along the resistor string
between H and L. The wiper tap point is selected by
programming the potentiometer through the 2-wire (I2C)
interface. Eight data bits, an address byte, and a control byte program the wiper position. The H and L terminals of the MAX5417/MAX5418/MAX5419 are similar to
the two end terminals of a mechanical potentiometer.
The MAX5417/MAX5418/MAX5419 feature power-on
reset circuitry that loads the wiper position from nonvolatile memory at power-up.
MAX5417/MAX5418/MAX5419
256-Tap, Nonvolatile, I2C-Interface,
Digital Potentiometers
Table 1. MAX5417/MAX5418/MAX5419 Address Codes
ADDRESS BYTE
PART SUFFIX
A6
A5
A4
A3
A2
A1
A0
NOP/W
L
0
1
0
1
0
0
0
NOP/W
L
0
1
0
1
0
0
1
NOP/W
M
0
1
0
1
0
1
0
NOP/W
M
0
1
0
1
0
1
1
NOP/W
N
0
1
0
1
1
0
0
NOP/W
N
0
1
0
1
1
0
1
NOP/W
P
0
1
0
1
1
1
0
NOP/W
P
0
1
0
1
1
1
1
NOP/W
Acknowledge
The acknowledge bit is a clocked 9th bit that the recipient
uses to handshake receipt of each byte of data (Figure
6). Thus, each byte transferred effectively requires 9 bits.
The master generates the 9th clock pulse, and the recipient pulls down SDA during the acknowledge clock pulse,
so the SDA line is stable low during the high period of the
clock pulse. When the master transmits to the
MAX5417/MAX5418/MAX5419, the devices generate the
acknowledge bit because the MAX5417/MAX5418/
MAX5419 are the recipients.
Slave Address
The MAX5417/MAX5418/MAX5419 have a 7-bit-long
slave address (Figure 4). The 8th bit following the 7-bit
slave address is the NOP/W bit. Set the NOP/W bit low for
a write command and high for a no-operation command.
The MAX5417/MAX5418/MAX5419 are available in one
of four possible slave addresses (Table 1). The first 4
bits (MSBs) of the MAX5417/MAX5418/MAX5419 slave
addresses are always 0101. The next 2 bits are factory
programmed (see Table 1). Connect the A0 input to
either GND or V DD to toggle between two unique
device addresses for a part. Each device must have a
unique address to share the bus. Therefore, a maximum of eight MAX5417/MAX5418/MAX5419 devices
can share the same bus.
CLOCK PULSE FOR
ACKNOWLEDGMENT
START
CONDITION
SDA
SCL
1
2
8
NOT ACKNOWLEDGE
SCL
SDA
DATA STABLE,
DATA VALID
Figure 5. Bit Transfer
10
CHANGE OF
DATA ALLOWED
ACKNOWLEDGE
Figure 6. Acknowledge
______________________________________________________________________________________
9
256-Tap, Nonvolatile, I2C-Interface,
Digital Potentiometers
D14
D13
D12
D11
D10
D9
MAX5417/MAX5418/MAX5419
D15
CONTROL BYTE IS STORED ON RECEIPT OF STOP CONDITION
D8
ACKNOWLEDGE FROM
MAX5417/MAX5418/MAX5419
S
SLAVE ADDRESS
0
CONTROL BYTE
A
A
P
ACKNOWLEDGE FROM
MAX5417/MAX5418/MAX5419
NOP/W
Figure 7. Command Byte Received
ACKNOWLEDGE FROM
MAX5417/MAX5418/MAX5419
HOW CONTROL BYTE AND DATA BYTE MAP INTO
MAX5417/MAX5418/MAX5419 REGISTERS
D15 D14 D13 D12 D11 D10
D9
ACKNOWLEDGE FROM
MAX5417/MAX5418/MAX5419
D8
D7
D6
D5
D4
D3
D2
D1
D0
ACKNOWLEDGE FROM
MAX5417/MAX5418/MAX5419
S
SLAVE ADDRESS
0
A
CONTROL BYTE
NOP/W
A
DATA BYTE
A
P
1 BYTE
Figure 8. Command and Single Data Byte Received
Message Format for Writing
A write to the MAX5417/MAX5418/MAX5419 consists of
the transmission of the device’s slave address with the
8th bit set to zero, followed by at least 1 byte of information (Figure 7). The 1st byte of information is the
command byte. The bytes received after the command
byte are the data bytes. The 1st data byte goes into the
internal register of the MAX5417/MAX5418/MAX5419 as
selected by the command byte (Figure 8).
Command Byte
Use the command byte to select the source and destination of the wiper data (nonvolatile or volatile memory
registers) and swap data between nonvolatile and
volatile memory registers (see Table 2).
Command Descriptions
VREG: The data byte writes to the volatile memory register and the wiper position updates with the data in the
volatile memory register.
NVREG: The data byte writes to the nonvolatile memory register. The wiper position is unchanged.
NVREGxVREG: Data transfers from the nonvolatile
memory register to the volatile memory register (wiper
position updates).
VREGxNVREG: Data transfers from the volatile memory register into the nonvolatile memory register.
______________________________________________________________________________________
11
MAX5417/MAX5418/MAX5419
256-Tap, Nonvolatile, I2C-Interface,
Digital Potentiometers
Table 2. Command Byte Summary
ADDRESS BYTE
SCL CYCLE
NUMBER
S
1
2
A6 A5
0
VREG
1
5
6
CONTROL BYTE
3
4
7
A4
A3
A2 A1
A0
0
1
A2 A1
A0
8
9
10
ACK
0
DATA BYTE
11
12
13
14
15
16
17
18
TX
NV
V
R3
R2
R1
R0
ACK
D7
D6
D5
D4
0
0
1
0
0
0
1
D7
D6
D5
D4
0
19
20
21
22
23
24
25
26
27
D3
D2
D1
D0
ACK
D3
D2
D1
D0
NVREG
0
1
0
1
A2 A1
A0
0
0
0
1
0
0
0
0
1
D7
D6
D5
D4
D3
D2
D1
D0
NVREGxVREG
0
1
0
1
A2 A1
A0
0
0
1
1
0
0
0
0
1
X
X
X
X
X
X
X
X
VREGxNVREG
0
1
0
1
A2 A1
A0
0
0
1
0
1
0
0
0
1
X
X
X
X
X
X
X
X
P
X = Don’t care.
Nonvolatile Memory
Positive LCD Bias Control
The internal EEPROM consists of an 8-bit nonvolatile
register that retains the value written to it before the
device is powered down. The nonvolatile register is
programmed with the midscale value at the factory.
Figures 9 and 10 show an application where the voltage-divider or variable resistor is used to make an
adjustable, positive LCD bias voltage. The op amp provides buffering and gain to the resistor-divider network
made by the potentiometer (Figure 9) or to a fixed
resistor and a variable resistor (see Figure 10).
Power-Up
Upon power-up, the MAX5417/MAX5418/MAX5419
load the data stored in the nonvolatile memory register
into the volatile memory register, updating the wiper
position with the data stored in the nonvolatile memory
register. This initialization period takes 10µs.
Standby
The MAX5417/MAX5418/MAX5419 feature a low-power
standby. When the device is not being programmed, it
goes into standby mode and power consumption is
typically 500nA.
Programmable Filter
Figure 11 shows the configuration for a 1st-order programmable filter. The gain of the filter is adjusted by
R2, and the cutoff frequency is adjusted by R3. Use the
following equations to calculate the gain (G) and the
3dB cutoff frequency (fC):
R1
R2
1
fC =
2π × R3 × C
G = 1+
Applications Information
The MAX5417/MAX5418/MAX5419 are intended for circuits requiring digitally controlled adjustable resistance, such as LCD contrast control (where voltage
biasing adjusts the display contrast), or for programmable filters with adjustable gain and/or cutoff frequency.
5V
5V
H
30V
30V
W
MAX5417
MAX5418
MAx5419
L
VOUT
H
VOUT
MAX5417
MAX5418
MAX5419
W
L
Figure 9. Positive LCD Bias Control Using a Voltage-Divider
12
Figure 10. Positive LCD Bias Control Using a Variable Resistor
______________________________________________________________________________________
256-Tap, Nonvolatile, I2C-Interface,
Digital Potentiometers
5V
VIN
L
H
R3
C
MAX5417
MAX5418
MAX5419
VOUT
7
3
R1
1
8
6
MAX410
2
H
MAX5417
MAX5418
MAX5419
4
W
R2
W
-5V
L
R2
L
R1
H
Figure 13. Offset Voltage and Gain Adjustment Circuit
Figure 11. Programmable Filter
Pin Configuration
+5V
VIN
V0 REF
OUT
TOP VIEW
H
MAX6160
ADJ
MAX5417
MAX5418
MAX5419
VDD 1
W
GND
8 H
SCL 2
L
7 W
MAX5417
MAX5418
MAX5419
SDA 3
A0 4
6 L
5 GND
V0 = 1.23V 50kΩ FOR THE MAX5417
R2(kΩ)
V0 = 1.23V 100kΩ FOR THE MAX5418
R2(kΩ)
200kΩ
V0 = 1.23V
FOR THE MAX5419
R2(kΩ)
TDFN
Figure 12. Adjustable Voltage Reference
Chip Information
Adjustable Voltage Reference
Figure 12 shows the MAX5417/MAX5418/MAX5419 used
as the feedback resistors in multiple adjustable voltagereference applications. Independently adjust the output
voltage of the MAX6160 from 1.23V to VIN - 0.2V by
changing the wiper positions of the MAX5417/
MAX5418/MAX5419.
Offset Voltage and Gain Adjustment
Connect the high and low terminals of one potentiometer
of a MAX5417 between the NULL inputs of a MAX410
and the wiper to the op amp’s positive supply to nullify
the offset voltage over the operating temperature range.
Install the other potentiometer in the feedback path to
adjust the gain of the MAX410 (see Figure 13).
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages.
PACKAGE TYPE
PACKAGE CODE
DOCUMENT NO.
8 TDFN-EP
T833-1
21-0137
______________________________________________________________________________________
13
MAX5417/MAX5418/MAX5419
W
MAX5417/MAX5418/MAX5419
256-Tap, Nonvolatile, I2C-Interface,
Digital Potentiometers
Revision History
REVISION
NUMBER
REVISION
DATE
0
2/04
Initial release
—
1
4/04
Adding future product
—
3
2/04
Adding new part
3
3/09
Changes to add details about exposed pad, corrections to Table 2, style edits
DESCRIPTION
PAGES
CHANGED
—
1, 8, 12–15
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
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