ON NCP4640H080T1G 50 ma, wide input range, voltage regulator Datasheet

NCP4640
50 mA, Wide Input Range,
Voltage Regulator
The NCP4640 is a CMOS 50 mA linear voltage regulator with high
input voltage and ultra−low supply current. It incorporates multiple
protection features such as peak current limit, short circuit current
limit and thermal shutdown to ensure a very robust device.
A high maximum input voltage tolerance of 50 V and a wide
temperature range make the NCP4640 suitable for a variety of
demanding applications.
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MARKING
DIAGRAMS
Features
•
•
•
•
•
•
•
•
•
•
Operating Input Voltage Range: 4 V to 36 V
Output Voltage Range: 2.0 to 12.0 V (0.1 steps)
±2% Output Voltage Accuracy
Output Current: min 50 mA (VIN = 8 V, VOUT = 5 V)
Line Regulation: 0.05%/V
Peak Current Limit Circuit
Short Current Limit Circuit
Thermal Shutdown Circuit
Available in SOT−89−5 and SOIC6−TL Package
These are Pb−Free Devices
SOIC6−TL
CASE 751BR
XXX
XMM
SOT−89 5
CASE 528AB
• Power source for home appliances
• Power source for car audio equipment, navigation system
• Power source for notebooks, digital TVs, cordless phones and private
LAN systems
• Power source for office equipment machines such as copiers,
printers, facsimiles, scanners, projectors, etc.
NCP4640x
VIN
C1
100n
CE
VOUT
GND
1
1
Typical Applications
VIN
XXX
XMM
XXXX
MM
= Specific Device Code
= Date Code
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 15 of this data sheet.
VOUT
C2
100n
Figure 1. Typical Application Schematic
© Semiconductor Components Industries, LLC, 2011
February, 2011 − Rev. 1
1
Publication Order Number:
NCP4640/D
NCP4640
VIN
VOUT
Internal
VR
Vref
Current Limit
Short Protection
Thermal Shutdown
CE
GND
Figure 2. Simplified Schematic Block Diagram
PIN FUNCTION DESCRIPTION
Pin No.
SOT89
Pin No.
SOIC6−TL
Pin Name
5
6
VIN
Input pin
2
2
GND
Ground pin, all ground pins must be connected together when it is
mounted on board
4
4
GND
Ground pin, all ground pins must be connected together when it is
mounted on board
−
5
GND
Ground pin, all ground pins must be connected together when it is
mounted on board
3
3
CE
1
1
VOUT
Description
Chip enable pin (“H” active)
Output pin
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2
NCP4640
ABSOLUTE MAXIMUM RATINGS
Symbol
Value
Unit
Input Voltage
Rating
VIN
−0.3 to 50
V
Peak Input Voltage (Note 1)
VIN
60
V
Output Voltage
VOUT
−0.3 to VIN + 0.3 ≤ 50
V
Chip Enable Input
VCE
−0.3 to VIN + 0.3 ≤ 50
V
Output Current
IOUT
150
mA
900
mW
PD
Power Dissipation SOT−89
Power Dissipation SOIC6−TL
1700
Junction Temperature
TJ
−40 to 150
°C
Storage Temperature
TSTG
−55 to 125
°C
ESD Capability, Human Body Model (Note 2)
ESDHBM
2000
V
ESD Capability, Machine Model (Note 2)
ESDMM
200
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Duration time = 200 ms
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
Latchup Current Maximum Rating tested per JEDEC standard: JESD78.
THERMAL CHARACTERISTICS
Rating
Symbol
Value
Unit
Thermal Characteristics, SOT−89
Thermal Resistance, Junction−to−Air
RqJA
111
°C/W
Thermal Characteristics, SOIC6−TL
Thermal Resistance, Junction−to−Air
RqJA
59
°C/W
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3
NCP4640
ELECTRICAL CHARACTERISTICS TA = 25°C
Parameter
Test Conditions
Operating Input Voltage
Output Voltage
Output Voltage Temp.
Coefficient
Line Regulation
Load Regulation
Dropout Voltage
Output Current
VIN = VOUT + 3 V, IOUT = 1 mA
Symbol
Min
Max
Unit
VIN
4
36
V
VOUT
x0.98
x1.02
V
VIN = VOUT + 3 V, IOUT = 1 mA, TA = −40 to
105°C
VIN = VOUT + 1.5 V to 36 V, IOUT = 1 mA
VIN = VOUT + 3 V,
IOUT = 1 mA to 40 mA
IOUT = 20 mA
2.0 V ≤ VOUT < 5.0 V
ppm/°C
±100
LineReg
0.05
0.20
%/V
LoadReg
10
25
mV
20
35
5.0 V ≤ VOUT < 12.0 V
2.0 V ≤ VOUT < 3.7 V
Typ
VDO
(Note 3)
3.7 V ≤ VOUT < 4.0 V
0.35
0.60
4.0 V ≤ VOUT < 5.0 V
0.25
0.40
5.0 V ≤ VOUT < 12.0 V
0.20
0.35
50
V
VIN = VOUT + 3 V
IOUT
mA
Short Current Limit
VOUT = 0 V
ISC
50
Quiescent Current
VIN = VOUT + 3 V, IOUT = 0 mA
IQ
9
20
mA
Standby Current
VIN = 36 V, VCE = 0 V
ISTB
0.1
1
mA
CE Pin Threshold Voltage
CE Input Voltage “H”
VCEH
1.5
VIN
V
CE Input Voltage “L”
VCEL
0
0.3
mA
Thermal Shutdown Temperature
TSD
150
°C
Thermal Shutdown Release
Temperature
TSR
125
°C
VIN = 5.0 V, VOUT = 2.0 V, ΔVIN PK−PK = 0.2 V,
IOUT = 30 mA, f = 1 kHz
PSRR
30
dB
VOUT = 2.0 V, IOUT = 30 mA, f = 10 Hz to
100 kHz
VN
80
mVrms
Power Supply Rejection Ratio
Output Noise Voltage
3. Dropout voltage for 2.0 V ≤ VOUT < 3.7 V can be computed by this formula: VDO = 4 V − VOUTSET
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NCP4640
TYPICAL CHARACTERISTICS
2.5
3.5
2.0
VIN = 4.0 V
1.5
2.5
1.0
5.5 V
VIN = 6.5 V
5.5 V
VOUT (V)
VOUT (V)
5.0 V
5.0 V
6.0 V
3.0
4.5 V
2.0
1.5
1.0
0.5
0.0
0.5
0
50
100
IOUT (mA)
150
200
0.0
0
50
Figure 3. Output Voltage vs. Output Current
2.0 V Version (TJ = 255C)
5.0
VOUT (V)
VOUT (V)
10.0
11.5 V
6.0
10 V
4.0
14.5 V
15 V
12.0
11 V
7.0
3.0
15.5 V
8.0
14 V
6.0
4.0
2.0
2.0
1.0
0
50
100
150
200
0.0
0
50
150
200
IOUT (mA)
Figure 5. Output Voltage vs. Output Current
8.0 V Version (TJ = 255C)
Figure 6. Output Voltage vs. Output Current
12 V Version (TJ = 255C)
1.50
1.50
1.25
1.25
1.00
1.00
0.75
0.50
TJ = 25°C
0.75
0.50
105°C
TJ = 25°C
0.25
0.25
−40°C
0
100
IOUT (mA)
VDO (V)
VDO (V)
200
14.0
10.5 V
8.0
0.00
150
Figure 4. Output Voltage vs. Output Current
3.3 V Version (TJ = 255C)
9.0
0.0
100
IOUT (mA)
10
20
30
IOUT (mA)
40
0.00
50
Figure 7. Dropout Voltage vs. Output Current
8.0 V Version
105°C
−40°C
0
10
20
30
IOUT (mA)
40
Figure 8. Dropout Voltage vs. Output Current
12 V Version
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5
50
NCP4640
TYPICAL CHARACTERISTICS
3.40
2.10
VIN = 5.0 V
2.06
3.36
2.04
3.34
2.02
3.32
2.00
1.98
3.26
3.24
1.92
3.22
−20
0
20
40
60
80
3.20
−40
100
20
40
60
80
100
TJ, JUNCTION TEMPERATURE (°C)
Figure 10. Output Voltage vs. Temperature,
3.3 V Version
12.20
VIN = 11 V
12.05
VOUT (V)
8.05
8.00
7.95
12.00
11.95
7.90
11.90
7.85
11.85
−20
0
20
40
60
80
VIN = 15 V
12.15
12.10
11.80
−40
100
−20
0
20
40
60
80
100
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 11. Output Voltage vs. Temperature,
8.0 V Version
Figure 12. Output Voltage vs. Temperature,
12 V Version
14
16
12 V
8.0 V
12
14
8.0 V
12
8
IGND (mA)
10
VOUT = 2.0 V
3.3 V
6
4
12 V
10
8
3.3 V
6
VOUT = 2.0 V
4
2
0
−40
0
TJ, JUNCTION TEMPERATURE (°C)
8.10
7.80
−40
−20
Figure 9. Output Voltage vs. Temperature,
2.0 V Version
8.15
VOUT (V)
3.28
1.94
8.20
IGND (mA)
3.30
1.96
1.90
−40
VIN = 6.3 V
3.38
VOUT (V)
VOUT (V)
2.08
2
−20
0
20
40
60
80
0
100
0
5
10
15
20
25
30
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 13. Supply Current vs. Temperature
Figure 14. Supply Current vs. Input Voltage
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35
NCP4640
TYPICAL CHARACTERISTICS
2.5
3.5
3.0
2.0
1.5
1 mA
VOUT (V)
VOUT (V)
2.5
1 mA
20 mA
1.0
2.0
20 mA
1.5
1.0
IOUT = 40 mA
0.5
0.0
0
5
IOUT = 40 mA
0.5
10
15
20
25
VIN, INPUT VOLTAGE (V)
30
0.0
35
0
Figure 15. Output Voltage vs. Input Voltage,
2.0 V Version
35
12.0
7.0
10.0
6.0
1 mA
VOUT (V)
VOUT (V)
30
14.0
8.0
5.0
4.0
20 mA
3.0
2.0
0
5
1 mA
8.0
6.0
4.0
IOUT = 40 mA
1.0
20 mA
2.0
10
15
20
25
VIN, INPUT VOLTAGE (V)
30
0.0
35
IOUT = 40 mA
0
Figure 17. Output Voltage vs. Input Voltage,
8.0 V Version
100
100
90
90
80
80
70
70
60
50
40
IOUT = 1 mA
30
30 mA
0.1
1
10
FREQUENCY (kHz)
100
30
35
60
50
40
IOUT = 1 mA
10 mA
20
10
0
0.01
10
15
20
25
VIN, INPUT VOLTAGE (V)
30
10 mA
20
5
Figure 18. Output Voltage vs. Input Voltage,
12 V Version
PSRR (dB)
PSRR (dB)
10
15
20
25
VIN, INPUT VOLTAGE (V)
Figure 16. Output Voltage vs. Input Voltage,
3.3 V Version
9.0
0.0
5
10
0
0.01
1000
Figure 19. PSRR, 2.0 V Version, VIN = 5.0 V
30 mA
0.1
1
10
FREQUENCY (kHz)
100
Figure 20. PSRR, 3.3 V Version, VIN = 6.3 V
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7
1000
NCP4640
TYPICAL CHARACTERISTICS
5
100
90
4
80
VN (mVrms/√Hz)
PSRR (dB)
70
60
50
40
IOUT = 1 mA
30
10 mA
20
2
1
10
30 mA
0
0.01
0.1
1
10
100
0
0.01
1000
0.1
1
10
100
1000
FREQUENCY (kHz)
FREQUENCY (kHz)
Figure 21. PSRR, 3.3 V Version, VIN = 6.3 V
Figure 22. Output Voltage Noise, 2.0 V Version,
VIN = 5.0 V, IOUT = 30 mA
12
45
40
10
35
VN (mVrms/√Hz)
8
6
4
30
25
20
15
10
2
5
0
0.01
0.1
1
10
FREQUENCY (kHz)
100
1000
0
0.01
Figure 23. Output Voltage Noise, 3.3 V Version,
VIN = 6.3 V, IOUT = 30 mA
0.1
1
10
FREQUENCY (kHz)
60
50
40
30
20
10
0
0.01
0.1
100
1000
Figure 24. Output Voltage Noise, 8.0 V Version,
VIN = 11.0 V, IOUT = 30 mA
70
VN (mVrms/√Hz)
VN (mVrms/√Hz)
3
1
10
100
1000
FREQUENCY (kHz)
Figure 25. Output Voltage Noise, 12.0 V Version,
VIN = 15.0 V, IOUT = 30 mA
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NCP4640
TYPICAL CHARACTERISTICS
6.5
6.0
5.0
VIN (V)
VOUT (V)
5.5
2.10
2.05
2.00
1.95
1.90
0
0.2
0.4
0.6
0.8
1.0 1.2
t (ms)
1.4
1.6
1.8
2.0
Figure 26. Line Transients, 2.0 V Version,
tR = tF = 50 ms, IOUT = 1 mA
8.0
7.5
6.5
3.5
6.0
3.4
VIN (V)
VOUT (V)
7.0
3.3
3.2
3.1
0
0.2
0.4
0.6
0.8
1.0 1.2
t (ms)
1.4
1.6
1.8
2.0
Figure 27. Line Transients, 3.3 V Version,
tR = tF = 50 ms, IOUT = 1 mA
12.5
12.0
11.0
VIN (V)
VOUT (V)
11.5
8.4
8.2
8.0
7.8
7.6
0
0.2
0.4
0.6
0.8
1.0 1.2
t (ms)
1.4
1.6
1.8
Figure 28. Line Transients, 8.0 V Version,
tR = tF = 50 ms, IOUT = 1 mA
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2.0
NCP4640
TYPICAL CHARACTERISTICS
16.5
16.0
15.0
VIN (V)
VOUT (V)
15.5
12.4
12.2
12.0
11.8
11.6
0
0.2
0.4
0.6
0.8
1.0 1.2
t (ms)
1.4
1.6
1.8
2.0
Figure 29. Line Transients, 12.0 V Version,
tR = tF = 50 ms, IOUT = 1 mA
30
20
10
IOUT (mA)
VOUT (V)
0
2.2
2.1
2.0
1.9
1.8
1.7
0
0.2
0.4
0.6
0.8
1.0 1.2
t (ms)
1.4
1.6
1.8
2.0
Figure 30. Load Transients, 2.0 V Version,
IOUT = 1 – 20 mA, tR = tF = 50 ms, VIN = 5.0 V
30
20
10
IOUT (mA)
VOUT (V)
0
3.7
3.5
3.3
3.1
2.9
2.7
0
0.2
0.4
0.6
0.8
1.0 1.2
t (ms)
1.4
1.6
1.8
Figure 31. Load Transients, 3.3 V Version,
IOUT = 1 – 20 mA, tR = tF = 50 ms, VIN = 6.3 V
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2.0
NCP4640
TYPICAL CHARACTERISTICS
30
20
10
0
8.4
IOUT (mA)
VOUT (V)
8.6
8.2
8.0
7.8
7.6
7.4
7.2
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
t (ms)
Figure 32. Load Transients, 8.0 V Version,
IOUT = 1 – 20 mA, tR = tF = 50 ms, VIN = 11.0 V
30
20
10
IOUT (mA)
VOUT (V)
0
12.8
12.4
12.0
11.6
11.2
10.8
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
t (ms)
Figure 33. Load Transients, 12.0 V Version,
IOUT = 1 – 20 mA, tR = tF = 50 ms, VIN = 15.0 V
60
50
40
20
IOUT (mA)
VOUT (V)
30
2.2
2.1
2.0
1.9
1.8
1.7
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
t (ms)
1.6
1.8
Figure 34. Load Transients, 2.0 V Version,
IOUT = 20 – 50 mA, tR = tF = 50 ms, VIN = 5.0 V
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2.0
NCP4640
TYPICAL CHARACTERISTICS
60
50
40
IOUT (mA)
VOUT (V)
30
3.7
3.5
3.3
3.1
2.9
2.7
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
t (ms)
Figure 35. Load Transients, 3.3 V Version,
IOUT = 20 – 50 mA, tR = tF = 50 ms, VIN = 6.3 V
60
50
40
20
IOUT (mA)
VOUT (V)
30
8.4
8.2
8.0
7.8
7.6
7.4
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
t (ms)
Figure 36. Load Transients, 8.0 V Version,
IOUT = 20 – 50 mA, tR = tF = 50 ms, VIN = 11.0 V
60
50
40
20
IOUT (mA)
VOUT (V)
30
12.8
12.4
12.0
11.6
11.2
10.8
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
t (ms)
Figure 37. Load Transients, 12.0 V Version,
IOUT = 20 – 50 mA, tR = tF = 50 ms, VIN = 15.0 V
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2.0
NCP4640
TYPICAL CHARACTERISTICS
8
Chip Enable
6
4
0
2.0
IOUT = 1 mA
1.5
1.0
IOUT = 20 mA
VCE (V)
VOUT (V)
2
IOUT = 50 mA
0.5
0
−0.5
0
50
100 150 200 250 300 350 400 450 500
t (ms)
Figure 38. Start−up, 2.0 V Version, VIN = 5.0 V
Chip Enable
8
6
4
0
4
3
IOUT = 1 mA
2
VCE (V)
VOUT (V)
2
IOUT = 20 mA
IOUT = 50 mA
1
0
−1
0
50
100 150 200 250 300 350 400 450 500
t (ms)
Figure 39. Start−up, 3.3 V Version, VIN = 6.3 V
16
Chip Enable
12
8
0
8
6
IOUT = 1 mA
4
IOUT = 20 mA
IOUT = 50 mA
2
0
−2
0
50
100 150 200 250 300 350 400 450 500
t (ms)
Figure 40. Start−up, 8.0 V Version, VIN = 11.0 V
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VCE (V)
VOUT (V)
4
NCP4640
TYPICAL CHARACTERISTICS
Chip Enable
20
15
10
0
16
IOUT = 20 mA
12
8
IOUT = 1 mA
4
IOUT = 50 mA
0
−4
0
50
100 150 200 250 300 350 400 450 500
t (ms)
Figure 41. Start−up, 12.0 V Version, VIN = 15.0 V
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VCE (V)
VOUT (V)
5
NCP4640
APPLICATION INFORMATION
A typical application circuit for NCP4640 series is shown
in Figure 42.
NCP4640x
VIN
VIN
connected to CE pin. Do not keep CE pin not connected or
between VCEH and VCEL voltage levels. Otherwise output
voltage would be unstable or indefinite and unexpected
would flow internally.
VOUT
VOUT
Thermal
The device is stable without any input capacitance, but if
input line is long and has high impedance or if more stable
operation is needed, input capacitor C1 should be connected
as close as possible to the IC. Recommended range of input
capacitor value is 100 nF to 10 mF.
As a power across the IC increase, it might become
necessary to provide some thermal relief. The maximum
power dissipation supported by the device is dependent
upon board design and layout. Mounting pad configuration
on the PCB, the board material, and also the ambient
temperature affect the rate of temperature increase for the
part. When the device has good thermal conductivity
through the PCB the junction temperature will be relatively
low in high power dissipation applications.
The IC includes internal thermal shutdown circuit that
stops operation of regulator, if junction temperature is
higher than 150°C. After that, when junction temperature
decreases below 125°C, the operation of voltage regulator
would restart. While high power dissipation condition is, the
regulator starts and stops repeatedly and protects itself
against overheating.
Output Decoupling Capacitor (C2)
PCB layout
C1
100 n
C2
100n
CE
GND
Figure 42. Typical Application Schematic
Input Decoupling Capacitor (C1)
The NCP4641 can work stable without output capacitor,
but if faster response and higher stability reserve is needed,
output capacitor should be connected as close as possible to
the device. Recommended range of output capacitance is
100 nF to 10 mF. Larger values of output capacitance and
lower ESR improves dynamic parameters.
Pins number 2 and 4 of SOT89−5 package and pins
number 2, 4 and 5 of SOIC6−TL must be wired to the GND
plane while it is mounted on board. Make VIN and GND
lines sufficient. If their impedance is high, noise pickup or
unstable operation may result. Connect capacitors C1 and
C2 as close as possible to the IC, and make wiring as short
as possible.
Enable Operation
The enable pin CE may be used for turning the regulator
on and off. The device is activated when high level is
ORDERING INFORMATION
Nominal Output
Voltage
Description
Marking
Package
Shipping†
NCP4640H020T1G
2.0 V
Enable High
N020
SOT89−5
(Pb−Free)
1000 / Tape & Reel
NCP4640H030T1G
3.0 V
Enable High
N030
SOT89−5
(Pb−Free)
1000 / Tape & Reel
NCP4640H033T1G
3.3 V
Enable High
N033
SOT89−5
(Pb−Free)
1000 / Tape & Reel
NCP4640H080T1G
8.0 V
Enable High
N080
SOT89−5
(Pb−Free)
1000 / Tape & Reel
NCP4640H120T1G
12.0 V
Enable High
N120
SOT89−5
(Pb−Free)
1000 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*To order other package and voltage variants, please contact your ON Semiconductor sales representative.
http://onsemi.com
15
NCP4640
PACKAGE DIMENSIONS
SOIC6 (HSOP6)
CASE 751BR−01
ISSUE O
b1
D
A
6
F
4
A3
E
H
1
L2
3
4X
B
D
b
0.12
M
L
C
SEATING
PLANE
DETAIL A
C A-B D
6X
0.10 C
A1
A
e
C
DETAIL A
SEATING
PLANE
RECOMMENDED
SOLDERING FOOTPRINT*
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS
3. DIMENSION b AND b1 DO NOT INCLUDE DAMBAR
PROTRUSION. ALLOWAQBLE PROTRUSION SHALL
BE 0.10 mm IN EXCESS OF MAXIMUM MATERIAL
CONDITION.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.15 mm PER SIDE. DIMENSIONS D
AND E ARE DETERMINED AT DATUM F.
5. DATUMS A AND B ARE DETERMINED AT DATUM F.
6. A1 IS DEFINED AS THE VERTICAL DISTANCE
FROM THE SEATING PLANE TO THE LOWEST
POINT ON THE PACKAGE BODY.
DIM
A
A1
A3
b
b1
D
E
e
H
L
L2
MILLIMETERS
MIN
MAX
1.45
1.85
0.05
0.25
0.19
0.30
0.30
0.50
1.57
1.77
4.72
5.32
3.70
4.10
3.81 BSC
5.70
6.30
0.40
0.60
0.25 BSC
3.81
PITCH
6X
1.05
6.40
1
2X
1.87
4X
0.60
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
16
NCP4640
PACKAGE DIMENSIONS
SOT−89, 5 LEAD
CASE 528AB−01
ISSUE O
D
E
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. LEAD THICKNESS INCLUDES LEAD FINISH.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS.
5. DIMENSIONS L, L2, L3, L4, L5, AND H ARE MEASURED AT DATUM PLANE C.
H
DIM
A
b
b1
c
D
D2
E
e
H
L
L2
L3
L4
L5
1
TOP VIEW
c
A
0.10 C
C
SIDE VIEW
e
b1
L
1
e
b
2
L3
L4
RECOMMENDED
MOUNTING FOOTPRINT*
L2
4X
3
0.57
1.75
L5
5
MILLIMETERS
MIN
MAX
1.40
1.60
0.32
0.52
0.37
0.57
0.30
0.50
4.40
4.60
1.40
1.80
2.40
2.60
1.40
1.60
4.25
4.45
1.10
1.50
0.80
1.20
0.95
1.35
0.65
1.05
0.20
0.60
4
2.79
1.50
0.45
4.65
D2
BOTTOM VIEW
1.30
1.65
1
2X
2X
0.62
1.50
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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LITERATURE FULFILLMENT:
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http://onsemi.com
17
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NCP4640/D