LINER LT6023 Dual micropower, 1.4v/s precision rail-to-rail output amplifier Datasheet

LT6023/LT6023-1
Dual Micropower, 1.4V/µs
Precision Rail-to-Rail
Output Amplifier
DESCRIPTION
FEATURES
Excellent Slew Rate to Power Ratio
nn Slew Rate: 1.4V/μs
nn Maximum Supply Current: 20μA/Amplifier
nn Maximum Offset Voltage: 30μV
nn High Dynamic Input Impedance
nn Fast Recovery from Shutdown
nn Maximum Input Bias Current: 3nA
nn No Output Phase Inversion
nn Gain Bandwidth Product: 40kHz
nn Wide Specified Supply Range: 3V to 30V
nn Operating Temperature Range: –40°C to 125°C
nn Rail-to-Rail Outputs
nn DFN and MS8 Packages
nn
The LT®6023 is a low power, enhanced slew rate, precision
operational amplifier. The proprietary circuit topology of
this amplifier gives excellent slew rate at low quiescent
power dissipation without compromising precision or
settling time. In addition, proprietary input stage circuitry
allows the input impedance to remain high during input
voltage steps as large as 5V. The combination of precision specs along with fast settling makes this part ideal
for MUX applications.
The low quiescent current of the LT6023 along with its
ability to operate on supplies as low as 3V make it useful
in portable systems. The LT6023-1 features a shutdown
mode which reduces the typical supply current to 800nA.
The LT6023 is available in the small 8-lead DFN and 8-lead
MSOP packages. The LT6023-1 is available in a 10-lead
DFN package.
APPLICATIONS
Precision Signal Processing
DAC Amplifier
nn Multiplexed ADC Applications
nn Low Power Portable Systems
nn Low Power Wireless Sensor Networks
nn
L, LT, LTC, LTM, Linear Technology, SmartMesh and the Linear logo are registered trademarks
and SoftSpan is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Patent Pending.
nn
TYPICAL APPLICATION
±13.6V Input Range MUX Buffer
1/2 LTC203
5
0
IN1
MUX Buffer Response, 12V Step
15V
V+
IN2
15V
VIN1
–6V
S1
D1
VIN2
6V
S2
D2
GND
V–
+
1/2 LT6023
–
2V/DIV
–15V
–15V
20µs/DIV
60231 TA01b
60231 TA01a
60231fa
For more information www.linear.com/LT6023
1
LT6023/LT6023-1
ABSOLUTE MAXIMUM RATINGS
(Note 1)
Total Supply Voltage (V+ to V–)..................................36V
Differential Input Voltage (within Supplies)................36V
Input Voltage (DGND, EN, +IN, –IN)
(Relative to V–)......................................................36V
Input Current (+IN, –IN, DGND, EN)...................... ±10mA
Output Short-Circuit Duration........................... Indefinite
Operating and Specified Temperature Range
I-Grade.................................................–40°C to 85°C
H-Grade............................................. .–40°C to 125°C
Junction Temperature............................................ 150°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................... 300°C
PIN CONFIGURATION
TOP VIEW
TOP VIEW
OUTA
1
8 V+
–INA
2
7 OUTB
+INA
3
V–
4
A
9
B
6 –INB
5 +INB
OUTA
1
–INA
2
+INA
3
V–
4
DGND
5
10 V+
A
9 OUTB
11
B
8 –INB
7 +INB
6 EN
DD PACKAGE
8-LEAD (3mm × 3mm) PLASTIC DFN
DD PACKAGE
10-LEAD (3mm × 3mm) PLASTIC DFN
θJA = 43°C/W, θJC = 5.5°C/W
EXPOSED PAD (PIN 9) IS CONNECTED TO V– (PIN 4)
(PCB CONNECTION OPTIONAL)
θJA = 43°C/W, θJC = 5.5°C/W
EXPOSED PAD (PIN 11) IS CONNECTED TO V– (PIN 4)
(PCB CONNECTION OPTIONAL)
TOP VIEW
OUTA
–INA
+INA
V–
1
2
3
4
A
B
8
7
6
5
V+
OUTB
–INB
+INB
MS8 PACKAGE
8-LEAD PLASTIC MSOP
θJA = 163°C/W, θJC = 40°C/W
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT6023IDD#PBF
LT6023IDD#TRPBF
LGRS
8-Lead (3mm × 3mm) Plastic DFN
–40°C to 85°C
LT6023HDD#PBF
LT6023HDD#TRPBF
LGRS
8-Lead (3mm × 3mm) Plastic DFN
–40°C to 125°C
LT6023IDD-1#PBF
LT6023IDD-1#TRPBF
LGRV
10-Lead (3mm × 3mm) Plastic DFN
–40°C to 85°C
LT6023HDD-1#PBF
LT6023HDD-1#TRPBF
LGRV
10-Lead (3mm × 3mm) Plastic DFN
–40°C to 125°C
LT6023IMS8#PBF
LT6023IMS8#TRPBF
LTGRT
8-Lead Plastic MSOP
–40°C to 85°C
LT6023HMS8#PBF
LT6023HMS8#TRPBF
LTGRT
8-Lead Plastic MSOP
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
2
60231fa
For more information www.linear.com/LT6023
LT6023/LT6023-1
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the specified
temperature range, otherwise specifications are at TA = 25°C, VS = ±15V, VCM = VOUT = Mid-Supply, VDGND = 0V, VEN = 5V. DGND and
EN specifications only apply to the LT6023-1.
SYMBOL PARAMETER
VOS
Input Offset Voltage
CONDITIONS
MIN
DD Packages
TYP
MAX
UNITS
20
70
160
µV
µV
5
30
160
µV
µV
l
MS8 Package
l
∆VOSI
∆Temp
Input Offset Voltage Drift (Note 2)
∆VOSI
∆Time
Long Term Input Offset Voltage Stability
IB
Input Bias Current
IOS
Input Offset Current
DD Packages
l
–3.5
±0.9
3.5
µV/°C
MS8 Package
l
–2.9
±0.5
2.9
µV/°C
±0.2
µV/Mo
TA = –40° to 85°C
TA = –40° to 125°C
–3
–3
–10
±0.1
l
l
3
3
10
nA
nA
nA
TA = –40° to 85°C
TA = –40° to 125°C
–1
–1
–2
±0.1
l
l
1
1
2
nA
nA
nA
Input Noise Voltage
0.1Hz to 10Hz
3
µVP-P
en
Input Noise Voltage Density
f = 1Hz
f = 1kHz
132
132
nV/√Hz
nV/√Hz
in
Input Noise Current Density
f = 1kHz
12.1
fA/√Hz
CIN
Input Capacitance
Common Mode
Differential Mode
1.5
2.5
pF
pF
RIN
Input Resistance
Common Mode
Differential Mode
140
330
GΩ
MΩ
VICM
Common Mode Input Range
CMRR
Common Mode Rejection Ratio
VCM = –13.8V to 13.6V
PSRR
Supply Rejection Ratio
VS = 3V to 30V
AVOL
Large-Signal Voltage Gain
l
V– + 1.2
136
l
120
116
dB
dB
120
110
140
l
dB
dB
110
100
114
l
dB
dB
126
116
134
l
dB
dB
RL = 10kΩ, VOUT = ±14V
RL = 100kΩ, VOUT = ±14.5V
VOL
VOH
ISC
Output Swing Low (VOUT – V–)
Output Swing High (V+ – VOUT)
Short-Circuit Current
V+ – 1.4
V
RL = 10kΩ
TA = –40° to 85°C
TA = –40° to 125°C
l
l
180
300
380
430
mV
mV
mV
RL = 10kΩ
TA = –40° to 85°C
TA = –40° to 125°C
l
l
115
140
165
190
mV
mV
mV
VOUT = 0V, Sourcing
TA = –40° to 85°C
TA = –40° to 125°C
3
2.5
2
5.25
l
l
mA
mA
mA
VOUT = 0V, Sinking
TA = –40° to 85°C
TA = –40° to 125°C
6.5
4.5
4
15
l
l
mA
mA
mA
60231fa
For more information www.linear.com/LT6023
3
LT6023/LT6023-1
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the specified
temperature range, otherwise specifications are at TA = 25°C, VS = ±15V, VCM = VOUT = Mid-Supply, VDGND = 0V, VEN = 5V. DGND and
EN specifications only apply to the LT6023-1.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
SR
AVCL = 1, 10V Step
TA = –40° to 85°C
TA = –40° to 125°C
1.4
l
l
0.85
0.7
0.6
V/μs
V/μs
V/μs
AVCL = 1, 5V Step
TA = –40° to 85°C
TA = –40° to 125°C
0.3
0.25
0.2
0.65
l
l
V/μs
V/μs
V/μs
Gain-Bandwidth Product
f = 1kHz
l
29
40
kHz
Minimum Supply Voltage
Guaranteed by PSRR
l
3
TA = –40° to 85°C
TA = –40° to 125°C
l
l
VEN = 0.8V
TA = –40° to 85°C
TA = –40° to 125°C
l
l
GBW
IS
Slew Rate
Supply Current per Amplifier
Supply Current in Shutdown
ts
Settling Time (AV = 1)
0.1% 5V Output Step
0.01% 5V Output Step
0.0015% 5V Output Step
0.0015% 10V Output Step
tON
Enable Time
AV = 1
MAX
V
18
20
28
40
μA
μA
μA
0.8
3
3.2
3.6
μA
μA
μA
40
60
124
132
μs
μs
μs
μs
480
V–
UNITS
µs
V+ – 3
V
VDGND
DGND Pin Voltage Range
l
IDGND
DGND Pin Current
l
–200
nA
IEN
EN Pin Current
l
–200
nA
VENL
EN Pin Input Low Voltage
Relative to DGND
l
0.8
V
VENH
EN Pin Input High Voltage
Relative to DGND
l
4
1.7
V
60231fa
For more information www.linear.com/LT6023
LT6023/LT6023-1
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the specified
temperature range, otherwise specifications are at TA = 25°C, VS = 3V, VCM = VOUT = Mid-Supply, VDGND = 0V, VEN = 3V. DGND and EN
pin specifications only apply to the LT6023-1.
SYMBOL PARAMETER
VOS
CONDITIONS
Input Offset Voltage
MIN
DD Packages
TYP
MAX
UNITS
20
100
190
µV
µV
5
45
175
µV
µV
l
MS8 Package
l
∆VOSI
∆Temp
Input Offset Voltage Drift (Note 2)
∆VOSI
∆Time
Long Term Input Offset Voltage Stability
IB
Input Bias Current
IOS
Input Offset Current
DD Packages
l
–3.5
±0.9
3.5
µV/°C
MS8 Package
l
–2.9
±0.5
2.9
µV/°C
±0.2
µV/Mo
±1
nA
±0.1
nA
Input Noise Voltage
0.1Hz to 10Hz
en
Input Noise Voltage Density
f = 1Hz
f = 1kHz
132
132
nV/√Hz
nV/√Hz
in
Input Noise Current Density
f = 1kHz
12.1
fA/√Hz
CIN
Input Capacitance
Common Mode
Differential Mode
1.5
2.5
pF
pF
RIN
Input Resistance
Common Mode
Differential Mode
140
400
GΩ
MΩ
VICM
Common Mode Input Range
CMRR
Common Mode Rejection Ratio
VCM = 1.2V to 1.6V
PSRR
Supply Rejection Ratio
VS = 3V to 30V
AVOL
Large-Signal Voltage Gain
3
l
V– + 1.2
VOL
VOH
ISC
Output Swing Low (VOUT
Output Swing High (V+ – VOUT)
Short-Circuit Current
V+ – 1.4
V
125
dB
120
110
140
l
dB
dB
98
95
108
l
dB
dB
136
dB
RL = 10kΩ, VOUT = 0.5V to 2.5V
RL = 100kΩ, VOUT = 0.5V to 2.5V
– V–)
µVP-P
RL = 10kΩ
TA = –40° to 85°C
TA = –40° to 125°C
l
l
RL = 10kΩ
TA = –40° to 85°C
TA = –40° to 125°C
l
l
VOUT = 1.5V, Sourcing
TA = –40° to 85°C
TA = –40° to 125°C
2.5
2.25
2
3.5
l
l
mA
mA
mA
VOUT = 1.5V, Sinking
TA = –40° to 85°C
TA = –40° to 125°C
3.5
2
2
5
l
l
mA
mA
mA
0.05
V/μs
40
kHz
SR
Slew Rate (Note 3)
AVCL = –1, 2V Step
GBW
Gain-Bandwidth Product
f = 1kHz
Minimum Supply Voltage
Guaranteed by PSRR
l
3
60
100
150
170
mV
mV
mV
60
80
90
100
mV
mV
mV
V
60231fa
For more information www.linear.com/LT6023
5
LT6023/LT6023-1
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the specified
temperature range, otherwise specifications are at TA = 25°C, VS = 3V, VCM = VOUT = Mid-Supply, VDGND = 0V, VEN = 3V. DGND and EN
pin specifications only apply to the LT6023-1.
SYMBOL PARAMETER
IS
Supply Current per Amplifier
Supply Current in Shutdown
CONDITIONS
MIN
TA = –40° to 85°C
TA = –40° to 125°C
l
l
VEN = 0.8V
TA = –40° to 85°C
TA = –40° to 125°C
l
l
ts
Settling Time (AV = –1)
0.1% 2.4V Output Step
0.01% 2.4V Output Step
0.0015% 2.4V Output Step
tON
Enable Time
AV = 1
TYP
MAX
15
20
25
35
μA
μA
μA
0.2
1.1
1.5
3
μA
μA
μA
85
100
250
μs
μs
μs
580
V–
UNITS
µs
V+ – 3
VDGND
DGND Pin Voltage Range
IDGND
DGND Pin Current
–75
nA
IEN
EN Pin Current
–75
nA
VENL
EN Pin Input Low Voltage
Relative to DGND
l
VENH
EN Pin Input High Voltage
Relative to DGND
l
l
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Guaranteed by design.
6
V
0.8
V
1.7
V
Note 3: The slew rate of the LT6023 increases with the size of the
input step. At lower supplies, the input step size is limited by the input
common mode range. This trend can be seen in the Typical Performance
Characteristics.
60231fa
For more information www.linear.com/LT6023
LT6023/LT6023-1
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, VS = ±15V, RL = 100kΩ, unless
otherwise specified.
Typical Distribution of Input
Offset Voltage
Typical Distribution of Input
Offset Voltage
1000
NUMBER OF AMPLIFIERS
NUMBER OF AMPLIFIERS
1386 AMPLIFIERS
700 MS8 PACKAGE
600
500
400
300
200
160
2870 AMPLIFIERS
DD8 AND DD10 PACKAGES
215 AMPLIFIERS
140 MS8 PACKAGE
800
NUMBER OF AMPLIFIERS
800
Typical Distribution of Input
Offset Voltage Drift
600
400
200
100
–20
–10
0
10
20
INPUT OFFSET VOLTAGE (µV)
0
–80 –60 –40 –20 0
20 40 60
INPUT OFFSET VOLTAGE (µV)
30
6023 G01
80
60
40
Offset Voltage Shift vs Lead Free
IR Reflow
30
210 AMPLIFIERS
DD PACKAGES
80
25
NUMBER OF AMPLIFIERS
70
60
50
40
30
20
10
0
–10 –8 –6 –4 –2 0 2 4 6 8
INPUT OFFSET VOLTAGE SHIFT (µV)
0
–40
–80
10
–160
–50
–25
0
25
50
75
TEMPERATURE (°C)
100
125
6023 G06
Offset Voltage vs Input Common
Mode Voltage
40
3 TYPICAL UNITS
OFFSET VOLTAGE (µV)
30
OFFSET VOLTAGE (µV)
40
6023 G05
Offset Voltage vs Supply Voltage
40
80
–120
6023 G04
50
10 TYPICAL UNITS
120
15
5
5
160
80 AMPLIFIERS
MS8 PACKAGE
20
10
–4 –3 –1
0
1
3
4
INPUT OFFSET VOLTAGE DRIFT (µV/°C)
–4 –3 –1
0
1
3
4
INPUT OFFSET VOLTAGE DRIFT (µV/°C)
Typical Input Offset Voltage
vs Temperature
5
–5
–5
6023 G03
INPUT OFFSET VOLTAGE (µV)
90
0
80
6023 G02
Typical Distribution of Input
Offset Voltage Drift
NUMBER OF AMPLIFIERS
100
20
0
–30
0
120
20
10
0
–10
–20
–30
20
0
–20
–40
–50
0
4
8 12 16 20 24 28
TOTAL SUPPLY VOLTAGE (V)
32
36
–40
–15
6023 G07
–5
5
–10
0
10
INPUT COMMON MODE VOLTAGE (V)
15
6023 G08
60231fa
For more information www.linear.com/LT6023
7
LT6023/LT6023-1
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, VS = ±15V, RL = 100kΩ, unless
otherwise specified.
Input Bias Current vs
Temperature
Input Bias Current vs Differential
Input Voltage
0.1Hz to 10Hz Voltage Noise
1
4
0.75
INPUT BIAS CURRENT (µA)
INPUT BIAS CURRENT (nA)
3
2
1
0
0.5
IB–
0.25
IB+
1µV/DIV
0
–0.25
–0.5
–0.75
–1
–50
–25
0
50
25
75
TEMPERATURE (°C)
100
–1
125
6
4
2
0
–2
–4
DIFFERENTIAL INPUT VOLTAGE (V)
Voltage Noise Density vs
Frequency
MAXIMUM UNDISTORTED OUTPUT VOLTAGE (VP–P)
VOLTAGE NOISE DENSITY (nV/√Hz)
Maximum Undistorted Output
Amplitude vs Frequency
VS = ±5V
100
10
0.01
0.1
1
10
100
FREQUENCY (Hz)
6023 G11
6023 G10
6023 G09
1000
1s/DIV
–6
1k
10k
35
30
Large-Signal Transient Response
(5V Step)
AV = 1
THD < 40dBc
AV = 1
5V STEP
25
2V/DIV
20
15
10
5
0
0.1
1
FREQUENCY (kHz)
6023 G12
50µs/DIV
10
6023 G14
6023 G13
Slew Rate vs Temperature
(5V Step)
Slew Rate vs Temperature
(10V Step)
1
Slew Rate vs Input Step
2
3.5
RISING EDGE
RISING EDGE
3
RISING EDGE
0.25
SLEW RATE (V/µs)
0.5
1.5
FALLING EDGE
SLEW RATE (V/µs)
SLEW RATE (V/µs)
0.75
10V STEP
FALLING EDGE
1
0.5
2.5
2
FALLING EDGE
1.5
1
0.5
0
–50
–25
25
75
0
50
TEMPERATURE (°C)
100
125
6023 G15
8
0
–50
–25
25
75
0
50
TEMPERATURE (°C)
100
125
6023 G16
0
0
5
15
25
10
20
INPUT STEP SIZE (VP–P)
30
6023 G17
60231fa
For more information www.linear.com/LT6023
LT6023/LT6023-1
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, VS = ±15V, RL = 100kΩ unless
otherwise specified.
Small-Signal Transient Response
Overshoot vs Capacitive Load
35
AV = 1
330pF
OVERSHOOT (%)
30
2mV/DIV
100pF
25
VS = ±1.5V
20
15
VS = ±15V
10
5
0
50µs/DIV
0
200
6023 G18
PSRR vs Frequency
–PSRR
+PSRR
40
20
0
10m 100m
1
10 100 1k
FREQUENCY (Hz)
140
140
120
120
100
OPEN LOOP GAIN (dB)
COMMON MODE REJECTION RATIO (dB)
100
60
Open-Loop Gain and Phase
vs Frequency
80
60
40
150
1
10
100
1k
FREQUENCY (Hz)
10k
100k
40
20
–180
–20
100m
–6
CL=100p, AV=1
CL=330p, AV=1
CL=330p, AV=–1
1
10
100
1k
FREQUENCY (Hz)
–225
100k
10k
6023 G22
10k
VOUT = ±14.5V
AV = 1
1k
OUTPUT IMPEDANCE (Ω)
–3
10k
100k
FREQUENCY (Hz)
–135
Output Impedance vs Frequency
140
OPEN LOOP GAIN (dB)
GAIN (dB)
0
1k
60
Open Loop Gain vs Load
160
VS=±15V
–12
100
80
6023 G21
Gain vs Frequency
–9
–90
0
6023 G20
3
100
20
0
100m
10k 100k
–45
VS = ±15V
OPEN LOOP PHASE (°)
POWER SUPPLY REJECTION RATIO (dB)
120
1000
6023 G19
CMRR vs Frequency
140
80
400
800
600
CAPACITIVE LOAD (pF)
130
120
110
100
90
80
100
10
1
0.1
70
1M
6023 G23
60
0.01
0.1
1
LOAD CURRENT (mA)
10
6023 G24
0.01
10
100
1k
10k
FREQUENCY (Hz)
100k
1M
6023 G25
60231fa
For more information www.linear.com/LT6023
9
LT6023/LT6023-1
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, VS = ±15V, RL = 100kΩ unless
otherwise specified.
Shutdown Supply Current vs
Temperature
Supply Current vs Supply Voltage
Start-Up Response
2
35
SHUTDOWN SUPPLY CURRENT (µA)
SUPPY CURRENT PER AMPLIFIER (µA)
40
30
25
20
15
10
125°C
85°C
25°C
–40°C
5
0
0
5
10
15
20
25
TOTAL SUPPLY VOLTAGE (V)
VS
20V/DIV
1.5
0V
1
I+
5mA/DIV
0mA
VS = ±15V
VS = ±1.5V
0
–50
30
0V
VOUT
2V/DIV
0.5
–25
25
75
0
50
TEMPERATURE (°C)
100
6023 G26
125
200µs/DIV
6023 G27
6023 G28
Output Saturation Voltage vs
Sink Current (Output Low)
Enable/Disable Response
Output Saturation Voltage vs
Source Current (Output High)
0V
I+
40µA/DIV
0µA
VOUT
5V/DIV
0V
1
0.1
0.01
0.1
500µs/DIV
OUTPUT HIGH SATURATION VOLTAGE (V)
OUTPUT LOW SATURATION VOLTAGE (V)
1
VEN
5V/DIV
VS = ±10V
AV = 1
VIN = 1V
6023 G29
TA = 125°C
TA = 85°C
TA = 25°C
TA = –40°C
1
LOAD CURRENT (mA)
10
0.1
0.01
0.1
TA = 125°C
TA = 85°C
TA = 25°C
TA = –40°C
1
LOAD CURRENT (mA)
6023 G30
6023 G31
Positive Output Overdrive
Recovery
Crosstalk vs Frequency
10
Negative Output Overdrive
Recovery
0
CROSSTALK (dB)
–20
–40
–60
INPUT
200mV/DIV
0V
OUTPUT
5V/DIV
OUTPUT
5V/DIV
INPUT
200mV/DIV
–80
0V
–100
–120
–140
AV = 100
10
100
1k
10k
FREQUENCY (Hz)
100k
1M
6023 G32
10
2ms/DIV
AV = 100
2ms/DIV
6023 G33
6023 G34
60231fa
For more information www.linear.com/LT6023
LT6023/LT6023-1
PIN FUNCTIONS
OUT: Amplifier Output.
–IN: Inverting Input of the Amplifier.
+IN: Noninverting Input of the Amplifier.
V–: Negative Power Supply. A bypass capacitor should be
used between supply pins and ground. Additional bypass
capacitance may be used between the power supply pins.
DGND (LT6023-1 Only): Reference for EN Pin. It is normally
tied to ground. DGND must be in the range from V– to V+
–3V. If grounded, V+ must be ≥ 3V. The EN pin threshold
is specified with respect to the DGND pin. DGND cannot
be floated.
EN (LT6023-1 Only): Enable Input. This pin must be
connected high, normally to V+, for the amplifiers to be
functional. EN is active high with the threshold approximately two diodes above DGND. EN cannot be floated.
The shutdown threshold voltage is specified with respect
to the voltage on the DGND pin.
V+: Positive Power Supply. A bypass capacitor should be
used between supply pins and ground. Additional bypass
capacitance may be used between the power supply pins.
SIMPLIFIED SCHEMATIC
LT6023-1 ONLY
V+
LOAD
+IN
–IN
6k
CLASS AB
DRIVE
OUT
EN
2M
6k
2M
DGND
V–
60231 SS
60231fa
For more information www.linear.com/LT6023
11
LT6023/LT6023-1
APPLICATIONS INFORMATION
Preserving Low Power Operation
200
The choice of feedback resistor values impacts several
op-amp parameters as noted in the feedback components section. It should also be noted that the output of
the amplifier must drive this network. For example, in a
gain of two with a total feedback resistance of 10kΩ and
an output voltage of 14V, the amplifier’s output will need
to supply 1.4mA of current. This current will ultimately
come from a supply.
The supply current of the LT6023 increases with large
differential input voltages. Normally, this does not impact
the low power nature of the LT6023 because the amplifier is forcing the two inputs to be at the same potential.
Conditions which cause differential input voltage to appear
should be avoided in order to preserve the low power dissipation of the LT6023. This includes but is not limited
to: operation as a comparator, excessive loading on the
output and overdriving the input.
Enhanced Slew Rate
The LT6023 uses a proprietary input stage which provides
an enhanced slew rate without sacrificing input precision
specs such as input offset voltage, common mode rejection
and noise. The unique input stage of the LT6023 allows the
output to quickly slew to its final value when large signal
input steps are applied. This enhanced slew characteristic
allows the LT6023 to quickly settle the output to 0.0015%
independent of input step size as shown in Figure 1. Typical
micropower amplifiers cannot process large amplitude signals with this speed. As shown in the Typical Performance
curves, when the LT6023 is configured in unity gain and
a 10V step is applied to the input the output will slew at
1.4V/µs. In this same configuration, a 5V input step will
slew the output at 0.65V/µs. Furthermore, a 0.7V input step
12
150
SETTLING TIME (µs)
The proprietary circuitry used in the LT6023 provides an
excellent combination of low power, low offset and enhanced slew rate. Normally an amplifier with higher supply
current would be required to achieve this combination of
slew rate and precision. Special care must be taken to
ensure that the low power operation is preserved.
AV = 1
0.0015%
100
0.01%
50
0
5
10
15
20
OUTPUT STEP (VP-P)
25
60231 F01
Figure 1. Settling Time Is Essentially Flat
will lower the slew rate to 0.02V/µs. Note that for these
smaller inputs the LT6023 slew rate approaches the slew
rate more common in traditional micropower amplifiers.
Input Bias Current
The design of the input stage of the LT6023 is more sophisticated than that shown in the Simplified Schematic.
It uses both NPN and PNP input differential amplifiers to
sense the input differential voltage. As a result the specified input bias current may flow in or out of the input pins.
Multiplexer Applications/High Dynamic Input
Impedance
The LT6023 has features which make it desirable for
multiplexer applications, such as the application featured
on the front page of this data sheet. When the channels of
the multiplexer are cycled, the output of the multiplexer
can produce large voltage transitions. Normally, bipolar
amplifiers have back-to-back diodes between the inputs,
which will turn on when the input transient voltage exceeds
0.7V, causing a large transient current to be conducted
from the amplifier output stage back into the input driving
circuitry. The driving circuitry then needs to absorb this
current and settle before the amplifier can settle. The
LT6023 uses 5.5V Zener diodes to protect its inputs which
dramatically increases its input impedance with input steps
as large as 5V.
60231fa
For more information www.linear.com/LT6023
LT6023/LT6023-1
APPLICATIONS INFORMATION
+
VREF
RG
VIN
+
VIN
–
+
VIN
–
RF
–
RF
60231 F02
RG
VREF
INVERTING: AV = –RF/RG
OP AMP INPUTS DO NOT MOVE,
BUT ARE FIXED AT DC BIAS
POINT VREF
NONINVERTING: AV = 1 + RF/RG
INPUTS MOVE BY AS MUCH AS
VIN, BUT THE OUTPUT MOVES
MORE
INPUT DOES NOT HAVE TO BE
RAIL-TO-RAIL
INPUT MAY NOT HAVE TO BE
RAIL-TO-RAIL
NONINVERTING: AV = 1
INPUTS MOVE BY AS MUCH AS
OUTPUT
INPUT MUST BE RAIL-TO-RAIL
FOR OVERALL CIRCUIT
RAIL-TO-RAIL PERFORMANCE
Figure 2. Some Op Amp Configurations Do Not Require Rail-to-Rail Inputs to Achieve Rail-to-Rail Outputs
Achieving Rail-to-Rail Operation without
Rail-to-Rail Inputs
The LT6023 output is able to swing close to each power
supply rail, but the input stage is limited to operating
between V– + 1.2V and V+ – 1.4V. For many inverting
applications and noninverting gain applications, this is
largely inconsequential. Figure 2 shows the basic op amp
configurations, what happens to the op amp inputs and
whether or not the op amp must have rail-to-rail inputs.
The circuit of Figure 3 shows an extreme example of the
inverting case. The input voltage at the 100k resistor can
swing ±13.5V and the LT6023 will output an inverted,
divided-by-ten version of the input voltage. The output
accuracy is limited by the resistors shown to 0.2%. Output
referred, this error becomes 2.7mV. The 30µV input offset
voltage contribution, plus the additional error due to input
bias current times the ~10k effective source impedance,
contribute only negligibly to error.
Phase Inversion
The LT6023 input stage is limited to operating between V– +
1.2V and V+ – 1.4V. Exceeding this common mode range will
cause the open loop gain to drop significantly. For a unity gain
amplifier, the output roughly tracks the input well beyond
the specified input voltage range as shown in Figure 4.
20V
±13.5V SWINGS
WELL OUTSIDE
SUPPLY RAILS
1.5V
±1.35V
OUTPUT
SWING
100k, 0.1%
+VCM LIMIT
OUTPUT
+
LT6023
VIN
10V
VS = ±15V
AV = 1
INPUT
5V/DIV 0V
–
–10V
10k, 0.1%
–1.5V
60231 F03
–20V
Figure 3. Extreme Inverting Case: Circuit Operates Properly
with Input Voltage Swing Well Outside Op Amp Supply Rails
–VCM LIMIT
2ms/DIV
60231 F04
Figure 4. No Phase Inversion
60231fa
For more information www.linear.com/LT6023
13
LT6023/LT6023-1
APPLICATIONS INFORMATION
change in input offset voltage. Under large signal conditions
with load currents of ±1mA the effective change in input
error is just tens of microvolts. In precision applications it
is important to consider amplifier loading when selecting
feedback resistor values as well as the loads on the device.
7
INPUT BIAS CURRENT (µA)
6
5
4
3
2
Feedback Components
1
0
–1
–2
–3
–15
–10
–5
0
5
10
INPUT COMMON MODE VOLTAGE (V)
15
60231 F05
Figure 5. Increased Ib Beyond VICM
However the open loop gain is significantly reduced. While
the output roughly tracks the input, the reduction in open
loop gain degrades the accuracy of the LT6023 in this
region. Exceeding the input common mode range also
causes a significant increase in input bias current as shown
in Figure 5. The output of the LT6023 is guaranteed over
the specified temperature range not to phase invert as long
as the input voltage does not exceed the supply voltage.
10pF
1M
–
Preserving Input Precision
Preserving the input accuracy of the LT6023 requires
that the application circuit and PC board layout do not
introduce errors comparable to or greater than the offset
of the amplifiers. Temperature differentials across the
input connections can generate thermocouple voltages of
tens of microvolts so the connections of the input leads
should be short, close together and away from heat dissipating components. Air currents across the board can
also generate temperature differentials.
As is the case with all amplifiers, a change in load
current changes the finite open loop gain. Increased load
current reduces the open loop gain as seen in the Typical
Performance Characteristics section. This results in a
14
Care must be taken to ensure that the phase shift formed
by the feedback resistors and the parasitic capacitance at
the inverting input does not degrade stability. For example,
in a gain of +2 configuration, with 1M feedback resistors
and a poorly designed circuit board layout with parasitic
capacitance of 10pF (amplifier + PC board) at the amplifier’s inverting input will cause the amplifier to have poor
phase margin due to a pole formed at 32kHz. An additional
capacitor of 10pF across the feedback resistor as shown
in Figure 6 will eliminate any ringing or oscillation.
1M
LT6023
CPAR
+
VIN
VOUT
60231 F06
Figure 6. Stability with Parasitic Input Capacitance
Capacitive Loads
The LT6023 can drive capacitive loads up to 100pF in
unity gain. The capacitive load driving capability increases
as the amplifier is used in higher gain configurations. A
small series resistance between the output and the load
will further increase the amount of capacitance that the
amplifier can drive.
60231fa
For more information www.linear.com/LT6023
LT6023/LT6023-1
APPLICATIONS INFORMATION
Shutdown Operation (LT6023-1)
to disable the LT6023-1 the enable pin can range from
–15V to –14.2V. Figure 7 shows examples of enable pin
control. While in shutdown, the outputs of the LT6023-1
are high impedance.
The LT6023-1 shutdown function has been designed
to be easily controlled from single supply logic or
microcontollers. To enable the LT6023-1 when VDGND = 0V
the enable pin must be driven above 1.7V. Conversely, to
enter the low power shutdown mode the enable pin must
be driven below 0.8V. In a ±15V dual supply application
where VDGND = –15V, the enable pin must be driven above
~ –13.3V to enable the LT6023-1. If the enable pin is
driven below –14.2V the LT6023-1 enters the low power
shutdown mode. Note that to enable the LT6023-1 the
enable pin voltage can range from –13.3V to 15V whereas
≥ –13.3V
ON
≤ –14.2V
+15
+
EN TO V OR
EN LOGIC
+
LT6023-1
–
+15
–15
HIGH VOLTAGE
SPLIT SUPPLIES
≥ 1.7V
≥ 1.7V
≥ 0.2V
ON
ON
ON
ON
≤ 0.8V
OFF
+30
+
EN TO V OR
EN LOGIC
+
LT6023-1
DGND
≥ 1.7V
≤ 0.8V
OFF
–
The LT6023-1 is typically capable of coming out of
shutdown within 480µs. This is useful in power sensitive
applications where duty cycled operation is employed
such as wireless mesh networks. In these applications the
system is in low power mode the majority of the time, but
then needs to wake up quickly and settle for an acquisition
before being powered back down to save power.
+
+
EN TO V OR
EN LOGIC
LT6023-1
DGND
–
+3V
+
OFF
+
EN TO V OR
EN LOGIC
LT6023-1
DGND
–
+1.5
OFF
+
EN TO V OR
EN LOGIC
+
LT6023-1
DGND
–15
HIGH VOLTAGE
SPLIT SUPPLIES
≤ –0.7V
≤ 0.8V
OFF
–
DGND
–1.5
HIGH VOLTAGE
SINGLE SUPPLY
LOW VOLTAGE
SINGLE SUPPLY
LOW VOLTAGE
SPLIT SUPPLIES
60231 F07
Figure 7. LT6023-1 Enable Pin Control Examples
60231fa
For more information www.linear.com/LT6023
15
LT6023/LT6023-1
TYPICAL APPLICATIONS
High Open-Loop Gain Composite Amplifier
4.7pF
10k
VIN
LOAD
680pF
–
10k
1/2 LT6023
+
+
VOUT
1/2 LT6023
–
60231 F02a
Parallel Amplifiers Achieves 93nV/√Hz Noise, Doubles Output Drive and Lowers Offset
VIN
+
1/2 LT6023
–
100Ω
VOUT
+
100Ω
1/2 LT6023
–
60231 F02b
16
60231fa
For more information www.linear.com/LT6023
LT6023/LT6023-1
TYPICAL APPLICATIONS
Micropower Reference Divider/Buffer
12V
+
1/2 LT6023
R5
49.9Ω
–
C6
10µF
C5
0.1µF
R6
49.9k
LT6656-4.096
IN
OUT
C1
0.1µF
GND
4.096V
C2
1µF
R2*
100k
R1*
100k
+
1/2 LT6023
R7
49.9Ω
–
C4
10µF
2.048V
C3
0.1µF
R3*
100k
R4*
100k
*LT5400-2
60231 F02c
60231fa
For more information www.linear.com/LT6023
17
LT6023/LT6023-1
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
DD Package
8-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1698 Rev C)
0.70 ±0.05
3.5 ±0.05
1.65 ±0.05
2.10 ±0.05 (2 SIDES)
PACKAGE
OUTLINE
0.25 ±0.05
0.50
BSC
2.38 ±0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
PIN 1
TOP MARK
(NOTE 6)
0.200 REF
3.00 ±0.10
(4 SIDES)
R = 0.125
TYP
5
0.40 ±0.10
8
1.65 ±0.10
(2 SIDES)
0.75 ±0.05
4
0.25 ±0.05
1
(DD8) DFN 0509 REV C
0.50 BSC
2.38 ±0.10
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON TOP AND BOTTOM OF PACKAGE
18
60231fa
For more information www.linear.com/LT6023
LT6023/LT6023-1
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699 Rev C)
0.70 ±0.05
3.55 ±0.05
1.65 ±0.05
2.15 ±0.05 (2 SIDES)
PACKAGE
OUTLINE
0.25 ±0.05
0.50
BSC
2.38 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
3.00 ±0.10
(4 SIDES)
R = 0.125
TYP
6
0.40 ±0.10
10
1.65 ±0.10
(2 SIDES)
PIN 1 NOTCH
R = 0.20 OR
0.35 × 45°
CHAMFER
PIN 1
TOP MARK
(SEE NOTE 6)
0.200 REF
0.75 ±0.05
0.00 – 0.05
5
1
(DD) DFN REV C 0310
0.25 ±0.05
0.50 BSC
2.38 ±0.10
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
60231fa
For more information www.linear.com/LT6023
19
LT6023/LT6023-1
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
MS8 Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660 Rev G)
0.889 ±0.127
(.035 ±.005)
5.10
(.201)
MIN
3.20 – 3.45
(.126 – .136)
3.00 ±0.102
(.118 ±.004)
(NOTE 3)
0.65
(.0256)
BSC
0.42 ± 0.038
(.0165 ±.0015)
TYP
8
7 6 5
0.52
(.0205)
REF
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
4.90 ±0.152
(.193 ±.006)
DETAIL “A”
0° – 6° TYP
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
DETAIL “A”
1
2 3
4
1.10
(.043)
MAX
0.86
(.034)
REF
0.18
(.007)
SEATING
PLANE
0.22 – 0.38
(.009 – .015)
TYP
0.65
(.0256)
BSC
0.1016 ±0.0508
(.004 ±.002)
MSOP (MS8) 0213 REV G
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
20
60231fa
For more information www.linear.com/LT6023
LT6023/LT6023-1
REVISION HISTORY
REV
DATE
DESCRIPTION
A
04/15
Updated typical slew rate to be consistent throughout the data sheet
PAGE NUMBER
1, 4
Corrected negative supply voltage on front page circuit
1
Corrected Input Bias Current vs. Differential Input Voltage graph
8
60231fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection
of its circuits
as described
herein will not infringe on existing patent rights.
For more
information
www.linear.com/LT6023
21
LT6023/LT6023-1
TYPICAL APPLICATION
Gain of 11 Instrumentation Amplifier
R3, 10k
R2, 10k
–
–
1/2 LT6023
1/2 LT6023
+
VINM
V+
R1, 100k
VIN
VOUT
+
2N3904
+
–
1k
VOUT
LT6023
–3dB BW = 6kHz
VINP
R1 TO R4: FOR HIGH DC CMRR USE LT5400-3
2N3906
V–
60231 TA03a
60231 TA03b
16-Bit DAC with ±10V Output Swing
LTC6652-2.5
IN
OUT
GND
0.1µF
3.8VDC TO 5.5VDC
LOAD
R4, 100k
Improved Load Drive Capability
1µF
20V Output Step Response
0.1µF
VOUT
5V/DIV
VDD
LTC2642
REF
RFB
15V
INV
CS
DIN
–15V
16-BIT DATA LATCH
1/2 LT6023
CONTROL
LOGIC
CLR
60231 TA03d
+
–
SCLK
16-BIT DAC
200µs/DIV
VOUT
1/2 LT6023
VOUT
+
POWER-ON
RESET
–
16-BIT SHIFT REGISTER
GND
LT5400-2
100kΩ MATCHED
RESISTOR NETWORK
60231 TA03c
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT6004
2kHz, 1µA RRIO Op Amp
VOS: 500µV, GBW: 2kHz, SR: 0.8V/ms, en: 325nV/√Hz, Is: 1µA
LT1490A
200kHz, 50µA RRIO Op Amp
VOS: 500µV, GBW: 200kHz, SR: 0.06V/µs, en: 50nV/√Hz, Is: 50µA
LTC6256
6.5MHz, 65µA RRIO Op Amp
VOS: 350µV, GBW: 6.5MHz, SR: 1.8V/µs, en: 20nV/√Hz, Is: 65µA
LT6020
400kHz, 100µA, 5V/µs Op Amp
VOS: 30µV, GBW: 400kHz, SR: 5V/µs, en: 46nV/√Hz, Is: 100µA
LTC2055
500kHz, 150µA Zero-Drift Op Amp
VOS: 3µV, GBW: 500kHz, SR: 0.5V/µs, Is: 150µA
LT1783
1.2MHz, 230µA Over-The-Top RRIO Op Amp
VOS: 600µV, GBW: 1.2MHz, SR: 0.4V/µs, en: 20nV/√Hz, Is: 230µA
LT1352
3MHz. 200V/µs Op Amp
VOS: 600µV, GBW: 3MHz, SR: 200V/µs, en: 14nV/√Hz, Is: 330µA
LT1492
5MHz, 3V/µs Op Amp
VOS: 180µV, GBW: 5MHz, SR: 3V/µs, en: 16.5nV/√Hz, Is: 550µA
LTC5800
SmartMesh® Wireless Sensor Network IC
Wireless Mesh Networks
LT5400
Quad Matched Resistor Network
0.01% Matching
22 Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
For more information www.linear.com/LT6023
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com/LT6023
60231fa
LT 0415 REV A • PRINTED IN USA
 LINEAR TECHNOLOGY CORPORATION 2015