Anachip AF2302NWLA 20v n-channel enhancement mode mosfet Datasheet

AF2302N
20V N-Channel Enhancement Mode MOSFET
Features
Product Summary
- Advanced trench process technology
- High density cell design for ultra low on-resistance
- Excellent thermal and electrical capabilities
- Compact and low profile SOT-23 package
VDS = 20V
RDS (on), [email protected], [email protected] =65mΩ.
RDS (on), [email protected], [email protected] =95mΩ.
Pin Descriptions
Pin Assignments
Pin
No.
1
2
3
3
(Top View)
1
1. G
2. S
3. D
2
Pin
Name
G
S
D
Description
Gate
Source
Drain
Ordering information
Feature
A X
2302N X X X
PN
Package
Lead Free
Packing
W: SOT23
Blank : Normal
L : Lead Free Package
Blank : Tube or Bulk
A : Tape & Reel
F :MOSFET
Block Diagram
D
S
G
This datasheet contains new product information. Anachip Corp. reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of
this product. No rights under any patent accompany the sale of the product.
Rev. 1.1 Jul 20, 2004
1/4
AF2302N
20V N-Channel Enhancement Mode MOSFET
Absolute Maximum Ratings (TA=25ºC unless otherwise noted)
Symbol
VDS
VGS
ID
IDM
PD
TJ
TJ, TSTG
Parameter
Rating
20
±8
2.4
10
1.25
0.8
+150
-55 to +150
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current
TA=25ºC
TA=70ºC
Maximum Power Dissipation
Operating Junction Temperature
Operating Junction and Storage Temperature Range
Units
V
V
A
A
W
ºC
ºC
Thermal Performance
Symbol
TL
RθJA
Parameter
Lead Temperature (1/8” from case)
Junction to Ambient Thermal Resistance (PCB mounted)
Limit
5
100
Units
S
ºC/W
Note: Surface mounted on FR4 board t < 5 sec.
Electrical Characteristics Rate ID=2.4A, (TA=25oC unless otherwise noted)
Symbol
Static
BVDSS
RDS(ON)
Parameter
Drain-Source Breakdown Voltage
Drain-Source On-State Resistance
VGS(TH)
Gate Threshold Voltage
IDSS
Zero Gate Voltage Drain Current
IGSS
Gate Body Leakage
ID(ON)
On-State Drain Current
gfs
Forward Tranconductance
Dynamic
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf
Turn-Off Fall-Time
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Source-Drain Diode
IS
Max. Diode Forward Current
VSD
Diode Forward Voltage
Test Conditions
VGS=0V, ID=250uA
VGS=4.5V, ID=3.6A
VGS=2.5V, ID=3.1A
VDS= VGS, ID=250uA
VDS=20V, VGS=0V
VGS=±8V, VDS=0V
VDS=5V, VGS=4.5V
VDS=5V, ID=3.6A
VDS=10V, ID=3.6A,
VGS=4.5V
VDD=10V, RL=10Ω,
ID=1A, VGEN=4.5V,
RG=6Ω
VDS=10V, VGS=0V,
f=1.0MHz
IS=1.0A, VGS=0V
Min.
Limits
Typ.
Max.
20
0.45
6
-
50
75
10
65
95
1.0
±100
-
-
5.2
0.65
1.5
7
55
16
10
450
70
43
10
15
80
60
25
-
-
0.75
1.6
1.2
Unit
V
mΩ
V
uA
nA
A
S
nC
nS
pF
A
V
Note: Pulse test: pulse width < 300uS, duty cycle < 2%
Anachip Corp.
www.anachip.com.tw
Rev. 1.1 Jul 20, 2004
2/4
AF2302N
20V N-Channel Enhancement Mode MOSFET
Marking Information
Appendix
Part Number
AF2302N
(Top View)
SOT23
Package
SOT23-3
Device Code
02
XX YW
XX: Device Code
(See Appendix)
Date code
Y : Year
W : Week(A~Z)
Switching Test Circuit
VDD
RD
D
VIN
VGEN
RG
VOUT
OUT
G
S
Switching Waveforms
ton
td(on)
toff
tr
td(off)
tf
90%
90%
10%
Output, VOUT
10%
INVERTED
90%
50%
50%
Input, VIN
10%
PULSE WIDTH
Anachip Corp.
www.anachip.com.tw
Rev. 1.1 Jul 20, 2004
3/4
AF2302N
20V N-Channel Enhancement Mode MOSFET
HE
E
Package Information
e
A
A1
A2
b
C
D
E
e
HE
L
Dimensions In Millimeters
Min.
1.00
0.00
1.00
0.35
0.10
2.70
1.40
1.70
2.40
0.30
Nom.
1.20
1.15
0.175
2.90
1.60
2.00
2.70
-
L
C
A1
b
Symbol
A
A2
D
Max.
1.40
0.10
1.30
0.50
0.25
3.10
1.80
2.30
3.00
0.55
Anachip Corp.
www.anachip.com.tw
Dimensions In Inches
Min.
0.039
0.000
0.039
0.014
0.004
0.106
0.055
0.067
0.094
0.012
Nom.
0.047
0.045
0.007
0.114
0.063
0.079
0.106
-
Max.
0.055
0.004
0.051
0.020
0.010
0.122
0.071
0.091
0.118
0.022
Rev. 1.1 Jul 20, 2004
4/4
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