CY62136V MoBL® 2-Mbit (128K x 16) Static RAM This is ideal for providing More Battery Life™ (MoBL®) in portable applications such as cellular telephones. The device also has an automatic power-down feature that significantly reduces power consumption by 99% when addresses are not toggling. The device can also be put into standby mode when deselected (CE HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH), outputs are disabled (OE HIGH), BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW). Features • Temperature Ranges — Commercial : 0°C to 70°C — Industrial : −40°C to 85°C — Automotive : −40°C to 125°C • High speed: 55 ns and 70 ns • 70-ns speed bin offered in both Industrial and Automotive grades Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is written into the location specified on the address pins (A0 through A16). If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A0 through A16). • Wide voltage range: 2.7V-3.6V • Ultra-low active, standby power • Easy memory expansion with CE and OE features • TTL-compatible inputs and outputs • Automatic power-down when deselected • CMOS for optimum speed/power • Package available in a standard 44-pin TSOP Type II (forward pinout) package Functional Description[1] The CY62136V is a high-performance CMOS static RAM organized as 128K words by 16 bits. This device features advanced circuit design to provide ultra-low active current. Reading from the device is accomplished by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins will appear on I/O0 to I/O7. If Byte High Enable (BHE) is LOW, then data from memory will appear on I/O8 to I/O15. See the Truth Table at the back of this data sheet for a complete description of read and write modes. Logic Block Diagram 128K x 16 RAM Array 2048 x 1024 SENSE AMPS ROW DECODER DATA IN DRIVERS A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 – I/O7 I/O8 – I/O15 BHE WE CE OE BLE A14 A15 A16 A12 A13 A11 COLUMN DECODER Note: 1. For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com. Cypress Semiconductor Corporation Document #: 38-05087 Rev. *B • 3901 North First Street • San Jose, CA 95134 • 408-943-2600 Revised September 24, 2004 CY62136V MoBL® Product Portfolio Power Dissipation (Industrial) VCC Range (V) Operating, ICC (mA) Standby, ISB2 (µA) Product Min Typ.[2] Max Speed Grades Typ.[2] Maximum Typ.[2] Maximum CY62136VLL 2.7 3.0 3.6 55 Industrial 7 20 1 15 Industrial 7 15 1 15 70 CY62136VSL Automotive 7 20 1 20 55 Industrial 7 20 1 5 70 Industrial 7 15 1 5 Pin Configurations[3] TSOP II (Forward) Top View A4 A3 A2 A1 A0 CE I/O0 I/O1 I/O2 I/O3 VCC VSS I/O4 I/O5 I/O6 I/O7 WE A16 A15 A14 A13 A12 1 44 2 3 43 42 4 41 40 39 38 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A5 A6 A7 OE BHE BLE I/O15 I/O14 I/O13 I/O12 VSS VCC I/O11 I/O10 I/O9 I/O8 NC A8 A9 A10 A11 NC Notes: 2. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC Typ, TA = 25°C. 3. NC pins are not connected on the die Document #: 38-05087 Rev. *B Page 2 of 11 CY62136V MoBL® Maximum Ratings Output Current into Outputs (LOW)............................ 20 mA (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature .................................. –65°C to +150°C Static Discharge Voltage........................................... > 2001V (per MIL-STD-883, Method 3015) Latch-up Current..................................................... > 200 mA Operating Range Ambient Temperature with Power Applied............................................. –55°C to +125°C Supply Voltage to Ground Potential ............... –0.5V to +4.6V Range Ambient Temperature[TA][6] VCC DC Voltage Applied to Outputs in High-Z State[4] ....................................–0.5V to VCC + 0.5V Industrial −40°C to +85°C 2.7V to 3.6V Automotive −40°C to +125°C DC Input Voltage[4] .................................–0.5V to VCC + 0.5V Electrical Characteristics Over the Operating Range CY62136V-55 Parameter Description Test Conditions IOH = −1.0 mA VOH Output HIGH Voltage VOL VCC = 2.7V VIH Output LOW Voltage IOL = 2.1 mA Input HIGH Voltage VCC = 2.7V Min. VCC = 2.7V Typ.[2] CY62136V-70 Max. Min. Typ.[2] Max. Unit 2.4 2.4 0.4 VCC = 3.6V 2.2 VIL Input LOW Voltage IIX Input Load Current GND < VI < VCC Industrial IOZ Output Leakage Current GND < VO < VCC, Output Disabled Industrial ICC VCC Operating Supply Current f = fMAX = 1/tRC, ISB1 Automatic CE Power-down Current— CMOS Inputs CE > VCC−0.3V, VIN > VCC−0.3V or VIN < 0.3V, f = fMAX ISB2 Automatic CE Power-down Current— CMOS Inputs VCC = 3.6V Industrial(LL) CE > VCC−0.3V VIN > VCC−0.3V or Industrial(SL) VIN < 0.3V, f = 0 Automotive VCC + 2.2 0.5V 0.4 V VCC+ 0.5V V –0.5 0.8 –0.5 0.8 V –1 +1 –1 +1 µA –10 +10 µA –1 +1 –1 +1 µA Automotive f = 1 MHz, V +10 µA 7 20 7 15 mA 7 20 mA 1 2 1 2 mA 100 µA 15 µA Automotive VCC = 3.6V, Industrial IOUT = 0 mA, Automotive CMOS Levels –10 100 1 15 1 1 5 1 5 µA 1 20 µA Thermal Resistance Parameter Description Test Conditions ΘJA Thermal Resistance (Junction to Ambient)[5] ΘJC Thermal Resistance (Junction to Case)[5] Still Air, soldered on a 4.25 x 1.125 inch, 4-layer printed circuit board TSOPII Unit 60 °C/W 22 °C/W Capacitance[5] Parameter Description CIN Input Capacitance COUT Output Capacitance Test Conditions TA = 25°C, f = 1 MHz, VCC= VCC(typ) Max. Unit 6 pF 8 pF Notes: 4. VIL(min) = –2.0V for pulse durations less than 20 ns. 5. Tested initially and after any design or process changes that may affect these parameters. 6. TA is the “Instant-On” case temperature. Document #: 38-05087 Rev. *B Page 3 of 11 CY62136V MoBL® AC Test Loads and Waveforms R1 R1 VCC ALL INPUT PULSES VCC OUTPUT VCC Typ OUTPUT 90% 10% 90% 10% GND R2 30 pF R2 5 pF INCLUDING JIG AND SCOPE Rise Time: 1 V/ns INCLUDING JIG AND SCOPE (a) Fall Time: 1 V/ns (c) (b) Equivalent to: THÉVENIN EQUIVALENT RTH OUTPUT V Parameters 3.0V Unit R1 1105 Ohms R2 1550 Ohms RTH 645 Ohms VTH 1.75 Volts Data Retention Characteristics (Over the Operating Range) Parameter Conditions[8] Description VDR VCC for Data Retention ICCDR Data Retention Current Typ.[2] Min. Max. Unit 3.6 V 7.5 µA 1.0 VCC = 1.0V, CE > VCC − 0.3V, VIN > VCC LL − 0.3V or VIN < 0.3V, No input may SL exceed VCC + 0.3V 0.5 5 tCDR[5] Chip Deselect to Data Retention Time 0 ns tR[7] Operation Recovery Time 70 ns Data Retention Waveform DATA RETENTION MODE VCC(min.) VCC VCC(min.) VDR > 1.0 V tR tCDR CE Switching Characteristics Over the Operating Range [8] 55 ns Parameter Description Min. 70 ns Max. Min. Max. Unit 70 ns Read Cycle tRC Read Cycle Time tAA Address to Data Valid tOHA Data Hold from Address Change tACE CE LOW to Data Valid tDOE OE LOW to Data Valid tLZOE OE LOW to Low-Z[9] 55 70 55 10 10 55 25 5 ns 5 ns 70 ns 35 ns ns Notes: 7. Full device operation requires linear VCC ramp from VDR to VCC(min) > 100 ms or stable at VCC(min) > 100 ms. 8. Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to VCC typ., and output loading of the specified IOL/IOH and 30-pF load capacitance. 9. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device. 10. tHZOE, tHZCE, and tHZWE are specified with CL = 5 pF as in (b) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage. Document #: 38-05087 Rev. *B Page 4 of 11 CY62136V MoBL® Switching Characteristics Over the Operating Range (continued)[8] 55 ns Parameter Description Min. [9, 10] tHZOE OE HIGH to High-Z tLZCE CE LOW to Low-Z[9] 70 ns Max. Min. 25 10 [9, 10] Max. Unit 25 ns 10 ns tHZCE CE HIGH to High-Z tPU CE LOW to Power-up tPD CE HIGH to Power-down 55 70 ns tDBE BLE / BHE LOW to Data Valid 25 35 ns 25 ns 25 0 [9, 10] tLZBE BLE / BHE LOW to Low-Z tHZBE BLE / BHE HIGH to High-Z[11] 25 0 5 5 25 ns ns ns Write Cycle[11, 12] tWC Write Cycle Time 55 70 ns tSCE CE LOW to Write End 45 60 ns tAW Address Set-up to Write End 45 60 ns tHA Address Hold from Write End 0 0 ns tSA Address Set-up to Write Start 0 0 ns tPWE WE Pulse Width 40 50 ns tBW BLE / BHE LOW to Write End 50 60 ns tSD Data Set-up to Write End 25 30 ns tHD Data Hold from Write End 0 0 ns tHZWE WE LOW to High-Z[9, 10] tLZWE WE HIGH to Low-Z[9] 20 5 25 10 ns ns Switching Waveforms Read Cycle No. 1 [13, 14] tRC ADDRESS tOHA DATA OUT PREVIOUS DATA VALID tAA DATA VALID Notes: 11. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write. 12. The minimum write cycle time for write cycle 3 (WE controlled, OE LOW) is the sum of tHZWE and tSD. 13. Device is continuously selected. OE, CE = VIL. 14. WE is HIGH for read cycle. Document #: 38-05087 Rev. *B Page 5 of 11 CY62136V MoBL® Switching Waveforms (continued) Read Cycle No. 2 [14, 15] tRC CE tPD tHZCE tACE OE tHZOE tDOE BHE/BLE tLZOE tHZBE tDBE tLZBE DATA OUT HIGH IMPEDANCE HIGH IMPEDANCE DATA VALID tLZCE VCC SUPPLY CURRENT tPU ICC 50% 50% ISB [11, 16, 17] Write Cycle No. 1 (WE Controlled) tWC ADDRESS CE tAW tHA tSA WE tPWE tBW BHE/BLE OE tSD DATA I/O NOTE 18 tHD DATAIN VALID tHZOE Notes: 15. Address valid prior to or coincident with CE transition LOW. 16. Data I/O is high impedance if OE = VIH. 17. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state. 18. During this period, the I/Os are in output state and input signals should not be applied. Document #: 38-05087 Rev. *B Page 6 of 11 CY62136V MoBL® Switching Waveforms (continued) Write Cycle No. 2 (CE Controlled) [11, 16, 17] tWC ADDRESS tSCE CE tSA tAW tHA tBW BHE/BLE tPWE WE tSD DATA I/O tHD DATAIN VALID Write Cycle No. 3 (WE Controlled, OE LOW) [12, 17] tWC ADDRESS CE tAW tBW BHE/BLE WE tHA tSA tSD DATA I/O NOTE 18 tHZWE Document #: 38-05087 Rev. *B tHD DATAIN VALID tLZWE Page 7 of 11 CY62136V MoBL® Switching Waveforms (continued) Write Cycle No. 4 (BHE/BLE Controlled, OE LOW) [18] tWC ADDRESS CE tAW tHA tBW BHE/BLE tSA WE tSD DATA I/O tHD DATAIN VALID NOTE 18 tLZWE tHZWE Typical DC and AC Characteristics Normalized Operating Current vs. Supply Voltage 1.4 Standby Current vs. Supply Voltage 35 MoBL 30 1.2 MoBL 25 ISB (µA) ICC 1.0 0.8 0.6 20 15 10 0.4 5 0.2 0.0 1.7 0 2.2 2.7 3.2 SUPPLY VOLTAGE (V) 3.7 1.0 2.7 2.8 3.7 1.9 SUPPLY VOLTAGE (V) Access Time vs. Supply Voltage 80 MoBL 70 60 TAA (ns) 50 40 30 20 10 1.0 1.9 2.7 2.8 3.7 SUPPLY VOLTAGE (V) Document #: 38-05087 Rev. *B Page 8 of 11 CY62136V MoBL® Truth Table CE WE OE BHE BLE Inputs/Outputs Mode Power H X X X X High-Z Deselect/Power-down Standby (ISB) L H L L L Data Out (I/OO–I/O15) Read Active (ICC) L H L H L Data Out (I/OO–I/O7); I/O8–I/O15 in High-Z Read Active (ICC) L H L L H Data Out (I/O8–I/O15); I/O0–I/O7 in High-Z Read Active (ICC) L H L H H High-Z Deselect/Output Disabled Active (ICC) L H H L L High-Z Deselect/Output Disabled Active (ICC) L H H H L High-Z Deselect/Output Disabled Active (ICC) L H H L H High-Z Deselect/Output Disabled Active (ICC) L L X L L Data In (I/OO–I/O15) Write Active (ICC) L L X H L Data In (I/OO–I/O7); I/O8–I/O15 in High-Z Write Active (ICC) L L X L H Data In (I/O8–I/O15); I/O0 –I/O7 in High-Z Write Active (ICC) Ordering Information Speed (ns) 55 Ordering Code CY62136VLL-55ZSI CY62136VSL-55ZSI 70 Package Name ZS44 Package Type 44-pin TSOP II Operating Range Industrial Industrial CY62136VLL-70ZSI Industrial CY62136VLL-70ZSE Automotive CY62136VSL-70ZSI Industrial Document #: 38-05087 Rev. *B Page 9 of 11 CY62136V MoBL® Package Diagrams 44-pin TSOP II ZS44 51-85087-*A MoBL is a registered trademark, and More Battery Life is a trademark, of Cypress Semiconductor Corporation. All product and company names mentioned in this document are the products of their respective holders. Document #: 38-05087 Rev. *B Page 10 of 11 © Cypress Semiconductor Corporation, 2004. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. CY62136V MoBL® Document History Page Document Title: CY62136V MoBL® 2-Mbit (128K x 16) Static RAM Document Number: 38-05087 REV. ECN NO. Issue Date Orig. of Change Description of Change ** 107347 05/25/01 SZV Changed from Spec #: 38-00728 to 38-05087 *A 116509 09/04/02 GBI Added footnote 1 Added SL power bin Deleted fBGA package; replacement fBGA package available in CY62136CV30 *B 269729 See ECN SYT Added Automotive Information for 70-ns Speed Bin. Added Footnotes # 3 and # 6. Corrected Typo in Electrical Characteristics for ICC(Max)-55 ns from 15 to 20 mA. Added SL row for ISB2 in the Electrical Characteristics table. Changed Package Name from Z44 to ZS44. Replaced ‘Z’ with ‘ZS’ in the Ordering Code. Document #: 38-05087 Rev. *B Page 11 of 11