Order this document by MC34163/D The MC34163 series are monolithic power switching regulators that contain the primary functions required for dc–to–dc converters. This series is specifically designed to be incorporated in step–up, step–down, and voltage–inverting applications with a minimum number of external components. These devices consist of two high gain voltage feedback comparators, temperature compensated reference, controlled duty cycle oscillator, driver with bootstrap capability for increased efficiency, and a high current output switch. Protective features consist of cycle–by–cycle current limiting, and internal thermal shutdown. Also included is a low voltage indicator output designed to interface with microprocessor based systems. These devices are contained in a 16 pin dual–in–line heat tab plastic package for improved thermal conduction. • Output Switch Current in Excess of 3.0 A • • • • • • • • • POWER SWITCHING REGULATORS SEMICONDUCTOR TECHNICAL DATA 16 Operation from 2.5 V to 40 V Input 1 P SUFFIX PLASTIC PACKAGE CASE 648C (DIP–16) Low Standby Current Precision 2% Reference Controlled Duty Cycle Oscillator Driver with Bootstrap Capability for Increased Efficiency Cycle–by–Cycle Current Limiting 16 Internal Thermal Shutdown Protection 1 Low Voltage Indicator Output for Direct Microprocessor Interface DW SUFFIX PLASTIC PACKAGE CASE 751G (SOP–16L) Heat Tab Power Package Representative Block Diagram Ipk Sense 8 ILimit – PIN CONNECTIONS 9 Driver Collector + VCC Timing Capacitor 10 7 + 6 4 Voltage Feedback 1 3 Voltage Feedback 2 2 1 Voltage Feedback 2 2 15 Voltage Feedback 1 3 14 4 13 5 12 Timing Capacitor 6 11 VCC 7 10 Ipk Sense 8 9 Driver Collector Gnd Gnd 13 + Switch Emitter VFB ORDERING INFORMATION 15 Device + + – 16 + (Bottom View) This device contains 114 active transistors. Bootstrap Input Operating Temperature Range MC34163DW TA = 0° to +70°C MC34163P MC33163P Package SOP–16L DIP–16 SOP–16L MC33163DW TA = – 40° to +85°C Motorola, Inc. 1996 MOTOROLA ANALOG IC DEVICE DATA Switch Collector (Top View) 14 + + – Switch Emitter Gnd 12 LVI LVI Output 16 Bootstrap Input 11 Control Logic and Thermal Shutdown Gnd 1 Switch Collector OSC 5 LVI Output DIP–16 Rev 2 1 MC34163 MC33163 MAXIMUM RATINGS Rating Symbol Value Unit VCC 40 V Switch Collector Voltage Range VC(switch) –1.0 to + 40 V Switch Emitter Voltage Range VE(switch) – 2.0 to VC(switch) V VCE(switch) 40 V Power Supply Voltage Switch Collector to Emitter Voltage Switch Current (Note 1) ISW 3.4 A Driver Collector Voltage VC(driver) –1.0 to +40 V Driver Collector Current IC(driver) 150 mA IBS –100 to +100 mA Bootstrap Input Current Range (Note 1) Current Sense Input Voltage Range VIpk (Sense) (VCC–7.0) to (VCC+1.0) V Feedback and Timing Capacitor Input Voltage Range Vin –1.0 to + 7.0 V Low Voltage Indicator Output Voltage Range VC(LVI) –1.0 to + 40 V Low Voltage Indicator Output Sink Current IC(LVI) 10 mA Thermal Characteristics P Suffix, Dual–In–Line Case 648C Thermal Resistance, Junction–to–Air Thermal Resistance, Junction–to–Case (Pins 4, 5, 12, 13) DW Suffix, Surface Mount Case 751G Thermal Resistance, Junction–to–Air Thermal Resistance, Junction–to–Case (Pins 4, 5, 12, 13) Operating Junction Temperature Operating Ambient Temperature (Note 3) MC34163 MC33163 Storage Temperature Range °C/W RθJA RθJC 80 15 RθJA RθJC 94 18 TJ +150 °C °C TA 0 to +70 – 40 to + 85 Tstg °C – 65 to +150 ELECTRICAL CHARACTERISTICS (VCC = 15 V, Pin 16 = VCC, CT = 620 pF, for typical values TA = 25°C, for min/max values TA is the operating ambient temperature range that applies (Note 3), unless otherwise noted.) Characteristic Symbol Min Typ Max 46 45 50 – 54 55 Unit OSCILLATOR Frequency TA = 25°C Total Variation over VCC = 2.5 V to 40 V, and Temperature fOSC Charge Current Ichg – 225 – µA Idischg – 25 – µA Ichg/Idischg 8.0 9.0 10 – Sawtooth Peak Voltage VOSC(P) – 1.25 – V Sawtooth Valley Voltage VOSC(V) – 0.55 – V 4.9 – 4.85 5.05 0.008 – 5.2 0.03 5.25 V %/V V – 100 200 µA Discharge Current Charge to Discharge Current Ratio kHz FEEDBACK COMPARATOR 1 Threshold Voltage TA = 25°C Line Regulation (VCC = 2.5 V to 40 V, TA = 25°C) Total Variation over Line, and Temperature Vth(FB1) Input Bias Current (VFB1 = 5.05 V) IIB(FB1) NOTES: 1. Maximum package power dissipation limits must be observed. 2. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. 3. Tlow = 0°C for MC34163 Thigh = + 70°C for MC34163 = – 40°C for MC33163 = + 85°C for MC33163 2 MOTOROLA ANALOG IC DEVICE DATA MC34163 MC33163 ELECTRICAL CHARACTERISTICS (continued) (VCC = 15 V, Pin 16 = VCC, CT = 620 pF, for typical values TA = 25°C, for min/max values TA is the operating ambient temperature range that applies (Note 3), unless otherwise noted.) Characteristic Symbol Min Typ Max Unit 1.225 – 1.213 1.25 0.008 – 1.275 0.03 1.287 V %/V V – 0.4 0 0.4 µA – 230 250 – – 270 – 1.0 20 – – 0.6 1.0 1.0 1.4 – 0.02 100 µA FEEDBACK COMPARATOR 2 Threshold Voltage TA = 25°C Line Regulation (VCC = 2.5 V to 40 V, TA = 25°C) Total Variation over Line, and Temperature Vth(FB2) Input Bias Current (VFB2 = 1.25 V) IIB(FB2) CURRENT LIMIT COMPARATOR Threshold Voltage TA = 25°C Total Variation over VCC = 2.5 V to 40 V, and Temperature Vth(Ipk Sense) Input Bias Current (VIpk (Sense) = 15 V) mV IIB(sense) µA DRIVER AND OUTPUT SWITCH (Note 2) Sink Saturation Voltage (ISW = 2.5 A, Pins 14, 15 grounded) Non–Darlington Connection (RPin 9 = 110 Ω to VCC, ISW/IDRV ≈ 20) Darlington Connection (Pins 9, 10, 11 connected) VCE(sat) Collector Off–State Leakage Current (VCE = 40 V) V IC(off) Bootstrap Input Current Source (VBS = VCC + 5.0 V) Isource(DRV) 0.5 2.0 4.0 mA VZ VCC + 6.0 VCC + 7.0 VCC + 9.0 V Input Threshold (VFB2 Increasing) Vth 1.07 1.125 1.18 V Input Hysteresis (VFB2 Decreasing) VH – 15 – mV Output Sink Saturation Voltage (Isink = 2.0 mA) VOL(LVI) – 0.15 0.4 V Output Off–State Leakage Current (VOH = 15 V) IOH – 0.01 5.0 µA ICC – 6.0 10 mA Bootstrap Input Zener Clamp Voltage (IZ = 25 mA) LOW VOLTAGE INDICATOR TOTAL DEVICE Standby Supply Current (VCC = 2.5 V to 40 V, Pin 8 = VCC, Pins 6, 14, 15 = Gnd, remaining pins open) Figure 1. Output Switch On–Off Time versus Oscillator Timing Capacitor 100 10 VCC = 15 V TA = 25°C 1) ton, RDT = ∞ 2) ton, RDT = 20 k 3) ton, toff, RDT = 10 k 4) toff, RDT = 20 k 5) toff, RDT = ∞ 1 2 3 4 5 1.0 0.1 1.0 CT, OSCILLATOR TIMING CAPACITOR (nF) MOTOROLA ANALOG IC DEVICE DATA 10 ∆ f OSC, OSCILLATOR FREQUENCY CHANGE (%) t on –t off , OUTPUT SWITCH ON–OFF TIME ( µ s) NOTES: 1. Maximum package power dissipation limits must be observed. 2. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. 3. Tlow = 0°C for MC34163 Thigh = + 70°C for MC34163 = – 40°C for MC33163 = + 85°C for MC33163 Figure 2. Oscillator Frequency Change versus Temperature 2.0 VCC = 15 V CT = 620 pF 0 – 2.0 – 4.0 – 6.0 – 55 – 25 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) 100 125 3 140 IIB , INPUT BIAS CURRENT ( µ A) VCC = 15 V VFB1 = 5.05 V 120 100 80 I source (DRV) , BOOTSTRAP INPUT CURRENT SOURCE (mA) 60 – 55 – 25 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) 100 125 Figure 5. Bootstrap Input Current Source versus Temperature 2.8 VCC = 15 V Pin 16 = VCC + 5.0 V 2.4 2.0 1.6 1.2 – 55 – 25 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) 100 125 V Z, BOOTSTRAP INPUT ZENER CLAMP VOLTAGE (V) Figure 3. Feedback Comparator 1 Input Bias Current versus Temperature V th(FB2), COMPARATOR 2 THRESHOLD VOLTAGE (mV) MC34163 MC33163 Figure 4. Feedback Comparator 2 Threshold Voltage versus Temperature 1300 1260 Vth Typ = 1250 mV 1240 Vth Min = 1225 mV 1220 1200 – 55 100 125 7.6 IZ = 25 mA 7.4 7.2 7.0 6.8 – 55 – 25 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) 100 125 1.2 VCC – 0.4 – 0.8 Darlington Configuration Emitter Sourcing Current to Gnd Pins 7, 8, 10, 11 = VCC Pins 4, 5, 12, 13 = Gnd TA = 25°C, (Note 2) VCE (sat), SINK SATURATION (V) VCE (sat), SOURCE SATURATION (V) 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) Figure 8. Output Switch Sink Saturation versus Collector Current 0 Bootstrapped, Pin 16 = VCC + 5.0 V –1.2 –1.6 4 – 25 Figure 6. Bootstrap Input Zener Clamp Voltage versus Temperature Figure 7. Output Switch Source Saturation versus Emitter Current – 2.0 Vth Max = 1275 mV VCC = 15 V 1280 Non–Bootstrapped, Pin 16 = VCC 0 0.8 2.4 1.6 IE, EMITTER CURRENT (A) 3.2 Darlington, Pins 9, 10, 11 Connected 1.0 0.8 Grounded Emitter Configuration Collector Sinking Current From VCC Pins 7, 8 = VCC = 15 V Pins 4, 5, 12, 13, 14, 15 = Gnd TA = 25°C, (Note 2) Saturated Switch, RPin9 = 110 Ω to VCC 0.6 0.4 0.2 0 Gnd 0 0.8 1.6 2.4 IC, COLLECTOR CURRENT (A) 3.2 MOTOROLA ANALOG IC DEVICE DATA Figure 9. Output Switch Negative Emitter Voltage versus Temperature 0 V E , EMITTER VOLTAGE (V) Gnd IC = 10 µA – 0.4 – 0.8 IC = 10 mA – 1.2 VCC = 15 V Pins 7, 8, 9, 10, 16 = VCC Pins 4, 6 = Gnd Pin 14 Driven Negative – 1.6 – 2.0 – 55 – 25 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) 100 125 V OL (LVI) , OUTPUT SATURATION VOLTAGE (V) MC34163 MC33163 Figure 10. Low Voltage Indicator Output Sink Saturation Voltage versus Sink Current 0.5 0.3 0.2 0.1 0 252 250 248 – 25 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) 100 125 1.2 1.0 0.8 0.6 – 55 – 25 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) 100 125 Figure 14. Standby Supply Current versus Temperature 8.0 7.2 I CC, SUPPLY CURRENT (mA) I CC, SUPPLY CURRENT (mA) 8.0 VCC = 15 V VIpk (Sense) = 15 V 1.4 Figure 13. Standby Supply Current versus Supply Voltage 6.0 4.0 Pins 7, 8, 16 = VCC Pins 4, 6, 14 = Gnd Remaining Pins Open TA = 25°C 2.0 0 2.0 4.0 6.0 Isink, OUTPUT SINK CURRENT (mA) 1.6 VCC = 15 V 246 – 55 0 Figure 12. Current Limit Comparator Input Bias Current versus Temperature IIB (Sense), INPUT BIAS CURRENT (µ A) V th (Ipk Sense) , THRESHOLD VOLTAGE (mV) Figure 11. Current Limit Comparator Threshold Voltage versus Temperature 254 VCC = 5 V TA = 25°C 0.4 0 10 20 30 VCC, SUPPLY VOLTAGE (V) MOTOROLA ANALOG IC DEVICE DATA 40 VCC = 15 V Pins 7, 8, 16 = VCC Pins 4, 6, 14 = Gnd Remaining Pins Open 6.4 5.6 4.8 4.0 – 55 – 25 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) 100 125 5 3.0 Pin 16 = VCC 1.4 1.0 – 55 – 25 0 25 50 75 100 ÎÎÎ ÎÎÎ ÎÎÎÎÎÎ Printed circuit board heatsink example 80 JUNCTION–TO–AIR (°C/W) 1.8 Pin 16 Open R θ JA, THERMAL RESISTANCE 2.6 2.2 100 CT = 620 pF Pins 7,8 = VCC Pins 4, 14 = Gnd Pin 9 = 1.0 kΩ to 15 V Pin 10 = 100 Ω to 15 V L RθJA 60 2.0 oz Copper L 3.0 mm Graphs represent symmetrical layout 40 0 4.0 3.0 2.0 PD(max) for TA = 70°C 20 125 5.0 0 10 TA, AMBIENT TEMPERATURE (°C) 20 1.0 30 40 0 50 P D , MAXIMUM POWER DISSIPATION (W) Figure 16. P Suffix (DIP–16) Thermal Resistance and Maximum Power Dissipation versus P.C.B. Copper Length Figure 15. Minimum Operating Supply Voltage versus Temperature L, LENGTH OF COPPER (mm) 100 JUNCTION–TO–AIR ( °C/W) 2.8 PD(max) for TA = 50°C 90 80 2.4 ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ Graph represents symmetrical layout 70 L 60 1.6 2.0 oz. Copper 1.2 L 50 RθJA 40 3.0 mm 10 0.8 0.4 30 0 2.0 20 30 40 PD, MAXIMUM POWER DISSIPATION (W) Figure 17. DW Suffix (SOP–16L) Thermal Resistance and Maximum Power Dissipation versus P.C.B. Copper Length R θ JA, THERMAL RESISTANCE V CC(min) , MINIMUM OPERATING SUPPLY VOLTAGE (V) MC34163 MC33163 0 50 L, LENGTH OF COPPER (mm) 6 MOTOROLA ANALOG IC DEVICE DATA MC34163 MC33163 Figure 18. Representative Block Diagram 8 Ipk Sense RSC Current Limit – + 9 Driver Collector 10 7 VCC + Timing Capacitor Shutdown 0.25 V + 6 CT RDT Switch Collector Oscillator Q1 Thermal Voltage Feedback 1 4 Q2 R Q S Latch 5 Gnd 11 12 60 Gnd 13 + 14 3 45 k Voltage Feedback 2 LVI Output 2 + Switch Emitter Feedback Comparator 1.25 V 15 k + 1.125 V + + – 1 + + – LVI 15 2.0 mA + 7.0 V 16 Bootstrap Input + – = Sink Only Positive True Logic (Bottom View) Figure 19. Typical Operating Waveforms 1 Comparator Output 0 1.25 V Timing Capacitor CT 0.55 V t 9t 1 Oscillator Output 0 On Output Switch Off Nominal Output Voltage Level Output Voltage MOTOROLA ANALOG IC DEVICE DATA Startup Quiescent Operation 7 MC34163 MC33163 INTRODUCTION The MC34163 series are monolithic power switching regulators optimized for dc–to–dc converter applications. The combination of features in this series enables the system designer to directly implement step–up, step–down, and voltage–inverting converters with a minimum number of external components. Potential applications include cost sensitive consumer products as well as equipment for the automotive, computer, and industrial markets. A Representative Block Diagram is shown in Figure 18. OPERATING DESCRIPTION The MC34163 operates as a fixed on–time, variable off–time voltage mode ripple regulator. In general, this mode of operation is somewhat analogous to a capacitor charge pum p and doe s n o t re q u i re d o mi n a n t p ol e l oop compensation for converter stability. The Typical Operating Waveforms are shown in Figure 19. The output voltage waveform shown is for a step–down converter with the ripple and phasing exaggerated for clarity. During initial converter startup, the feedback comparator senses that the output voltage level is below nominal. This causes the output switch to turn on and off at a frequency and duty cycle controlled by the oscillator, thus pumping up the output filter capacitor. When the output voltage level reaches nominal, the feedback comparator sets the latch, immediately terminating switch conduction. The feedback comparator will inhibit the switch until the load current causes the output voltage to fall below nominal. Under these conditions, output switch conduction can be inhibited for a partial oscillator cycle, a partial cycle plus a complete cycle, multiple cycles, or a partial cycle plus multiple cycles. Oscillator The oscillator frequency and on–time of the output switch are programmed by the value selected for timing capacitor CT. Capacitor CT is charged and discharged by a 9 to 1 ratio internal current source and sink, generating a negative going sawtooth waveform at Pin 6. As CT charges, an internal pulse is generated at the oscillator output. This pulse is connected to the NOR gate center input, preventing output switch conduction, and to the AND gate upper input, allowing the latch to be reset if the comparator output is low. Thus, the output switch is always disabled during ramp–up and can be enabled by the comparator output only at the start of ramp–down. The oscillator peak and valley thresholds are 1.25 V and 0.55 V, respectively, with a charge current of 225 µA and a discharge current of 25 µA, yielding a maximum on–time duty cycle of 90%. A reduction of the maximum duty cycle may be required for specific converter configurations. This can be accomplished with the addition of an external deadtime resistor (RDT) placed across CT. The resistor increases the discharge current which reduces the on–time of the output switch. A graph of the Output Switch On–Off Time versus Oscillator Timing Capacitance for various values of RDT is shown in Figure 1. Note that the maximum output duty cycle, ton/ton + toff, remains constant for values of CT greater than 0.2 nF. The converter output can be inhibited by 8 clamping CT to ground with an external NPN small–signal transistor. Feedback and Low Voltage Indicator Comparators Output voltage control is established by the Feedback comparator. The inverting input is internally biased at 1.25 V and is not pinned out. The converter output voltage is typically divided down with two external resistors and monitored by the high impedance noninverting input at Pin 2. The maximum input bias current is ± 0.4 µA, which can cause an output voltage error that is equal to the product of the input bias current and the upper divider resistance value. For applications that require 5.0 V, the converter output can be directly connected to the noninverting input at Pin 3. The high impedance input, Pin 2, must be grounded to prevent noise pickup. The internal resistor divider is set for a nominal voltage of 5.05 V. The additional 50 mV compensates for a 1.0% voltage drop in the cable and connector from the converter output to the load. The Feedback comparator’s output state is controlled by the highest voltage applied to either of the two noninverting inputs. The Low Voltage Indicator (LVI) comparator is designed for use as a reset controller in microprocessor–based systems. The inverting input is internally biased at 1.125 V, which sets the noninverting input thresholds to 90% of nominal. The LVI comparator has 15 mV of hysteresis to prevent erratic reset operation. The Open Collector output is capable of sinking in excess of 6.0 mA (see Figure 10). An external resistor (RLVI) and capacitor (CDLY) can be used to program a reset delay time (tDLY) by the formula shown below, where Vth(MPU) is the microprocessor reset input threshold. Refer to Figure 20. tDLY = RLVI CDLY In ǒ Ǔ 1 Vth(MPU) 1– Vout Current Limit Comparator, Latch and Thermal Shutdown With a voltage mode ripple converter operating under normal conditions, output switch conduction is initiated by the oscillator and terminated by the Voltage Feedback comparator. Abnormal operating conditions occur when the converter output is overloaded or when feedback voltage sensing is lost. Under these conditions, the Current Limit comparator will protect the Output Switch. The switch current is converted to a voltage by inserting a fractional ohm resistor, RSC, in series with VCC and output switch transistor Q2. The voltage drop across RSC is monitored by the Current Sense comparator. If the voltage drop exceeds 250 mV with respect to VCC, the comparator will set the latch and terminate output switch conduction on a cycle–by–cycle basis. This Comparator/Latch configuration ensures that the Output Switch has only a single on–time during a given oscillator cycle. The calculation for a value of RSC is: RSC V + Ipk0.25 (Switch) MOTOROLA ANALOG IC DEVICE DATA MC34163 MC33163 Figures 11 and 12 show that the Current Sense comparator threshold is tightly controlled over temperature and has a typical input bias current of 1.0 µA. The propagation delay from the comparator input to the Output Switch is typically 200 ns. The parasitic inductance associated with RSC and the circuit layout should be minimized. This will prevent unwanted voltage spikes that may falsely trip the Current Limit comparator. Internal thermal shutdown circuitry is provided to protect the IC in the event that the maximum junction temperature is exceeded. When activated, typically at 170°C, the Latch is forced into the “Set” state, disabling the Output Switch. This feature is provided to prevent catastrophic failures from accidental device overheating. It is not intended to be used as a replacement for proper heatsinking. Driver and Output Switch To aid in system design flexibility and conversion efficiency, the driver current source and collector, and output switch collector and emitter are pinned out separately. This allows the designer the option of driving the output switch into saturation with a selected force gain or driving it near saturation when connected as a Darlington. The output switch has a typical current gain of 70 at 2.5 A and is designed to switch a maximum of 40 V collector to emitter, with up to 3.4 A peak collector current. The minimum value for RSC is: RSC(min) + 0.25 V 3.4 A + 0.0735 Ω When configured for step–down or voltage–inverting applications, as in Figures 20 and 24, the inductor will forward bias the output rectifier when the switch turns off. Rectifiers with a high forward voltage drop or long turn–on delay time should not be used. If the emitter is allowed to go sufficiently negative, collector current will flow, causing additional device heating and reduced conversion efficiency. Figure 9 shows that by clamping the emitter to 0.5 V, the collector current will be in the range 10 µA over temperature. A 1N5822 or equivalent Schottky barrier rectifier is recommended to fulfill these requirements. A bootstrap input is provided to reduce the output switch saturation voltage in step–down and voltage–inverting MOTOROLA ANALOG IC DEVICE DATA converter applications. This input is connected through a series resistor and capacitor to the switch emitter and is used to raise the internal 2.0 mA bias current source above VCC. An internal zener limits the bootstrap input voltage to VCC +7.0 V. The capacitor’s equivalent series resistance must limit the zener current to less than 100 mA. An additional series resistor may be required when using tantalum or other low ESR capacitors. The equation below is used to calculate a minimum value bootstrap capacitor based on a minimum zener voltage and an upper limit current source. C B(min) ∆t + + I ∆V 4.0 mA ton 4.0 V + 0.001 ton Parametric operation of the MC34163 is guaranteed over a supply voltage range of 2.5 V to 40 V. When operating below 3.0 V, the Bootstrap Input should be connected to VCC. Figure 15 shows that functional operation down to 1.7 V at room temperature is possible. Package The MC34163 is contained in a heatsinkable 16–lead plastic dual–in–line package in which the die is mounted on a special heat tab copper alloy lead frame. This tab consists of the four center ground pins that are specifically designed to improve thermal conduction from the die to the circuit board. Figures 16 and 17 show a simple and effective method of utilizing the printed circuit board medium as a heat dissipater by soldering these pins to an adequate area of copper foil. This permits the use of standard layout and mounting practices while having the ability to halve the junction–to–air thermal resistance. These examples are for a symmetrical layout on a single–sided board with two ounce per square foot of copper. APPLICATIONS The following converter applications show the simplicity and flexibility of this circuit architecture. Three main converter topologies are demonstrated with actual test data shown below each of the circuit diagrams. 9 MC34163 MC33163 Figure 20. Step–Down Converter 0.25 V + 8 Vin 12 V RSC 0.075 9 10 7 + Cin 330 Current Limit – + + 6 CT 680 pF Oscillator 11 Q1 Q2 R Q S Latch 5 Thermal 4 12 60 13 + 14 3 45 k 2 RLVI 10 k Low Voltage Indicator Output + 1 CDLY LVI + + – + + – Feedback Comparator 15 1N5822 0.02 2.0 mA 1.25 V 15 k + 1.125 V 16 + 7.0 V CB L 2200 (Bottom View) Test RB Condition 180 µH Coilcraft LO451–A Vout + 5.05 V/3.0 A CO Results Line Regulation Vin = 8.0 V to 24 V, IO = 3.0 A 6.0 mV = ± 0.06% Load Regulation Vin = 12 V, IO = 0.6 A to 3.0 A 2.0 mV = ± 0.02% Output Ripple Vin = 12 V, IO = 3.0 A 36 mVpp Short Circuit Current Vin = 12 V, RL = 0.1 Ω 3.3 A Efficiency, Without Bootstrap Vin = 12 V, IO = 3.0 A 76.7% Efficiency, With Bootstrap Vin = 12 V, IO = 3.0 A 81.2% Figure 21. External Current Boost Connections for Ipk (Switch) Greater Than 3.4 A Figure 21A. External NPN Switch 8 7 Figure 21B. External PNP Saturated Switch 9 8 10 7 + 11 Q1 Q2 5 + 10 5 13 4 11 Q1 Q2 + 12 13 3 14 15 2 15 16 1 14 2 + (Bottom View) 6 12 3 1 10 Q3 + 6 4 9 Q3 16 + (Bottom View) MOTOROLA ANALOG IC DEVICE DATA MC34163 MC33163 Figure 22. Step–Up Converter 0.25 V + 8 RSC 0.075 Vin 12 V + Cin 330 Current Limit – + L 9 180 µH Coilcraft LO451–A 10 7 + 6 CT 680 pF Oscillator 11 Q1 Thermal 4 Q2 R Q S Latch 5 12 60 13 + 1N5822 14 3 45 k 2 Low Voltage Indicator Output + 1 RLVI 1.0 k R1 2.2 k LVI + + – Feedback Comparator 1.25 V 15 k + 1.125 V + + – R2 47 k 15 2.0 mA 16 + 7.0 V Test Vout 28 V/600 mA + C O 330 (Bottom View) Condition Results Line Regulation Vin = 9.0 V to 16 V, IO = 0.6 A 30 mV = ± 0.05% Load Regulation Vin = 12 V, IO = 0.1 A to 0.6 A 50 mV = ± 0.09% Output Ripple Vin = 12 V, IO = 0.6 A 140 mVpp Efficiency Vin = 12 V, IO = 0.6 A 88.1% Figure 23. External Current Boost Connections for Ipk (Switch) Greater Than 3.4 A Figure 23A. External NPN Switch 8 7 Figure 23B. External PNP Saturated Switch 9 8 10 7 + 10 + 6 Q1 Q2 5 4 9 + 11 6 12 5 13 4 3 14 2 1 + (Bottom View) MOTOROLA ANALOG IC DEVICE DATA 11 Q1 Q2 + 12 13 3 14 15 2 15 16 1 Q3 Q3 16 + (Bottom View) 11 MC34163 MC33163 Figure 24. Voltage–Inverting Converter 0.25 V + 8 RSC 0.075 Vin 12 V Cin 330 Current Limit – + 9 10 7 + + 6 CT 470 pF Oscillator 11 Q1 Q2 R Q S Latch 5 Thermal 4 12 60 13 + Coilcraft LO451–A 14 3 45 k 2 + 1 LVI R2 8.2 k + + – + + – Feedback Comparator 1.25 V 15 k + 1.125 V R1 953 15 0.02 2.0 mA 16 + 7.0 V RB CB 1N5822 2200 (Bottom View) Test L 180 µH Vout – 12 V/1.0 A + CO Condition Results Line Regulation Vin = 9.0 V to 16 V, IO = 1.0 A 5.0 mV = ± 0.02% Load Regulation Vin = 12 V, IO = 0.6 A to 1.0 A 2.0 mV = ± 0.01% Output Ripple Vin = 12 V, IO = 1.0 A 130 mVpp Short Circuit Current Vin = 12 V, RL = 0.1 Ω 3.2 A Efficiency, Without Bootstrap Vin = 12 V, IO = 1.0 A 73.1% Efficiency, With Bootstrap Vin = 12 V, IO = 1.0 A 77.5% Figure 25. External Current Boost Connections for Ipk (Switch) Greater Than 3.4 A Figure 25A. External NPN Switch 8 7 + 9 8 10 7 9 11 Q1 Q2 10 6 11 Q1 Q2 12 5 13 4 3 14 3 14 2 15 2 15 5 4 Q3 + 6 + 16 1 + (Bottom View) 12 Figure 25B. External PNP Saturated Switch Q3 12 13 + 16 1 + (Bottom View) MOTOROLA ANALOG IC DEVICE DATA MC34163 MC33163 Figure 26. Printed Circuit Board and Component Layout (Circuits of Figures 20, 22, 24) + + + + VO – + CT L C in R1 RB – CB V in R2 + R LVI CO MC34163 Step–Down + + + + R SC + Bottom View + Top View + + + – R LVI V in – + L C in R1 + R2 MC34163 Step–Up + VO CO + + + CT + R SC + Bottom View + Top View + + MC34163 Voltage–Inverting + VO + – CB + RB – R1 V in + + + + Bottom View CT L C in + R2 CO + R SC + Top View All printed circuit boards are 2.58” in width by 1.9” in height. MOTOROLA ANALOG IC DEVICE DATA 13 MC34163 MC33163 Figure 27. Design Equations Calculation Step–Down Step–Up ton toff ) VF V in * V sat * V out Vout (Notes 1, 2, 3) ƒ 32.143 · 10–6 ƒ IL(avg) Iout Ipk (Switch) RSC L Vripple(pp) Vout IL(avg) ǒ DIL ƒ ) D2IL Ǔ ǒ Ǔ) 1 8ƒ CO V ref 2 ǒ Ǔ R2 R1 )1 I out ) D2IL ǒ Ǔ (ESR)2 )1 V in * Vsat DIL [ tonC Iout V ref R2 R1 )1 ton toff )1 ) D2IL ǒ Ǔ 0.25 Ipk (Switch) t on ǒ Ǔ O ǒ Ǔ IL(avg) 0.25 Ipk (Switch) t on )1 t on t off 32.143 · 10–6 ƒ ǒ Ǔ IL(avg) * Vsat * Vout DIL ƒ 32.143 · 10–6 ƒ ton toff ǒ Ǔ t on t off )1 t on t off I out 0.25 Ipk (Switch) V in ǒ Ǔ t on t off )1 CT |V out| V in – Vsat ǒ Ǔ t on t off ) VF Vin * V sat ) VF – Vin V out t on t off ton Voltage–Inverting V in * Vsat DIL t on [ tonC Iout ǒ Ǔ O V ref R2 R1 )1 The following Converter Characteristics must be chosen: Nominal operating input voltage. Desired output voltage. Desired output current. Desired peak–to–peak inductor ripple current. For maximum output current it is suggested that ∆IL be chosen to be less than 10% of the average inductor current IL(avg). This will help prevent Ipk (Switch) from reaching the current limit threshold set by RSC. If the design goal is to use a minimum inductance value, let ∆IL = 2(IL(avg)). This will proportionally reduce converter output current capability. p – Maximum output switch frequency. Vripple(pp) – Desired peak–to–peak output ripple voltage. For best performance the ripple voltage should be kept to a low value since it will directly affect line and load regulation. Capacitor CO should be a low equivalent series resistance (ESR) electrolytic designed for switching regulator applications. Vin – Vout – Iout – ∆IL – NOTES: NOTES: NOTES: NOTES: 14 1. 2. 3. 3. Vsat – Saturation voltage of the output switch, refer to Figures 7 and 8. VF – Output rectifier forward voltage drop. Typical value for 1N5822 Schottky barrier rectifier is 0.5 V. The calculated ton/toff must not exceed the minimum guaranteed oscillator charge to discharge ratio of 8, at the minimum operating input voltage. MOTOROLA ANALOG IC DEVICE DATA MC34163 MC33163 OUTLINE DIMENSIONS P SUFFIX PLASTIC PACKAGE CASE 648C–03 (DIP–16) –A– 16 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. INTERNAL LEAD CONNECTION, BETWEEN 4 AND 5, 12 AND 13. 9 –B– 1 8 L NOTE 5 DIM A B C D E F G J K L M N C –T– M N SEATING PLANE K E F J 16 PL 0.13 (0.005) G D 16 PL 0.13 (0.005) T M A M T B S S INCHES MIN MAX 0.740 0.840 0.240 0.260 0.145 0.185 0.015 0.021 0.050 BSC 0.040 0.070 0.100 BSC 0.008 0.015 0.115 0.135 0.300 BSC 0° 10° 0.015 0.040 MILLIMETERS MIN MAX 18.80 21.34 6.10 6.60 3.69 4.69 0.38 0.53 1.27 BSC 1.02 1.78 2.54 BSC 0.20 0.38 2.92 3.43 7.62 BSC 0° 10° 0.39 1.01 DW SUFFIX PLASTIC PACKAGE CASE 751G–02 (SOP–16L) –A– 16 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF D DIMENSION AT MAXIMUM MATERIAL CONDITION. 9 –B– P 8 PL 0.25 (0.010) 1 M B M 8 G 14 PL J F R X 45° C –T– D 16 PL 0.25 (0.010) M K SEATING PLANE T A S MOTOROLA ANALOG IC DEVICE DATA B M S DIM A B C D F G J K M P R MILLIMETERS MIN MAX 10.15 10.45 7.60 7.40 2.65 2.35 0.49 0.35 0.90 0.50 1.27 BSC 0.32 0.25 0.25 0.10 7° 0° 10.05 10.55 0.25 0.75 INCHES MIN MAX 0.400 0.411 0.292 0.299 0.093 0.104 0.014 0.019 0.020 0.035 0.050 BSC 0.010 0.012 0.004 0.009 0° 7° 0.395 0.415 0.010 0.029 15 MC34163 MC33163 Motorola reserves the right to make changes without further notice to any products herein. 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